xref: /linux/scripts/dtc/include-prefixes/arm/ti/omap/dra71-evm.dts (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com/
4*724ba675SRob Herring */
5*724ba675SRob Herring
6*724ba675SRob Herring#include "dra71x.dtsi"
7*724ba675SRob Herring#include "dra7-mmc-iodelay.dtsi"
8*724ba675SRob Herring#include "dra72x-mmc-iodelay.dtsi"
9*724ba675SRob Herring#include <dt-bindings/net/ti-dp83867.h>
10*724ba675SRob Herring
11*724ba675SRob Herring/ {
12*724ba675SRob Herring	compatible = "ti,dra718-evm", "ti,dra718", "ti,dra722", "ti,dra72", "ti,dra7";
13*724ba675SRob Herring	model = "TI DRA718 EVM";
14*724ba675SRob Herring
15*724ba675SRob Herring	memory {
16*724ba675SRob Herring		device_type = "memory";
17*724ba675SRob Herring		reg = <0x0 0x80000000 0x0 0x80000000>; /* 2GB */
18*724ba675SRob Herring	};
19*724ba675SRob Herring
20*724ba675SRob Herring	reserved-memory {
21*724ba675SRob Herring		#address-cells = <2>;
22*724ba675SRob Herring		#size-cells = <2>;
23*724ba675SRob Herring		ranges;
24*724ba675SRob Herring
25*724ba675SRob Herring		ipu2_memory_region: ipu2-memory@95800000 {
26*724ba675SRob Herring			compatible = "shared-dma-pool";
27*724ba675SRob Herring			reg = <0x0 0x95800000 0x0 0x3800000>;
28*724ba675SRob Herring			reusable;
29*724ba675SRob Herring			status = "okay";
30*724ba675SRob Herring		};
31*724ba675SRob Herring
32*724ba675SRob Herring		dsp1_memory_region: dsp1-memory@99000000 {
33*724ba675SRob Herring			compatible = "shared-dma-pool";
34*724ba675SRob Herring			reg = <0x0 0x99000000 0x0 0x4000000>;
35*724ba675SRob Herring			reusable;
36*724ba675SRob Herring			status = "okay";
37*724ba675SRob Herring		};
38*724ba675SRob Herring
39*724ba675SRob Herring		ipu1_memory_region: ipu1-memory@9d000000 {
40*724ba675SRob Herring			compatible = "shared-dma-pool";
41*724ba675SRob Herring			reg = <0x0 0x9d000000 0x0 0x2000000>;
42*724ba675SRob Herring			reusable;
43*724ba675SRob Herring			status = "okay";
44*724ba675SRob Herring		};
45*724ba675SRob Herring	};
46*724ba675SRob Herring
47*724ba675SRob Herring	vpo_sd_1v8_3v3: gpio-regulator-TPS74801 {
48*724ba675SRob Herring		compatible = "regulator-gpio";
49*724ba675SRob Herring
50*724ba675SRob Herring		regulator-name = "vddshv8";
51*724ba675SRob Herring		regulator-min-microvolt = <1800000>;
52*724ba675SRob Herring		regulator-max-microvolt = <3300000>;
53*724ba675SRob Herring		regulator-boot-on;
54*724ba675SRob Herring		vin-supply = <&evm_5v0>;
55*724ba675SRob Herring
56*724ba675SRob Herring		gpios = <&gpio7 11 GPIO_ACTIVE_HIGH>;
57*724ba675SRob Herring		states = <1800000 0x0
58*724ba675SRob Herring			  3300000 0x1>;
59*724ba675SRob Herring	};
60*724ba675SRob Herring
61*724ba675SRob Herring	evm_1v8_sw: fixedregulator-evm_1v8 {
62*724ba675SRob Herring		compatible = "regulator-fixed";
63*724ba675SRob Herring		regulator-name = "evm_1v8";
64*724ba675SRob Herring		regulator-min-microvolt = <1800000>;
65*724ba675SRob Herring		regulator-max-microvolt = <1800000>;
66*724ba675SRob Herring		vin-supply = <&lp8732_buck0_reg>;
67*724ba675SRob Herring		regulator-always-on;
68*724ba675SRob Herring		regulator-boot-on;
69*724ba675SRob Herring	};
70*724ba675SRob Herring
71*724ba675SRob Herring	poweroff: gpio-poweroff {
72*724ba675SRob Herring		compatible = "gpio-poweroff";
73*724ba675SRob Herring		gpios = <&gpio7 30 GPIO_ACTIVE_HIGH>;
74*724ba675SRob Herring		input;
75*724ba675SRob Herring	};
76*724ba675SRob Herring};
77*724ba675SRob Herring
78*724ba675SRob Herring&i2c1 {
79*724ba675SRob Herring	status = "okay";
80*724ba675SRob Herring	clock-frequency = <400000>;
81*724ba675SRob Herring
82*724ba675SRob Herring	lp8733: lp8733@60 {
83*724ba675SRob Herring		compatible = "ti,lp8733";
84*724ba675SRob Herring		reg = <0x60>;
85*724ba675SRob Herring
86*724ba675SRob Herring		buck0-in-supply =<&vsys_3v3>;
87*724ba675SRob Herring		buck1-in-supply =<&vsys_3v3>;
88*724ba675SRob Herring		ldo0-in-supply =<&evm_5v0>;
89*724ba675SRob Herring		ldo1-in-supply =<&evm_5v0>;
90*724ba675SRob Herring
91*724ba675SRob Herring		lp8733_regulators: regulators {
92*724ba675SRob Herring			lp8733_buck0_reg: buck0 {
93*724ba675SRob Herring				/* FB_B0 -> LP8733-BUCK1 - VPO_S1_AVS - VDD_CORE_AVS (core, mpu, gpu) */
94*724ba675SRob Herring				regulator-name = "lp8733-buck0";
95*724ba675SRob Herring				regulator-min-microvolt = <850000>;
96*724ba675SRob Herring				regulator-max-microvolt = <1250000>;
97*724ba675SRob Herring				regulator-always-on;
98*724ba675SRob Herring				regulator-boot-on;
99*724ba675SRob Herring			};
100*724ba675SRob Herring
101*724ba675SRob Herring			lp8733_buck1_reg: buck1 {
102*724ba675SRob Herring				/* FB_B1 -> LP8733-BUCK2 - VPO_S2_AVS - VDD_DSP_AVS (DSP/eve/iva) */
103*724ba675SRob Herring				regulator-name = "lp8733-buck1";
104*724ba675SRob Herring				regulator-min-microvolt = <850000>;
105*724ba675SRob Herring				regulator-max-microvolt = <1250000>;
106*724ba675SRob Herring				regulator-boot-on;
107*724ba675SRob Herring				regulator-always-on;
108*724ba675SRob Herring			};
109*724ba675SRob Herring
110*724ba675SRob Herring			lp8733_ldo0_reg: ldo0 {
111*724ba675SRob Herring				/* LDO0 -> LP8733-LDO1 - VPO_L1_3V3 - VDDSHV8 (optional) */
112*724ba675SRob Herring				regulator-name = "lp8733-ldo0";
113*724ba675SRob Herring				regulator-min-microvolt = <3300000>;
114*724ba675SRob Herring				regulator-max-microvolt = <3300000>;
115*724ba675SRob Herring				regulator-boot-on;
116*724ba675SRob Herring				regulator-always-on;
117*724ba675SRob Herring			};
118*724ba675SRob Herring
119*724ba675SRob Herring			lp8733_ldo1_reg: ldo1 {
120*724ba675SRob Herring				/* LDO1 -> LP8733-LDO2 - VPO_L2_3V3 - VDDA_USB3V3 */
121*724ba675SRob Herring				regulator-name = "lp8733-ldo1";
122*724ba675SRob Herring				regulator-min-microvolt = <3300000>;
123*724ba675SRob Herring				regulator-max-microvolt = <3300000>;
124*724ba675SRob Herring				regulator-always-on;
125*724ba675SRob Herring				regulator-boot-on;
126*724ba675SRob Herring			};
127*724ba675SRob Herring		};
128*724ba675SRob Herring	};
129*724ba675SRob Herring
130*724ba675SRob Herring	lp8732: lp8732@61 {
131*724ba675SRob Herring		compatible = "ti,lp8732";
132*724ba675SRob Herring		reg = <0x61>;
133*724ba675SRob Herring
134*724ba675SRob Herring		buck0-in-supply =<&vsys_3v3>;
135*724ba675SRob Herring		buck1-in-supply =<&vsys_3v3>;
136*724ba675SRob Herring		ldo0-in-supply =<&vsys_3v3>;
137*724ba675SRob Herring		ldo1-in-supply =<&vsys_3v3>;
138*724ba675SRob Herring
139*724ba675SRob Herring		lp8732_regulators: regulators {
140*724ba675SRob Herring			lp8732_buck0_reg: buck0 {
141*724ba675SRob Herring				/* FB_B0 -> LP8732-BUCK1 - VPO_S3_1V8 - VDDS_1V8 */
142*724ba675SRob Herring				regulator-name = "lp8732-buck0";
143*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
144*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
145*724ba675SRob Herring				regulator-always-on;
146*724ba675SRob Herring				regulator-boot-on;
147*724ba675SRob Herring			};
148*724ba675SRob Herring
149*724ba675SRob Herring			lp8732_buck1_reg: buck1 {
150*724ba675SRob Herring				/* FB_B1 -> LP8732-BUCK2 - VPO_S4_DDR - VDD_DDR_1V35 */
151*724ba675SRob Herring				regulator-name = "lp8732-buck1";
152*724ba675SRob Herring				regulator-min-microvolt = <1350000>;
153*724ba675SRob Herring				regulator-max-microvolt = <1350000>;
154*724ba675SRob Herring				regulator-boot-on;
155*724ba675SRob Herring				regulator-always-on;
156*724ba675SRob Herring			};
157*724ba675SRob Herring
158*724ba675SRob Herring			lp8732_ldo0_reg: ldo0 {
159*724ba675SRob Herring				/* LDO0 -> LP8732-LDO1 - VPO_L3_1V8 - VDA_1V8_PLL */
160*724ba675SRob Herring				regulator-name = "lp8732-ldo0";
161*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
162*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
163*724ba675SRob Herring				regulator-boot-on;
164*724ba675SRob Herring				regulator-always-on;
165*724ba675SRob Herring			};
166*724ba675SRob Herring
167*724ba675SRob Herring			lp8732_ldo1_reg: ldo1 {
168*724ba675SRob Herring				/* LDO1 -> LP8732-LDO2 - VPO_L4_1V8 - VDA_1V8_PHY */
169*724ba675SRob Herring				regulator-name = "lp8732-ldo1";
170*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
171*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
172*724ba675SRob Herring				regulator-always-on;
173*724ba675SRob Herring				regulator-boot-on;
174*724ba675SRob Herring			};
175*724ba675SRob Herring		};
176*724ba675SRob Herring	};
177*724ba675SRob Herring};
178*724ba675SRob Herring
179*724ba675SRob Herring&pcf_lcd {
180*724ba675SRob Herring	interrupt-parent = <&gpio7>;
181*724ba675SRob Herring	interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
182*724ba675SRob Herring};
183*724ba675SRob Herring
184*724ba675SRob Herring&pcf_gpio_21 {
185*724ba675SRob Herring	interrupt-parent = <&gpio7>;
186*724ba675SRob Herring	interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
187*724ba675SRob Herring};
188*724ba675SRob Herring
189*724ba675SRob Herring&pcf_hdmi {
190*724ba675SRob Herring	hdmi-i2c-disable-hog {
191*724ba675SRob Herring		/*
192*724ba675SRob Herring		 * PM_OEn to High: Disable routing I2C3 to PM_I2C
193*724ba675SRob Herring		 * With this PM_SEL(p3) should not matter
194*724ba675SRob Herring		 */
195*724ba675SRob Herring		gpio-hog;
196*724ba675SRob Herring		gpios = <0 GPIO_ACTIVE_LOW>;
197*724ba675SRob Herring		output-high;
198*724ba675SRob Herring		line-name = "pm_oe_n";
199*724ba675SRob Herring	};
200*724ba675SRob Herring};
201*724ba675SRob Herring
202*724ba675SRob Herring&mmc1 {
203*724ba675SRob Herring	pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
204*724ba675SRob Herring	pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
205*724ba675SRob Herring	pinctrl-1 = <&mmc1_pins_hs>;
206*724ba675SRob Herring	pinctrl-2 = <&mmc1_pins_sdr12>;
207*724ba675SRob Herring	pinctrl-3 = <&mmc1_pins_sdr25>;
208*724ba675SRob Herring	pinctrl-4 = <&mmc1_pins_sdr50>;
209*724ba675SRob Herring	pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>;
210*724ba675SRob Herring	pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
211*724ba675SRob Herring	vqmmc-supply = <&vpo_sd_1v8_3v3>;
212*724ba675SRob Herring};
213*724ba675SRob Herring
214*724ba675SRob Herring&mmc2 {
215*724ba675SRob Herring	pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
216*724ba675SRob Herring	pinctrl-0 = <&mmc2_pins_default>;
217*724ba675SRob Herring	pinctrl-1 = <&mmc2_pins_hs>;
218*724ba675SRob Herring	pinctrl-2 = <&mmc2_pins_ddr_rev20 &mmc2_iodelay_ddr_conf>;
219*724ba675SRob Herring	pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_rev20_conf>;
220*724ba675SRob Herring	vmmc-supply = <&evm_1v8_sw>;
221*724ba675SRob Herring	vqmmc-supply = <&evm_1v8_sw>;
222*724ba675SRob Herring};
223*724ba675SRob Herring
224*724ba675SRob Herring&mac_sw {
225*724ba675SRob Herring	mode-gpios = <&pcf_gpio_21 4 GPIO_ACTIVE_LOW>,
226*724ba675SRob Herring		     <&pcf_hdmi 9 GPIO_ACTIVE_LOW>,	/* P11 */
227*724ba675SRob Herring		     <&pcf_hdmi 10 GPIO_ACTIVE_LOW>;	/* P12 */
228*724ba675SRob Herring	status = "okay";
229*724ba675SRob Herring};
230*724ba675SRob Herring
231*724ba675SRob Herring&cpsw_port1 {
232*724ba675SRob Herring	phy-handle = <&dp83867_0>;
233*724ba675SRob Herring	phy-mode = "rgmii-id";
234*724ba675SRob Herring	ti,dual-emac-pvid = <1>;
235*724ba675SRob Herring};
236*724ba675SRob Herring
237*724ba675SRob Herring&cpsw_port2 {
238*724ba675SRob Herring	phy-handle = <&dp83867_1>;
239*724ba675SRob Herring	phy-mode = "rgmii-id";
240*724ba675SRob Herring	ti,dual-emac-pvid = <2>;
241*724ba675SRob Herring};
242*724ba675SRob Herring
243*724ba675SRob Herring&davinci_mdio_sw {
244*724ba675SRob Herring	dp83867_0: ethernet-phy@2 {
245*724ba675SRob Herring		reg = <2>;
246*724ba675SRob Herring		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
247*724ba675SRob Herring		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
248*724ba675SRob Herring		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
249*724ba675SRob Herring		ti,min-output-impedance;
250*724ba675SRob Herring		ti,dp83867-rxctrl-strap-quirk;
251*724ba675SRob Herring	};
252*724ba675SRob Herring
253*724ba675SRob Herring	dp83867_1: ethernet-phy@3 {
254*724ba675SRob Herring		reg = <3>;
255*724ba675SRob Herring		ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
256*724ba675SRob Herring		ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
257*724ba675SRob Herring		ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
258*724ba675SRob Herring		ti,min-output-impedance;
259*724ba675SRob Herring		ti,dp83867-rxctrl-strap-quirk;
260*724ba675SRob Herring	};
261*724ba675SRob Herring};
262*724ba675SRob Herring
263*724ba675SRob Herring/* No Sata on this device */
264*724ba675SRob Herring&sata_phy {
265*724ba675SRob Herring	status = "disabled";
266*724ba675SRob Herring};
267*724ba675SRob Herring
268*724ba675SRob Herring&sata {
269*724ba675SRob Herring	status = "disabled";
270*724ba675SRob Herring};
271*724ba675SRob Herring
272*724ba675SRob Herring/* No RTC on this device */
273*724ba675SRob Herring&rtc {
274*724ba675SRob Herring	status = "disabled";
275*724ba675SRob Herring};
276*724ba675SRob Herring
277*724ba675SRob Herring&usb2_phy1 {
278*724ba675SRob Herring	phy-supply = <&lp8733_ldo1_reg>;
279*724ba675SRob Herring};
280*724ba675SRob Herring
281*724ba675SRob Herring&usb2_phy2 {
282*724ba675SRob Herring	phy-supply = <&lp8733_ldo1_reg>;
283*724ba675SRob Herring};
284*724ba675SRob Herring
285*724ba675SRob Herring&dss {
286*724ba675SRob Herring	/* Supplied by VDA_1V8_PLL */
287*724ba675SRob Herring	vdda_video-supply = <&lp8732_ldo0_reg>;
288*724ba675SRob Herring};
289*724ba675SRob Herring
290*724ba675SRob Herring&hdmi {
291*724ba675SRob Herring	/* Supplied by VDA_1V8_PHY */
292*724ba675SRob Herring	vdda_video-supply = <&lp8732_ldo1_reg>;
293*724ba675SRob Herring};
294*724ba675SRob Herring
295*724ba675SRob Herring&extcon_usb1 {
296*724ba675SRob Herring	vbus-gpio = <&pcf_lcd 14 GPIO_ACTIVE_HIGH>;
297*724ba675SRob Herring};
298*724ba675SRob Herring
299*724ba675SRob Herring&extcon_usb2 {
300*724ba675SRob Herring	vbus-gpio = <&pcf_lcd 15 GPIO_ACTIVE_HIGH>;
301*724ba675SRob Herring};
302*724ba675SRob Herring
303*724ba675SRob Herring&ipu2 {
304*724ba675SRob Herring	status = "okay";
305*724ba675SRob Herring	memory-region = <&ipu2_memory_region>;
306*724ba675SRob Herring};
307*724ba675SRob Herring
308*724ba675SRob Herring&ipu1 {
309*724ba675SRob Herring	status = "okay";
310*724ba675SRob Herring	memory-region = <&ipu1_memory_region>;
311*724ba675SRob Herring};
312*724ba675SRob Herring
313*724ba675SRob Herring&dsp1 {
314*724ba675SRob Herring	status = "okay";
315*724ba675SRob Herring	memory-region = <&dsp1_memory_region>;
316*724ba675SRob Herring};
317