1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring/* 3*724ba675SRob Herring * am335x-igep0033.dtsi - Device Tree file for IGEP COM AQUILA AM335x 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2013 ISEE 2007 SL - http://www.isee.biz 6*724ba675SRob Herring */ 7*724ba675SRob Herring 8*724ba675SRob Herring/dts-v1/; 9*724ba675SRob Herring 10*724ba675SRob Herring#include "am33xx.dtsi" 11*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 12*724ba675SRob Herring 13*724ba675SRob Herring/ { 14*724ba675SRob Herring cpus { 15*724ba675SRob Herring cpu@0 { 16*724ba675SRob Herring cpu0-supply = <&vdd1_reg>; 17*724ba675SRob Herring }; 18*724ba675SRob Herring }; 19*724ba675SRob Herring 20*724ba675SRob Herring memory@80000000 { 21*724ba675SRob Herring device_type = "memory"; 22*724ba675SRob Herring reg = <0x80000000 0x10000000>; /* 256 MB */ 23*724ba675SRob Herring }; 24*724ba675SRob Herring 25*724ba675SRob Herring leds { 26*724ba675SRob Herring pinctrl-names = "default"; 27*724ba675SRob Herring pinctrl-0 = <&leds_pins>; 28*724ba675SRob Herring 29*724ba675SRob Herring compatible = "gpio-leds"; 30*724ba675SRob Herring 31*724ba675SRob Herring led0 { 32*724ba675SRob Herring label = "com:green:user"; 33*724ba675SRob Herring gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; 34*724ba675SRob Herring default-state = "on"; 35*724ba675SRob Herring }; 36*724ba675SRob Herring }; 37*724ba675SRob Herring 38*724ba675SRob Herring vbat: fixedregulator0 { 39*724ba675SRob Herring compatible = "regulator-fixed"; 40*724ba675SRob Herring regulator-name = "vbat"; 41*724ba675SRob Herring regulator-min-microvolt = <5000000>; 42*724ba675SRob Herring regulator-max-microvolt = <5000000>; 43*724ba675SRob Herring regulator-boot-on; 44*724ba675SRob Herring }; 45*724ba675SRob Herring 46*724ba675SRob Herring vmmc: fixedregulator1 { 47*724ba675SRob Herring compatible = "regulator-fixed"; 48*724ba675SRob Herring regulator-name = "vmmc"; 49*724ba675SRob Herring regulator-min-microvolt = <3300000>; 50*724ba675SRob Herring regulator-max-microvolt = <3300000>; 51*724ba675SRob Herring }; 52*724ba675SRob Herring}; 53*724ba675SRob Herring 54*724ba675SRob Herring&am33xx_pinmux { 55*724ba675SRob Herring i2c0_pins: i2c0-pins { 56*724ba675SRob Herring pinctrl-single,pins = < 57*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) 58*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) 59*724ba675SRob Herring >; 60*724ba675SRob Herring }; 61*724ba675SRob Herring 62*724ba675SRob Herring nandflash_pins: nandflash-pins { 63*724ba675SRob Herring pinctrl-single,pins = < 64*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE0) 65*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE0) 66*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE0) 67*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE0) 68*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE0) 69*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE0) 70*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE0) 71*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE0) 72*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE0) 73*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLUP, MUX_MODE7) /* gpmc_wpn.gpio0_31 */ 74*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE0) 75*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE0) 76*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE0) 77*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_WEN, PIN_OUTPUT, MUX_MODE0) 78*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_BEN0_CLE, PIN_OUTPUT, MUX_MODE0) 79*724ba675SRob Herring >; 80*724ba675SRob Herring }; 81*724ba675SRob Herring 82*724ba675SRob Herring uart0_pins: uart0-pins { 83*724ba675SRob Herring pinctrl-single,pins = < 84*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) 85*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 86*724ba675SRob Herring >; 87*724ba675SRob Herring }; 88*724ba675SRob Herring 89*724ba675SRob Herring leds_pins: leds-pins { 90*724ba675SRob Herring pinctrl-single,pins = < 91*724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */ 92*724ba675SRob Herring >; 93*724ba675SRob Herring }; 94*724ba675SRob Herring}; 95*724ba675SRob Herring 96*724ba675SRob Herring&mac_sw { 97*724ba675SRob Herring status = "okay"; 98*724ba675SRob Herring}; 99*724ba675SRob Herring 100*724ba675SRob Herring&davinci_mdio_sw { 101*724ba675SRob Herring 102*724ba675SRob Herring ethphy0: ethernet-phy@0 { 103*724ba675SRob Herring reg = <0>; 104*724ba675SRob Herring }; 105*724ba675SRob Herring 106*724ba675SRob Herring ethphy1: ethernet-phy@1 { 107*724ba675SRob Herring reg = <1>; 108*724ba675SRob Herring }; 109*724ba675SRob Herring}; 110*724ba675SRob Herring 111*724ba675SRob Herring&cpsw_port1 { 112*724ba675SRob Herring phy-handle = <ðphy0>; 113*724ba675SRob Herring phy-mode = "rmii"; 114*724ba675SRob Herring ti,dual-emac-pvid = <1>; 115*724ba675SRob Herring}; 116*724ba675SRob Herring 117*724ba675SRob Herring&cpsw_port2 { 118*724ba675SRob Herring phy-handle = <ðphy1>; 119*724ba675SRob Herring phy-mode = "rmii"; 120*724ba675SRob Herring ti,dual-emac-pvid = <2>; 121*724ba675SRob Herring}; 122*724ba675SRob Herring 123*724ba675SRob Herring&elm { 124*724ba675SRob Herring status = "okay"; 125*724ba675SRob Herring}; 126*724ba675SRob Herring 127*724ba675SRob Herring&gpmc { 128*724ba675SRob Herring status = "okay"; 129*724ba675SRob Herring pinctrl-names = "default"; 130*724ba675SRob Herring pinctrl-0 = <&nandflash_pins>; 131*724ba675SRob Herring 132*724ba675SRob Herring ranges = <0 0 0x08000000 0x1000000>; /* CS0: 16MB for NAND */ 133*724ba675SRob Herring 134*724ba675SRob Herring nand@0,0 { 135*724ba675SRob Herring compatible = "ti,omap2-nand"; 136*724ba675SRob Herring reg = <0 0 4>; /* CS0, offset 0, IO size 4 */ 137*724ba675SRob Herring interrupt-parent = <&gpmc>; 138*724ba675SRob Herring interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */ 139*724ba675SRob Herring <1 IRQ_TYPE_NONE>; /* termcount */ 140*724ba675SRob Herring rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */ 141*724ba675SRob Herring nand-bus-width = <8>; 142*724ba675SRob Herring ti,nand-ecc-opt = "bch8"; 143*724ba675SRob Herring gpmc,device-width = <1>; 144*724ba675SRob Herring gpmc,sync-clk-ps = <0>; 145*724ba675SRob Herring gpmc,cs-on-ns = <0>; 146*724ba675SRob Herring gpmc,cs-rd-off-ns = <44>; 147*724ba675SRob Herring gpmc,cs-wr-off-ns = <44>; 148*724ba675SRob Herring gpmc,adv-on-ns = <6>; 149*724ba675SRob Herring gpmc,adv-rd-off-ns = <34>; 150*724ba675SRob Herring gpmc,adv-wr-off-ns = <44>; 151*724ba675SRob Herring gpmc,we-on-ns = <0>; 152*724ba675SRob Herring gpmc,we-off-ns = <40>; 153*724ba675SRob Herring gpmc,oe-on-ns = <0>; 154*724ba675SRob Herring gpmc,oe-off-ns = <54>; 155*724ba675SRob Herring gpmc,access-ns = <64>; 156*724ba675SRob Herring gpmc,rd-cycle-ns = <82>; 157*724ba675SRob Herring gpmc,wr-cycle-ns = <82>; 158*724ba675SRob Herring gpmc,bus-turnaround-ns = <0>; 159*724ba675SRob Herring gpmc,cycle2cycle-delay-ns = <0>; 160*724ba675SRob Herring gpmc,clk-activation-ns = <0>; 161*724ba675SRob Herring gpmc,wr-access-ns = <40>; 162*724ba675SRob Herring gpmc,wr-data-mux-bus-ns = <0>; 163*724ba675SRob Herring 164*724ba675SRob Herring #address-cells = <1>; 165*724ba675SRob Herring #size-cells = <1>; 166*724ba675SRob Herring ti,elm-id = <&elm>; 167*724ba675SRob Herring 168*724ba675SRob Herring /* MTD partition table */ 169*724ba675SRob Herring partition@0 { 170*724ba675SRob Herring label = "SPL"; 171*724ba675SRob Herring reg = <0x00000000 0x00080000>; 172*724ba675SRob Herring }; 173*724ba675SRob Herring 174*724ba675SRob Herring partition@1 { 175*724ba675SRob Herring label = "U-boot"; 176*724ba675SRob Herring reg = <0x00080000 0x001e0000>; 177*724ba675SRob Herring }; 178*724ba675SRob Herring 179*724ba675SRob Herring partition@2 { 180*724ba675SRob Herring label = "U-Boot Env"; 181*724ba675SRob Herring reg = <0x00260000 0x00020000>; 182*724ba675SRob Herring }; 183*724ba675SRob Herring 184*724ba675SRob Herring partition@3 { 185*724ba675SRob Herring label = "Kernel"; 186*724ba675SRob Herring reg = <0x00280000 0x00500000>; 187*724ba675SRob Herring }; 188*724ba675SRob Herring 189*724ba675SRob Herring partition@4 { 190*724ba675SRob Herring label = "File System"; 191*724ba675SRob Herring reg = <0x00780000 0x07880000>; 192*724ba675SRob Herring }; 193*724ba675SRob Herring }; 194*724ba675SRob Herring}; 195*724ba675SRob Herring 196*724ba675SRob Herring&i2c0 { 197*724ba675SRob Herring status = "okay"; 198*724ba675SRob Herring pinctrl-names = "default"; 199*724ba675SRob Herring pinctrl-0 = <&i2c0_pins>; 200*724ba675SRob Herring 201*724ba675SRob Herring clock-frequency = <400000>; 202*724ba675SRob Herring 203*724ba675SRob Herring tps: tps@2d { 204*724ba675SRob Herring reg = <0x2d>; 205*724ba675SRob Herring }; 206*724ba675SRob Herring}; 207*724ba675SRob Herring 208*724ba675SRob Herring&mmc1 { 209*724ba675SRob Herring status = "okay"; 210*724ba675SRob Herring vmmc-supply = <&vmmc>; 211*724ba675SRob Herring bus-width = <4>; 212*724ba675SRob Herring}; 213*724ba675SRob Herring 214*724ba675SRob Herring&uart0 { 215*724ba675SRob Herring status = "okay"; 216*724ba675SRob Herring pinctrl-names = "default"; 217*724ba675SRob Herring pinctrl-0 = <&uart0_pins>; 218*724ba675SRob Herring}; 219*724ba675SRob Herring 220*724ba675SRob Herring&usb1 { 221*724ba675SRob Herring dr_mode = "host"; 222*724ba675SRob Herring}; 223*724ba675SRob Herring 224*724ba675SRob Herring#include "../../tps65910.dtsi" 225*724ba675SRob Herring 226*724ba675SRob Herring&tps { 227*724ba675SRob Herring vcc1-supply = <&vbat>; 228*724ba675SRob Herring vcc2-supply = <&vbat>; 229*724ba675SRob Herring vcc3-supply = <&vbat>; 230*724ba675SRob Herring vcc4-supply = <&vbat>; 231*724ba675SRob Herring vcc5-supply = <&vbat>; 232*724ba675SRob Herring vcc6-supply = <&vbat>; 233*724ba675SRob Herring vcc7-supply = <&vbat>; 234*724ba675SRob Herring vccio-supply = <&vbat>; 235*724ba675SRob Herring 236*724ba675SRob Herring regulators { 237*724ba675SRob Herring vrtc_reg: regulator@0 { 238*724ba675SRob Herring regulator-always-on; 239*724ba675SRob Herring }; 240*724ba675SRob Herring 241*724ba675SRob Herring vio_reg: regulator@1 { 242*724ba675SRob Herring regulator-always-on; 243*724ba675SRob Herring }; 244*724ba675SRob Herring 245*724ba675SRob Herring vdd1_reg: regulator@2 { 246*724ba675SRob Herring /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 247*724ba675SRob Herring regulator-name = "vdd_mpu"; 248*724ba675SRob Herring regulator-min-microvolt = <912500>; 249*724ba675SRob Herring regulator-max-microvolt = <1312500>; 250*724ba675SRob Herring regulator-boot-on; 251*724ba675SRob Herring regulator-always-on; 252*724ba675SRob Herring }; 253*724ba675SRob Herring 254*724ba675SRob Herring vdd2_reg: regulator@3 { 255*724ba675SRob Herring /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 256*724ba675SRob Herring regulator-name = "vdd_core"; 257*724ba675SRob Herring regulator-min-microvolt = <912500>; 258*724ba675SRob Herring regulator-max-microvolt = <1150000>; 259*724ba675SRob Herring regulator-boot-on; 260*724ba675SRob Herring regulator-always-on; 261*724ba675SRob Herring }; 262*724ba675SRob Herring 263*724ba675SRob Herring vdd3_reg: regulator@4 { 264*724ba675SRob Herring regulator-always-on; 265*724ba675SRob Herring }; 266*724ba675SRob Herring 267*724ba675SRob Herring vdig1_reg: regulator@5 { 268*724ba675SRob Herring regulator-always-on; 269*724ba675SRob Herring }; 270*724ba675SRob Herring 271*724ba675SRob Herring vdig2_reg: regulator@6 { 272*724ba675SRob Herring regulator-always-on; 273*724ba675SRob Herring }; 274*724ba675SRob Herring 275*724ba675SRob Herring vpll_reg: regulator@7 { 276*724ba675SRob Herring regulator-always-on; 277*724ba675SRob Herring }; 278*724ba675SRob Herring 279*724ba675SRob Herring vdac_reg: regulator@8 { 280*724ba675SRob Herring regulator-always-on; 281*724ba675SRob Herring }; 282*724ba675SRob Herring 283*724ba675SRob Herring vaux1_reg: regulator@9 { 284*724ba675SRob Herring regulator-always-on; 285*724ba675SRob Herring }; 286*724ba675SRob Herring 287*724ba675SRob Herring vaux2_reg: regulator@10 { 288*724ba675SRob Herring regulator-always-on; 289*724ba675SRob Herring }; 290*724ba675SRob Herring 291*724ba675SRob Herring vaux33_reg: regulator@11 { 292*724ba675SRob Herring regulator-always-on; 293*724ba675SRob Herring }; 294*724ba675SRob Herring 295*724ba675SRob Herring vmmc_reg: regulator@12 { 296*724ba675SRob Herring regulator-always-on; 297*724ba675SRob Herring }; 298*724ba675SRob Herring }; 299*724ba675SRob Herring}; 300*724ba675SRob Herring 301