1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 4724ba675SRob Herring */ 5724ba675SRob Herring 6724ba675SRob Herring/ { 7724ba675SRob Herring cpus { 8724ba675SRob Herring cpu@0 { 9724ba675SRob Herring cpu0-supply = <&dcdc2_reg>; 10724ba675SRob Herring }; 11724ba675SRob Herring }; 12724ba675SRob Herring 13724ba675SRob Herring memory@80000000 { 14724ba675SRob Herring device_type = "memory"; 15724ba675SRob Herring reg = <0x80000000 0x10000000>; /* 256 MB */ 16724ba675SRob Herring }; 17724ba675SRob Herring 18724ba675SRob Herring chosen { 19724ba675SRob Herring stdout-path = &uart0; 20724ba675SRob Herring }; 21724ba675SRob Herring 22724ba675SRob Herring leds { 23724ba675SRob Herring pinctrl-names = "default"; 24724ba675SRob Herring pinctrl-0 = <&user_leds_s0>; 25724ba675SRob Herring 26724ba675SRob Herring compatible = "gpio-leds"; 27724ba675SRob Herring 28724ba675SRob Herring led2 { 29724ba675SRob Herring label = "beaglebone:green:heartbeat"; 30724ba675SRob Herring gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; 31724ba675SRob Herring linux,default-trigger = "heartbeat"; 32724ba675SRob Herring default-state = "off"; 33724ba675SRob Herring }; 34724ba675SRob Herring 35724ba675SRob Herring led3 { 36724ba675SRob Herring label = "beaglebone:green:mmc0"; 37724ba675SRob Herring gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>; 38724ba675SRob Herring linux,default-trigger = "mmc0"; 39724ba675SRob Herring default-state = "off"; 40724ba675SRob Herring }; 41724ba675SRob Herring 42724ba675SRob Herring led4 { 43724ba675SRob Herring label = "beaglebone:green:usr2"; 44724ba675SRob Herring gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>; 45724ba675SRob Herring linux,default-trigger = "cpu0"; 46724ba675SRob Herring default-state = "off"; 47724ba675SRob Herring }; 48724ba675SRob Herring 49724ba675SRob Herring led5 { 50724ba675SRob Herring label = "beaglebone:green:usr3"; 51724ba675SRob Herring gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>; 52724ba675SRob Herring linux,default-trigger = "mmc1"; 53724ba675SRob Herring default-state = "off"; 54724ba675SRob Herring }; 55724ba675SRob Herring }; 56724ba675SRob Herring 57724ba675SRob Herring vmmcsd_fixed: fixedregulator0 { 58724ba675SRob Herring compatible = "regulator-fixed"; 59724ba675SRob Herring regulator-name = "vmmcsd_fixed"; 60724ba675SRob Herring regulator-min-microvolt = <3300000>; 61724ba675SRob Herring regulator-max-microvolt = <3300000>; 62724ba675SRob Herring }; 63724ba675SRob Herring}; 64724ba675SRob Herring 65724ba675SRob Herring&am33xx_pinmux { 66724ba675SRob Herring pinctrl-names = "default"; 67724ba675SRob Herring pinctrl-0 = <&clkout2_pin>; 68724ba675SRob Herring 69724ba675SRob Herring user_leds_s0: user-leds-s0-pins { 70724ba675SRob Herring pinctrl-single,pins = < 71724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */ 72724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */ 73724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */ 74724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */ 75724ba675SRob Herring >; 76724ba675SRob Herring }; 77724ba675SRob Herring 78724ba675SRob Herring i2c0_pins: i2c0-pins { 79724ba675SRob Herring pinctrl-single,pins = < 80724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_sda.i2c0_sda */ 81724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_scl.i2c0_scl */ 82724ba675SRob Herring >; 83724ba675SRob Herring }; 84724ba675SRob Herring 85724ba675SRob Herring i2c2_pins: i2c2-pins { 86724ba675SRob Herring pinctrl-single,pins = < 87724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */ 88724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */ 89724ba675SRob Herring >; 90724ba675SRob Herring }; 91724ba675SRob Herring 92724ba675SRob Herring uart0_pins: uart0-pins { 93724ba675SRob Herring pinctrl-single,pins = < 94724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0) 95724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 96724ba675SRob Herring >; 97724ba675SRob Herring }; 98724ba675SRob Herring 99724ba675SRob Herring clkout2_pin: clkout2-pins { 100724ba675SRob Herring pinctrl-single,pins = < 101724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */ 102724ba675SRob Herring >; 103724ba675SRob Herring }; 104724ba675SRob Herring 105724ba675SRob Herring cpsw_default: cpsw-default-pins { 106724ba675SRob Herring pinctrl-single,pins = < 107724ba675SRob Herring /* Slave 1 */ 108724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE0) 109724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 110724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE0) 111724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 112724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 113724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 114724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE0) 115724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0) 116724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE0) 117724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE0) 118724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE0) 119724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE0) 120724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE0) 121724ba675SRob Herring >; 122724ba675SRob Herring }; 123724ba675SRob Herring 124724ba675SRob Herring cpsw_sleep: cpsw-sleep-pins { 125724ba675SRob Herring pinctrl-single,pins = < 126724ba675SRob Herring /* Slave 1 reset value */ 127724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7) 128724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) 129724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7) 130724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 131724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 132724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 133724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 134724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 135724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7) 136724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7) 137724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7) 138724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7) 139724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7) 140724ba675SRob Herring >; 141724ba675SRob Herring }; 142724ba675SRob Herring 143724ba675SRob Herring davinci_mdio_default: davinci-mdio-default-pins { 144724ba675SRob Herring pinctrl-single,pins = < 145724ba675SRob Herring /* MDIO */ 146724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0) 147724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0) 148*623cef65SShengyu Qu /* Added to support GPIO controlled PHY reset */ 149*623cef65SShengyu Qu AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLUP, MUX_MODE7) 150724ba675SRob Herring >; 151724ba675SRob Herring }; 152724ba675SRob Herring 153724ba675SRob Herring davinci_mdio_sleep: davinci-mdio-sleep-pins { 154724ba675SRob Herring pinctrl-single,pins = < 155724ba675SRob Herring /* MDIO reset value */ 156724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7) 157724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7) 158*623cef65SShengyu Qu /* Added to support GPIO controlled PHY reset */ 159*623cef65SShengyu Qu AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE7) 160724ba675SRob Herring >; 161724ba675SRob Herring }; 162724ba675SRob Herring 163724ba675SRob Herring mmc1_pins: mmc1-pins { 164724ba675SRob Herring pinctrl-single,pins = < 165724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* spio0_cs1.gpio0_6 */ 166724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0) 167724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0) 168724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0) 169724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0) 170724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0) 171724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0) 172724ba675SRob Herring >; 173724ba675SRob Herring }; 174724ba675SRob Herring 175724ba675SRob Herring emmc_pins: emmc-pins { 176724ba675SRob Herring pinctrl-single,pins = < 177724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */ 178724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */ 179724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */ 180724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */ 181724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */ 182724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */ 183724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */ 184724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */ 185724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */ 186724ba675SRob Herring AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */ 187724ba675SRob Herring >; 188724ba675SRob Herring }; 189724ba675SRob Herring}; 190724ba675SRob Herring 191724ba675SRob Herring&uart0 { 192724ba675SRob Herring pinctrl-names = "default"; 193724ba675SRob Herring pinctrl-0 = <&uart0_pins>; 194724ba675SRob Herring 195724ba675SRob Herring status = "okay"; 196724ba675SRob Herring}; 197724ba675SRob Herring 198724ba675SRob Herring&usb0 { 199724ba675SRob Herring dr_mode = "peripheral"; 200724ba675SRob Herring interrupts-extended = <&intc 18 &tps 0>; 201724ba675SRob Herring interrupt-names = "mc", "vbus"; 202724ba675SRob Herring}; 203724ba675SRob Herring 204724ba675SRob Herring&usb1 { 205724ba675SRob Herring dr_mode = "host"; 206724ba675SRob Herring}; 207724ba675SRob Herring 208724ba675SRob Herring&i2c0 { 209724ba675SRob Herring pinctrl-names = "default"; 210724ba675SRob Herring pinctrl-0 = <&i2c0_pins>; 211724ba675SRob Herring 212724ba675SRob Herring status = "okay"; 213724ba675SRob Herring clock-frequency = <400000>; 214724ba675SRob Herring 215724ba675SRob Herring tps: tps@24 { 216724ba675SRob Herring reg = <0x24>; 217724ba675SRob Herring }; 218724ba675SRob Herring 219724ba675SRob Herring baseboard_eeprom: baseboard_eeprom@50 { 220724ba675SRob Herring compatible = "atmel,24c256"; 221724ba675SRob Herring reg = <0x50>; 222724ba675SRob Herring 223724ba675SRob Herring #address-cells = <1>; 224724ba675SRob Herring #size-cells = <1>; 225724ba675SRob Herring baseboard_data: baseboard_data@0 { 226724ba675SRob Herring reg = <0 0x100>; 227724ba675SRob Herring }; 228724ba675SRob Herring }; 229724ba675SRob Herring}; 230724ba675SRob Herring 231724ba675SRob Herring&i2c2 { 232724ba675SRob Herring pinctrl-names = "default"; 233724ba675SRob Herring pinctrl-0 = <&i2c2_pins>; 234724ba675SRob Herring 235724ba675SRob Herring status = "okay"; 236724ba675SRob Herring clock-frequency = <100000>; 237724ba675SRob Herring 238724ba675SRob Herring cape_eeprom0: cape_eeprom0@54 { 239724ba675SRob Herring compatible = "atmel,24c256"; 240724ba675SRob Herring reg = <0x54>; 241724ba675SRob Herring #address-cells = <1>; 242724ba675SRob Herring #size-cells = <1>; 243724ba675SRob Herring cape0_data: cape_data@0 { 244724ba675SRob Herring reg = <0 0x100>; 245724ba675SRob Herring }; 246724ba675SRob Herring }; 247724ba675SRob Herring 248724ba675SRob Herring cape_eeprom1: cape_eeprom1@55 { 249724ba675SRob Herring compatible = "atmel,24c256"; 250724ba675SRob Herring reg = <0x55>; 251724ba675SRob Herring #address-cells = <1>; 252724ba675SRob Herring #size-cells = <1>; 253724ba675SRob Herring cape1_data: cape_data@0 { 254724ba675SRob Herring reg = <0 0x100>; 255724ba675SRob Herring }; 256724ba675SRob Herring }; 257724ba675SRob Herring 258724ba675SRob Herring cape_eeprom2: cape_eeprom2@56 { 259724ba675SRob Herring compatible = "atmel,24c256"; 260724ba675SRob Herring reg = <0x56>; 261724ba675SRob Herring #address-cells = <1>; 262724ba675SRob Herring #size-cells = <1>; 263724ba675SRob Herring cape2_data: cape_data@0 { 264724ba675SRob Herring reg = <0 0x100>; 265724ba675SRob Herring }; 266724ba675SRob Herring }; 267724ba675SRob Herring 268724ba675SRob Herring cape_eeprom3: cape_eeprom3@57 { 269724ba675SRob Herring compatible = "atmel,24c256"; 270724ba675SRob Herring reg = <0x57>; 271724ba675SRob Herring #address-cells = <1>; 272724ba675SRob Herring #size-cells = <1>; 273724ba675SRob Herring cape3_data: cape_data@0 { 274724ba675SRob Herring reg = <0 0x100>; 275724ba675SRob Herring }; 276724ba675SRob Herring }; 277724ba675SRob Herring}; 278724ba675SRob Herring 279724ba675SRob Herring 280724ba675SRob Herring/include/ "../../tps65217.dtsi" 281724ba675SRob Herring 282724ba675SRob Herring&tps { 283724ba675SRob Herring /* 284724ba675SRob Herring * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only 285724ba675SRob Herring * mode") at poweroff. Most BeagleBone versions do not support RTC-only 286724ba675SRob Herring * mode and risk hardware damage if this mode is entered. 287724ba675SRob Herring * 288724ba675SRob Herring * For details, see linux-omap mailing list May 2015 thread 289724ba675SRob Herring * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller 290724ba675SRob Herring * In particular, messages: 291724ba675SRob Herring * http://www.spinics.net/lists/linux-omap/msg118585.html 292724ba675SRob Herring * http://www.spinics.net/lists/linux-omap/msg118615.html 293724ba675SRob Herring * 294724ba675SRob Herring * You can override this later with 295724ba675SRob Herring * &tps { /delete-property/ ti,pmic-shutdown-controller; } 296724ba675SRob Herring * if you want to use RTC-only mode and made sure you are not affected 297724ba675SRob Herring * by the hardware problems. (Tip: double-check by performing a current 298724ba675SRob Herring * measurement after shutdown: it should be less than 1 mA.) 299724ba675SRob Herring */ 300724ba675SRob Herring 301724ba675SRob Herring interrupts = <7>; /* NMI */ 302724ba675SRob Herring interrupt-parent = <&intc>; 303724ba675SRob Herring 304724ba675SRob Herring ti,pmic-shutdown-controller; 305724ba675SRob Herring 306724ba675SRob Herring charger { 307724ba675SRob Herring status = "okay"; 308724ba675SRob Herring }; 309724ba675SRob Herring 310724ba675SRob Herring pwrbutton { 311724ba675SRob Herring status = "okay"; 312724ba675SRob Herring }; 313724ba675SRob Herring 314724ba675SRob Herring regulators { 315724ba675SRob Herring dcdc1_reg: regulator@0 { 316724ba675SRob Herring regulator-name = "vdds_dpr"; 317724ba675SRob Herring regulator-always-on; 318724ba675SRob Herring }; 319724ba675SRob Herring 320724ba675SRob Herring dcdc2_reg: regulator@1 { 321724ba675SRob Herring /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */ 322724ba675SRob Herring regulator-name = "vdd_mpu"; 323724ba675SRob Herring regulator-min-microvolt = <925000>; 324724ba675SRob Herring regulator-max-microvolt = <1351500>; 325724ba675SRob Herring regulator-boot-on; 326724ba675SRob Herring regulator-always-on; 327724ba675SRob Herring }; 328724ba675SRob Herring 329724ba675SRob Herring dcdc3_reg: regulator@2 { 330724ba675SRob Herring /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */ 331724ba675SRob Herring regulator-name = "vdd_core"; 332724ba675SRob Herring regulator-min-microvolt = <925000>; 333724ba675SRob Herring regulator-max-microvolt = <1150000>; 334724ba675SRob Herring regulator-boot-on; 335724ba675SRob Herring regulator-always-on; 336724ba675SRob Herring }; 337724ba675SRob Herring 338724ba675SRob Herring ldo1_reg: regulator@3 { 339724ba675SRob Herring regulator-name = "vio,vrtc,vdds"; 340724ba675SRob Herring regulator-always-on; 341724ba675SRob Herring }; 342724ba675SRob Herring 343724ba675SRob Herring ldo2_reg: regulator@4 { 344724ba675SRob Herring regulator-name = "vdd_3v3aux"; 345724ba675SRob Herring regulator-always-on; 346724ba675SRob Herring }; 347724ba675SRob Herring 348724ba675SRob Herring ldo3_reg: regulator@5 { 349724ba675SRob Herring regulator-name = "vdd_1v8"; 350724ba675SRob Herring regulator-always-on; 351724ba675SRob Herring }; 352724ba675SRob Herring 353724ba675SRob Herring ldo4_reg: regulator@6 { 354724ba675SRob Herring regulator-name = "vdd_3v3a"; 355724ba675SRob Herring regulator-always-on; 356724ba675SRob Herring }; 357724ba675SRob Herring }; 358724ba675SRob Herring}; 359724ba675SRob Herring 360724ba675SRob Herring&cpsw_port1 { 361724ba675SRob Herring phy-handle = <ðphy0>; 362724ba675SRob Herring phy-mode = "mii"; 363724ba675SRob Herring ti,dual-emac-pvid = <1>; 364724ba675SRob Herring}; 365724ba675SRob Herring 366724ba675SRob Herring&cpsw_port2 { 367724ba675SRob Herring status = "disabled"; 368724ba675SRob Herring}; 369724ba675SRob Herring 370724ba675SRob Herring&mac_sw { 371724ba675SRob Herring pinctrl-names = "default", "sleep"; 372724ba675SRob Herring pinctrl-0 = <&cpsw_default>; 373724ba675SRob Herring pinctrl-1 = <&cpsw_sleep>; 374724ba675SRob Herring status = "okay"; 375724ba675SRob Herring}; 376724ba675SRob Herring 377724ba675SRob Herring&davinci_mdio_sw { 378724ba675SRob Herring pinctrl-names = "default", "sleep"; 379724ba675SRob Herring pinctrl-0 = <&davinci_mdio_default>; 380724ba675SRob Herring pinctrl-1 = <&davinci_mdio_sleep>; 381724ba675SRob Herring 382724ba675SRob Herring ethphy0: ethernet-phy@0 { 383724ba675SRob Herring reg = <0>; 384*623cef65SShengyu Qu /* Support GPIO reset on revision C3 boards */ 385*623cef65SShengyu Qu reset-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; 386*623cef65SShengyu Qu reset-assert-us = <300>; 387*623cef65SShengyu Qu reset-deassert-us = <6500>; 388724ba675SRob Herring }; 389724ba675SRob Herring}; 390724ba675SRob Herring 391724ba675SRob Herring&mmc1 { 392724ba675SRob Herring status = "okay"; 393724ba675SRob Herring bus-width = <0x4>; 394724ba675SRob Herring pinctrl-names = "default"; 395724ba675SRob Herring pinctrl-0 = <&mmc1_pins>; 396724ba675SRob Herring cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; 397724ba675SRob Herring}; 398724ba675SRob Herring 399724ba675SRob Herring&aes { 400724ba675SRob Herring status = "okay"; 401724ba675SRob Herring}; 402724ba675SRob Herring 403724ba675SRob Herring&sham { 404724ba675SRob Herring status = "okay"; 405724ba675SRob Herring}; 406724ba675SRob Herring 407724ba675SRob Herring&rtc { 408724ba675SRob Herring clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>; 409724ba675SRob Herring clock-names = "ext-clk", "int-clk"; 410724ba675SRob Herring system-power-controller; 411724ba675SRob Herring}; 412724ba675SRob Herring 413724ba675SRob Herring&pruss_tm { 414724ba675SRob Herring status = "okay"; 415724ba675SRob Herring}; 416724ba675SRob Herring 417724ba675SRob Herring&wkup_m3_ipc { 418724ba675SRob Herring firmware-name = "am335x-bone-scale-data.bin"; 419724ba675SRob Herring}; 420