xref: /linux/scripts/dtc/include-prefixes/arm/ti/keystone/keystone-k2e.dtsi (revision 79790b6818e96c58fe2bffee1b418c16e64e7b80)
1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2724ba675SRob Herring/*
3724ba675SRob Herring * Keystone 2 Edison soc device tree
4724ba675SRob Herring *
5*11621bedSNishanth Menon * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/
6724ba675SRob Herring */
7724ba675SRob Herring
8724ba675SRob Herring#include <dt-bindings/reset/ti-syscon.h>
9724ba675SRob Herring
10724ba675SRob Herring/ {
11724ba675SRob Herring	compatible = "ti,k2e", "ti,keystone";
12724ba675SRob Herring	model = "Texas Instruments Keystone 2 Edison SoC";
13724ba675SRob Herring
14724ba675SRob Herring	cpus {
15724ba675SRob Herring		#address-cells = <1>;
16724ba675SRob Herring		#size-cells = <0>;
17724ba675SRob Herring
18724ba675SRob Herring		interrupt-parent = <&gic>;
19724ba675SRob Herring
20724ba675SRob Herring		cpu@0 {
21724ba675SRob Herring			compatible = "arm,cortex-a15";
22724ba675SRob Herring			device_type = "cpu";
23724ba675SRob Herring			reg = <0>;
24724ba675SRob Herring		};
25724ba675SRob Herring
26724ba675SRob Herring		cpu@1 {
27724ba675SRob Herring			compatible = "arm,cortex-a15";
28724ba675SRob Herring			device_type = "cpu";
29724ba675SRob Herring			reg = <1>;
30724ba675SRob Herring		};
31724ba675SRob Herring
32724ba675SRob Herring		cpu@2 {
33724ba675SRob Herring			compatible = "arm,cortex-a15";
34724ba675SRob Herring			device_type = "cpu";
35724ba675SRob Herring			reg = <2>;
36724ba675SRob Herring		};
37724ba675SRob Herring
38724ba675SRob Herring		cpu@3 {
39724ba675SRob Herring			compatible = "arm,cortex-a15";
40724ba675SRob Herring			device_type = "cpu";
41724ba675SRob Herring			reg = <3>;
42724ba675SRob Herring		};
43724ba675SRob Herring	};
44724ba675SRob Herring
45724ba675SRob Herring	aliases {
46724ba675SRob Herring		rproc0 = &dsp0;
47724ba675SRob Herring	};
48724ba675SRob Herring};
49724ba675SRob Herring
50724ba675SRob Herring&soc0 {
51724ba675SRob Herring		/include/ "keystone-k2e-clocks.dtsi"
52724ba675SRob Herring
53724ba675SRob Herring		usb: usb@2680000 {
54724ba675SRob Herring			interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
55724ba675SRob Herring			usb@2690000 {
56724ba675SRob Herring				interrupts = <GIC_SPI 152 IRQ_TYPE_EDGE_RISING>;
57724ba675SRob Herring			};
58724ba675SRob Herring		};
59724ba675SRob Herring
60724ba675SRob Herring		usb1_phy: usb_phy@2620750 {
61724ba675SRob Herring			compatible = "ti,keystone-usbphy";
62724ba675SRob Herring			#address-cells = <1>;
63724ba675SRob Herring			#size-cells = <1>;
64724ba675SRob Herring			reg = <0x2620750 24>;
65724ba675SRob Herring			status = "disabled";
66724ba675SRob Herring		};
67724ba675SRob Herring
68724ba675SRob Herring		keystone_usb1: usb@25000000 {
69724ba675SRob Herring			compatible = "ti,keystone-dwc3";
70724ba675SRob Herring			#address-cells = <1>;
71724ba675SRob Herring			#size-cells = <1>;
72724ba675SRob Herring			reg = <0x25000000 0x10000>;
73724ba675SRob Herring			clocks = <&clkusb1>;
74724ba675SRob Herring			clock-names = "usb";
75724ba675SRob Herring			interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
76724ba675SRob Herring			ranges;
77724ba675SRob Herring			dma-coherent;
78724ba675SRob Herring			dma-ranges;
79724ba675SRob Herring			status = "disabled";
80724ba675SRob Herring
81724ba675SRob Herring			usb1: usb@25010000 {
82724ba675SRob Herring				compatible = "snps,dwc3";
83724ba675SRob Herring				reg = <0x25010000 0x70000>;
84724ba675SRob Herring				interrupts = <GIC_SPI 414 IRQ_TYPE_EDGE_RISING>;
85724ba675SRob Herring				usb-phy = <&usb1_phy>, <&usb1_phy>;
86724ba675SRob Herring			};
87724ba675SRob Herring		};
88724ba675SRob Herring
89724ba675SRob Herring		msm_ram: sram@c000000 {
90724ba675SRob Herring			compatible = "mmio-sram";
91724ba675SRob Herring			reg = <0x0c000000 0x200000>;
92724ba675SRob Herring			ranges = <0x0 0x0c000000 0x200000>;
93724ba675SRob Herring			#address-cells = <1>;
94724ba675SRob Herring			#size-cells = <1>;
95724ba675SRob Herring
96724ba675SRob Herring			bm-sram@1f0000 {
97724ba675SRob Herring				reg = <0x001f0000 0x8000>;
98724ba675SRob Herring			};
99724ba675SRob Herring		};
100724ba675SRob Herring
101724ba675SRob Herring		psc: power-sleep-controller@2350000 {
102724ba675SRob Herring			pscrst: reset-controller {
103724ba675SRob Herring				compatible = "ti,k2e-pscrst", "ti,syscon-reset";
104724ba675SRob Herring				#reset-cells = <1>;
105724ba675SRob Herring
106724ba675SRob Herring				ti,reset-bits = <
107724ba675SRob Herring					0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */
108724ba675SRob Herring				>;
109724ba675SRob Herring			};
110724ba675SRob Herring		};
111724ba675SRob Herring
112724ba675SRob Herring		devctrl: device-state-control@2620000 {
113724ba675SRob Herring			dspgpio0: keystone_dsp_gpio@240 {
114724ba675SRob Herring				compatible = "ti,keystone-dsp-gpio";
115724ba675SRob Herring				reg = <0x240 0x4>;
116724ba675SRob Herring				gpio-controller;
117724ba675SRob Herring				#gpio-cells = <2>;
118724ba675SRob Herring				gpio,syscon-dev = <&devctrl 0x240>;
119724ba675SRob Herring			};
120724ba675SRob Herring		};
121724ba675SRob Herring
122724ba675SRob Herring		dsp0: dsp@10800000 {
123724ba675SRob Herring			compatible = "ti,k2e-dsp";
124724ba675SRob Herring			reg = <0x10800000 0x00080000>,
125724ba675SRob Herring			      <0x10e00000 0x00008000>,
126724ba675SRob Herring			      <0x10f00000 0x00008000>;
127724ba675SRob Herring			reg-names = "l2sram", "l1pram", "l1dram";
128724ba675SRob Herring			clocks = <&clkgem0>;
129724ba675SRob Herring			ti,syscon-dev = <&devctrl 0x844>;
130724ba675SRob Herring			resets = <&pscrst 0>;
131724ba675SRob Herring			interrupt-parent = <&kirq0>;
132724ba675SRob Herring			interrupts = <0 8>;
133724ba675SRob Herring			interrupt-names = "vring", "exception";
134724ba675SRob Herring			kick-gpios = <&dspgpio0 27 0>;
135724ba675SRob Herring			status = "disabled";
136724ba675SRob Herring		};
137724ba675SRob Herring
138724ba675SRob Herring		pcie1: pcie@21020000 {
139724ba675SRob Herring			compatible = "ti,keystone-pcie","snps,dw-pcie";
140724ba675SRob Herring			clocks = <&clkpcie1>;
141724ba675SRob Herring			clock-names = "pcie";
142724ba675SRob Herring			#address-cells = <3>;
143724ba675SRob Herring			#size-cells = <2>;
144724ba675SRob Herring			reg = <0x21021000 0x2000>, <0x21020000 0x1000>, <0x02620128 4>;
145724ba675SRob Herring			ranges = <0x82000000 0 0x60000000 0x60000000
146724ba675SRob Herring				  0 0x10000000>;
147724ba675SRob Herring
148724ba675SRob Herring			status = "disabled";
149724ba675SRob Herring			device_type = "pci";
150724ba675SRob Herring			num-lanes = <2>;
151724ba675SRob Herring			bus-range = <0x00 0xff>;
152724ba675SRob Herring
153724ba675SRob Herring			/* error interrupt */
154724ba675SRob Herring			interrupts = <GIC_SPI 385 IRQ_TYPE_EDGE_RISING>;
155724ba675SRob Herring			#interrupt-cells = <1>;
156724ba675SRob Herring			interrupt-map-mask = <0 0 0 7>;
157724ba675SRob Herring			interrupt-map = <0 0 0 1 &pcie_intc1 0>, /* INT A */
158724ba675SRob Herring					<0 0 0 2 &pcie_intc1 1>, /* INT B */
159724ba675SRob Herring					<0 0 0 3 &pcie_intc1 2>, /* INT C */
160724ba675SRob Herring					<0 0 0 4 &pcie_intc1 3>; /* INT D */
161724ba675SRob Herring
162724ba675SRob Herring			pcie_msi_intc1: msi-interrupt-controller {
163724ba675SRob Herring				interrupt-controller;
164724ba675SRob Herring				#interrupt-cells = <1>;
165724ba675SRob Herring				interrupt-parent = <&gic>;
166724ba675SRob Herring				interrupts = <GIC_SPI 377 IRQ_TYPE_EDGE_RISING>,
167724ba675SRob Herring					<GIC_SPI 378 IRQ_TYPE_EDGE_RISING>,
168724ba675SRob Herring					<GIC_SPI 379 IRQ_TYPE_EDGE_RISING>,
169724ba675SRob Herring					<GIC_SPI 380 IRQ_TYPE_EDGE_RISING>,
170724ba675SRob Herring					<GIC_SPI 381 IRQ_TYPE_EDGE_RISING>,
171724ba675SRob Herring					<GIC_SPI 382 IRQ_TYPE_EDGE_RISING>,
172724ba675SRob Herring					<GIC_SPI 383 IRQ_TYPE_EDGE_RISING>,
173724ba675SRob Herring					<GIC_SPI 384 IRQ_TYPE_EDGE_RISING>;
174724ba675SRob Herring			};
175724ba675SRob Herring
176724ba675SRob Herring			pcie_intc1: legacy-interrupt-controller {
177724ba675SRob Herring				interrupt-controller;
178724ba675SRob Herring				#interrupt-cells = <1>;
179724ba675SRob Herring				interrupt-parent = <&gic>;
180724ba675SRob Herring				interrupts = <GIC_SPI 373 IRQ_TYPE_EDGE_RISING>,
181724ba675SRob Herring					<GIC_SPI 374 IRQ_TYPE_EDGE_RISING>,
182724ba675SRob Herring					<GIC_SPI 375 IRQ_TYPE_EDGE_RISING>,
183724ba675SRob Herring					<GIC_SPI 376 IRQ_TYPE_EDGE_RISING>;
184724ba675SRob Herring			};
185724ba675SRob Herring		};
186724ba675SRob Herring
187724ba675SRob Herring		mdio: mdio@24200f00 {
188724ba675SRob Herring			compatible = "ti,keystone_mdio", "ti,davinci_mdio";
189724ba675SRob Herring			#address-cells = <1>;
190724ba675SRob Herring			#size-cells = <0>;
191724ba675SRob Herring			reg = <0x24200f00 0x100>;
192724ba675SRob Herring			status = "disabled";
193724ba675SRob Herring			clocks = <&clkcpgmac>;
194724ba675SRob Herring			clock-names = "fck";
195724ba675SRob Herring			bus_freq = <2500000>;
196724ba675SRob Herring		};
197724ba675SRob Herring		/include/ "keystone-k2e-netcp.dtsi"
198724ba675SRob Herring};
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