xref: /linux/scripts/dtc/include-prefixes/arm/ti/keystone/keystone-clocks.dtsi (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree Source for Keystone 2 clock tree
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
6*724ba675SRob Herring */
7*724ba675SRob Herring
8*724ba675SRob Herringclocks {
9*724ba675SRob Herring	#address-cells = <1>;
10*724ba675SRob Herring	#size-cells = <1>;
11*724ba675SRob Herring	ranges;
12*724ba675SRob Herring
13*724ba675SRob Herring	mainmuxclk: mainmuxclk@2310108 {
14*724ba675SRob Herring		#clock-cells = <0>;
15*724ba675SRob Herring		compatible = "ti,keystone,pll-mux-clock";
16*724ba675SRob Herring		clocks = <&mainpllclk>, <&refclksys>;
17*724ba675SRob Herring		reg = <0x02310108 4>;
18*724ba675SRob Herring		bit-shift = <23>;
19*724ba675SRob Herring		bit-mask = <1>;
20*724ba675SRob Herring		clock-output-names = "mainmuxclk";
21*724ba675SRob Herring	};
22*724ba675SRob Herring
23*724ba675SRob Herring	chipclk1: chipclk1 {
24*724ba675SRob Herring		#clock-cells = <0>;
25*724ba675SRob Herring		compatible = "fixed-factor-clock";
26*724ba675SRob Herring		clocks = <&mainmuxclk>;
27*724ba675SRob Herring		clock-div = <1>;
28*724ba675SRob Herring		clock-mult = <1>;
29*724ba675SRob Herring		clock-output-names = "chipclk1";
30*724ba675SRob Herring	};
31*724ba675SRob Herring
32*724ba675SRob Herring	chipclk1rstiso: chipclk1rstiso {
33*724ba675SRob Herring		#clock-cells = <0>;
34*724ba675SRob Herring		compatible = "fixed-factor-clock";
35*724ba675SRob Herring		clocks = <&mainmuxclk>;
36*724ba675SRob Herring		clock-div = <1>;
37*724ba675SRob Herring		clock-mult = <1>;
38*724ba675SRob Herring		clock-output-names = "chipclk1rstiso";
39*724ba675SRob Herring	};
40*724ba675SRob Herring
41*724ba675SRob Herring	gemtraceclk: gemtraceclk@2310120 {
42*724ba675SRob Herring		#clock-cells = <0>;
43*724ba675SRob Herring		compatible = "ti,keystone,pll-divider-clock";
44*724ba675SRob Herring		clocks = <&mainmuxclk>;
45*724ba675SRob Herring		reg = <0x02310120 4>;
46*724ba675SRob Herring		bit-shift = <0>;
47*724ba675SRob Herring		bit-mask = <8>;
48*724ba675SRob Herring		clock-output-names = "gemtraceclk";
49*724ba675SRob Herring	};
50*724ba675SRob Herring
51*724ba675SRob Herring	chipstmxptclk: chipstmxptclk@2310164 {
52*724ba675SRob Herring		#clock-cells = <0>;
53*724ba675SRob Herring		compatible = "ti,keystone,pll-divider-clock";
54*724ba675SRob Herring		clocks = <&mainmuxclk>;
55*724ba675SRob Herring		reg = <0x02310164 4>;
56*724ba675SRob Herring		bit-shift = <0>;
57*724ba675SRob Herring		bit-mask = <8>;
58*724ba675SRob Herring		clock-output-names = "chipstmxptclk";
59*724ba675SRob Herring	};
60*724ba675SRob Herring
61*724ba675SRob Herring	chipclk12: chipclk12 {
62*724ba675SRob Herring		#clock-cells = <0>;
63*724ba675SRob Herring		compatible = "fixed-factor-clock";
64*724ba675SRob Herring		clocks = <&chipclk1>;
65*724ba675SRob Herring		clock-div = <2>;
66*724ba675SRob Herring		clock-mult = <1>;
67*724ba675SRob Herring		clock-output-names = "chipclk12";
68*724ba675SRob Herring	};
69*724ba675SRob Herring
70*724ba675SRob Herring	chipclk13: chipclk13 {
71*724ba675SRob Herring		#clock-cells = <0>;
72*724ba675SRob Herring		compatible = "fixed-factor-clock";
73*724ba675SRob Herring		clocks = <&chipclk1>;
74*724ba675SRob Herring		clock-div = <3>;
75*724ba675SRob Herring		clock-mult = <1>;
76*724ba675SRob Herring		clock-output-names = "chipclk13";
77*724ba675SRob Herring	};
78*724ba675SRob Herring
79*724ba675SRob Herring	paclk13: paclk13 {
80*724ba675SRob Herring		#clock-cells = <0>;
81*724ba675SRob Herring		compatible = "fixed-factor-clock";
82*724ba675SRob Herring		clocks = <&papllclk>;
83*724ba675SRob Herring		clock-div = <3>;
84*724ba675SRob Herring		clock-mult = <1>;
85*724ba675SRob Herring		clock-output-names = "paclk13";
86*724ba675SRob Herring	};
87*724ba675SRob Herring
88*724ba675SRob Herring	chipclk14: chipclk14 {
89*724ba675SRob Herring		#clock-cells = <0>;
90*724ba675SRob Herring		compatible = "fixed-factor-clock";
91*724ba675SRob Herring		clocks = <&chipclk1>;
92*724ba675SRob Herring		clock-div = <4>;
93*724ba675SRob Herring		clock-mult = <1>;
94*724ba675SRob Herring		clock-output-names = "chipclk14";
95*724ba675SRob Herring	};
96*724ba675SRob Herring
97*724ba675SRob Herring	chipclk16: chipclk16 {
98*724ba675SRob Herring		#clock-cells = <0>;
99*724ba675SRob Herring		compatible = "fixed-factor-clock";
100*724ba675SRob Herring		clocks = <&chipclk1>;
101*724ba675SRob Herring		clock-div = <6>;
102*724ba675SRob Herring		clock-mult = <1>;
103*724ba675SRob Herring		clock-output-names = "chipclk16";
104*724ba675SRob Herring	};
105*724ba675SRob Herring
106*724ba675SRob Herring	chipclk112: chipclk112 {
107*724ba675SRob Herring		#clock-cells = <0>;
108*724ba675SRob Herring		compatible = "fixed-factor-clock";
109*724ba675SRob Herring		clocks = <&chipclk1>;
110*724ba675SRob Herring		clock-div = <12>;
111*724ba675SRob Herring		clock-mult = <1>;
112*724ba675SRob Herring		clock-output-names = "chipclk112";
113*724ba675SRob Herring	};
114*724ba675SRob Herring
115*724ba675SRob Herring	chipclk124: chipclk124 {
116*724ba675SRob Herring		#clock-cells = <0>;
117*724ba675SRob Herring		compatible = "fixed-factor-clock";
118*724ba675SRob Herring		clocks = <&chipclk1>;
119*724ba675SRob Herring		clock-div = <24>;
120*724ba675SRob Herring		clock-mult = <1>;
121*724ba675SRob Herring		clock-output-names = "chipclk114";
122*724ba675SRob Herring	};
123*724ba675SRob Herring
124*724ba675SRob Herring	chipclk1rstiso13: chipclk1rstiso13 {
125*724ba675SRob Herring		#clock-cells = <0>;
126*724ba675SRob Herring		compatible = "fixed-factor-clock";
127*724ba675SRob Herring		clocks = <&chipclk1rstiso>;
128*724ba675SRob Herring		clock-div = <3>;
129*724ba675SRob Herring		clock-mult = <1>;
130*724ba675SRob Herring		clock-output-names = "chipclk1rstiso13";
131*724ba675SRob Herring	};
132*724ba675SRob Herring
133*724ba675SRob Herring	chipclk1rstiso14: chipclk1rstiso14 {
134*724ba675SRob Herring		#clock-cells = <0>;
135*724ba675SRob Herring		compatible = "fixed-factor-clock";
136*724ba675SRob Herring		clocks = <&chipclk1rstiso>;
137*724ba675SRob Herring		clock-div = <4>;
138*724ba675SRob Herring		clock-mult = <1>;
139*724ba675SRob Herring		clock-output-names = "chipclk1rstiso14";
140*724ba675SRob Herring	};
141*724ba675SRob Herring
142*724ba675SRob Herring	chipclk1rstiso16: chipclk1rstiso16 {
143*724ba675SRob Herring		#clock-cells = <0>;
144*724ba675SRob Herring		compatible = "fixed-factor-clock";
145*724ba675SRob Herring		clocks = <&chipclk1rstiso>;
146*724ba675SRob Herring		clock-div = <6>;
147*724ba675SRob Herring		clock-mult = <1>;
148*724ba675SRob Herring		clock-output-names = "chipclk1rstiso16";
149*724ba675SRob Herring	};
150*724ba675SRob Herring
151*724ba675SRob Herring	chipclk1rstiso112: chipclk1rstiso112 {
152*724ba675SRob Herring		#clock-cells = <0>;
153*724ba675SRob Herring		compatible = "fixed-factor-clock";
154*724ba675SRob Herring		clocks = <&chipclk1rstiso>;
155*724ba675SRob Herring		clock-div = <12>;
156*724ba675SRob Herring		clock-mult = <1>;
157*724ba675SRob Herring		clock-output-names = "chipclk1rstiso112";
158*724ba675SRob Herring	};
159*724ba675SRob Herring
160*724ba675SRob Herring	clkmodrst0: clkmodrst0@2350000 {
161*724ba675SRob Herring		#clock-cells = <0>;
162*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
163*724ba675SRob Herring		clocks = <&chipclk16>;
164*724ba675SRob Herring		clock-output-names = "modrst0";
165*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
166*724ba675SRob Herring		reg-names = "control", "domain";
167*724ba675SRob Herring		domain-id = <0>;
168*724ba675SRob Herring	};
169*724ba675SRob Herring
170*724ba675SRob Herring
171*724ba675SRob Herring	clkusb: clkusb@2350008 {
172*724ba675SRob Herring		#clock-cells = <0>;
173*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
174*724ba675SRob Herring		clocks = <&chipclk16>;
175*724ba675SRob Herring		clock-output-names = "usb";
176*724ba675SRob Herring		reg = <0x02350008 0xb00>, <0x02350000 0x400>;
177*724ba675SRob Herring		reg-names = "control", "domain";
178*724ba675SRob Herring		domain-id = <0>;
179*724ba675SRob Herring	};
180*724ba675SRob Herring
181*724ba675SRob Herring	clkaemifspi: clkaemifspi@235000c {
182*724ba675SRob Herring		#clock-cells = <0>;
183*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
184*724ba675SRob Herring		clocks = <&chipclk16>;
185*724ba675SRob Herring		clock-output-names = "aemif-spi";
186*724ba675SRob Herring		reg = <0x0235000c 0xb00>, <0x02350000 0x400>;
187*724ba675SRob Herring		reg-names = "control", "domain";
188*724ba675SRob Herring		domain-id = <0>;
189*724ba675SRob Herring	};
190*724ba675SRob Herring
191*724ba675SRob Herring
192*724ba675SRob Herring	clkdebugsstrc: clkdebugsstrc@2350014 {
193*724ba675SRob Herring		#clock-cells = <0>;
194*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
195*724ba675SRob Herring		clocks = <&chipclk13>;
196*724ba675SRob Herring		clock-output-names = "debugss-trc";
197*724ba675SRob Herring		reg = <0x02350014 0xb00>, <0x02350000 0x400>;
198*724ba675SRob Herring		reg-names = "control", "domain";
199*724ba675SRob Herring		domain-id = <1>;
200*724ba675SRob Herring	};
201*724ba675SRob Herring
202*724ba675SRob Herring	clktetbtrc: clktetbtrc@2350018 {
203*724ba675SRob Herring		#clock-cells = <0>;
204*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
205*724ba675SRob Herring		clocks = <&chipclk13>;
206*724ba675SRob Herring		clock-output-names = "tetb-trc";
207*724ba675SRob Herring		reg = <0x02350018 0xb00>, <0x02350004 0x400>;
208*724ba675SRob Herring		reg-names = "control", "domain";
209*724ba675SRob Herring		domain-id = <1>;
210*724ba675SRob Herring	};
211*724ba675SRob Herring
212*724ba675SRob Herring	clkpa: clkpa@235001c {
213*724ba675SRob Herring		#clock-cells = <0>;
214*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
215*724ba675SRob Herring		clocks = <&paclk13>;
216*724ba675SRob Herring		clock-output-names = "pa";
217*724ba675SRob Herring		reg = <0x0235001c 0xb00>, <0x02350008 0x400>;
218*724ba675SRob Herring		reg-names = "control", "domain";
219*724ba675SRob Herring		domain-id = <2>;
220*724ba675SRob Herring	};
221*724ba675SRob Herring
222*724ba675SRob Herring	clkcpgmac: clkcpgmac@2350020 {
223*724ba675SRob Herring		#clock-cells = <0>;
224*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
225*724ba675SRob Herring		clocks = <&clkpa>;
226*724ba675SRob Herring		clock-output-names = "cpgmac";
227*724ba675SRob Herring		reg = <0x02350020 0xb00>, <0x02350008 0x400>;
228*724ba675SRob Herring		reg-names = "control", "domain";
229*724ba675SRob Herring		domain-id = <2>;
230*724ba675SRob Herring	};
231*724ba675SRob Herring
232*724ba675SRob Herring	clksa: clksa@2350024 {
233*724ba675SRob Herring		#clock-cells = <0>;
234*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
235*724ba675SRob Herring		clocks = <&clkpa>;
236*724ba675SRob Herring		clock-output-names = "sa";
237*724ba675SRob Herring		reg = <0x02350024 0xb00>, <0x02350008 0x400>;
238*724ba675SRob Herring		reg-names = "control", "domain";
239*724ba675SRob Herring		domain-id = <2>;
240*724ba675SRob Herring	};
241*724ba675SRob Herring
242*724ba675SRob Herring	clkpcie: clkpcie@2350028 {
243*724ba675SRob Herring		#clock-cells = <0>;
244*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
245*724ba675SRob Herring		clocks = <&chipclk12>;
246*724ba675SRob Herring		clock-output-names = "pcie";
247*724ba675SRob Herring		reg = <0x02350028 0xb00>, <0x0235000c 0x400>;
248*724ba675SRob Herring		reg-names = "control", "domain";
249*724ba675SRob Herring		domain-id = <3>;
250*724ba675SRob Herring	};
251*724ba675SRob Herring
252*724ba675SRob Herring	clksr: clksr@2350034 {
253*724ba675SRob Herring		#clock-cells = <0>;
254*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
255*724ba675SRob Herring		clocks = <&chipclk1rstiso112>;
256*724ba675SRob Herring		clock-output-names = "sr";
257*724ba675SRob Herring		reg = <0x02350034 0xb00>, <0x02350018 0x400>;
258*724ba675SRob Herring		reg-names = "control", "domain";
259*724ba675SRob Herring		domain-id = <6>;
260*724ba675SRob Herring	};
261*724ba675SRob Herring
262*724ba675SRob Herring	clkgem0: clkgem0@235003c {
263*724ba675SRob Herring		#clock-cells = <0>;
264*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
265*724ba675SRob Herring		clocks = <&chipclk1>;
266*724ba675SRob Herring		clock-output-names = "gem0";
267*724ba675SRob Herring		reg = <0x0235003c 0xb00>, <0x02350020 0x400>;
268*724ba675SRob Herring		reg-names = "control", "domain";
269*724ba675SRob Herring		domain-id = <8>;
270*724ba675SRob Herring	};
271*724ba675SRob Herring
272*724ba675SRob Herring	clkddr30: clkddr30@235005c {
273*724ba675SRob Herring		#clock-cells = <0>;
274*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
275*724ba675SRob Herring		clocks = <&chipclk12>;
276*724ba675SRob Herring		clock-output-names = "ddr3-0";
277*724ba675SRob Herring		reg = <0x0235005c 0xb00>, <0x02350040 0x400>;
278*724ba675SRob Herring		reg-names = "control", "domain";
279*724ba675SRob Herring		domain-id = <16>;
280*724ba675SRob Herring	};
281*724ba675SRob Herring
282*724ba675SRob Herring	clkwdtimer0: clkwdtimer0@2350000 {
283*724ba675SRob Herring		#clock-cells = <0>;
284*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
285*724ba675SRob Herring		clocks = <&clkmodrst0>;
286*724ba675SRob Herring		clock-output-names = "timer0";
287*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
288*724ba675SRob Herring		reg-names = "control", "domain";
289*724ba675SRob Herring		domain-id = <0>;
290*724ba675SRob Herring	};
291*724ba675SRob Herring
292*724ba675SRob Herring	clkwdtimer1: clkwdtimer1@2350000 {
293*724ba675SRob Herring		#clock-cells = <0>;
294*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
295*724ba675SRob Herring		clocks = <&clkmodrst0>;
296*724ba675SRob Herring		clock-output-names = "timer1";
297*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
298*724ba675SRob Herring		reg-names = "control", "domain";
299*724ba675SRob Herring		domain-id = <0>;
300*724ba675SRob Herring	};
301*724ba675SRob Herring
302*724ba675SRob Herring	clkwdtimer2: clkwdtimer2@2350000 {
303*724ba675SRob Herring		#clock-cells = <0>;
304*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
305*724ba675SRob Herring		clocks = <&clkmodrst0>;
306*724ba675SRob Herring		clock-output-names = "timer2";
307*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
308*724ba675SRob Herring		reg-names = "control", "domain";
309*724ba675SRob Herring		domain-id = <0>;
310*724ba675SRob Herring	};
311*724ba675SRob Herring
312*724ba675SRob Herring	clkwdtimer3: clkwdtimer3@2350000 {
313*724ba675SRob Herring		#clock-cells = <0>;
314*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
315*724ba675SRob Herring		clocks = <&clkmodrst0>;
316*724ba675SRob Herring		clock-output-names = "timer3";
317*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
318*724ba675SRob Herring		reg-names = "control", "domain";
319*724ba675SRob Herring		domain-id = <0>;
320*724ba675SRob Herring	};
321*724ba675SRob Herring
322*724ba675SRob Herring	clktimer15: clktimer15@2350000 {
323*724ba675SRob Herring		#clock-cells = <0>;
324*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
325*724ba675SRob Herring		clocks = <&clkmodrst0>;
326*724ba675SRob Herring		clock-output-names = "timer15";
327*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
328*724ba675SRob Herring		reg-names = "control", "domain";
329*724ba675SRob Herring		domain-id = <0>;
330*724ba675SRob Herring	};
331*724ba675SRob Herring
332*724ba675SRob Herring	clkuart0: clkuart0@2350000 {
333*724ba675SRob Herring		#clock-cells = <0>;
334*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
335*724ba675SRob Herring		clocks = <&clkmodrst0>;
336*724ba675SRob Herring		clock-output-names = "uart0";
337*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
338*724ba675SRob Herring		reg-names = "control", "domain";
339*724ba675SRob Herring		domain-id = <0>;
340*724ba675SRob Herring	};
341*724ba675SRob Herring
342*724ba675SRob Herring	clkuart1: clkuart1@2350000 {
343*724ba675SRob Herring		#clock-cells = <0>;
344*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
345*724ba675SRob Herring		clocks = <&clkmodrst0>;
346*724ba675SRob Herring		clock-output-names = "uart1";
347*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
348*724ba675SRob Herring		reg-names = "control", "domain";
349*724ba675SRob Herring		domain-id = <0>;
350*724ba675SRob Herring	};
351*724ba675SRob Herring
352*724ba675SRob Herring	clkaemif: clkaemif@2350000 {
353*724ba675SRob Herring		#clock-cells = <0>;
354*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
355*724ba675SRob Herring		clocks = <&clkaemifspi>;
356*724ba675SRob Herring		clock-output-names = "aemif";
357*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
358*724ba675SRob Herring		reg-names = "control", "domain";
359*724ba675SRob Herring		domain-id = <0>;
360*724ba675SRob Herring	};
361*724ba675SRob Herring
362*724ba675SRob Herring	clkusim: clkusim@2350000 {
363*724ba675SRob Herring		#clock-cells = <0>;
364*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
365*724ba675SRob Herring		clocks = <&clkmodrst0>;
366*724ba675SRob Herring		clock-output-names = "usim";
367*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
368*724ba675SRob Herring		reg-names = "control", "domain";
369*724ba675SRob Herring		domain-id = <0>;
370*724ba675SRob Herring	};
371*724ba675SRob Herring
372*724ba675SRob Herring	clki2c: clki2c@2350000 {
373*724ba675SRob Herring		#clock-cells = <0>;
374*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
375*724ba675SRob Herring		clocks = <&clkmodrst0>;
376*724ba675SRob Herring		clock-output-names = "i2c";
377*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
378*724ba675SRob Herring		reg-names = "control", "domain";
379*724ba675SRob Herring		domain-id = <0>;
380*724ba675SRob Herring	};
381*724ba675SRob Herring
382*724ba675SRob Herring	clkspi: clkspi@2350000 {
383*724ba675SRob Herring		#clock-cells = <0>;
384*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
385*724ba675SRob Herring		clocks = <&clkaemifspi>;
386*724ba675SRob Herring		clock-output-names = "spi";
387*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
388*724ba675SRob Herring		reg-names = "control", "domain";
389*724ba675SRob Herring		domain-id = <0>;
390*724ba675SRob Herring	};
391*724ba675SRob Herring
392*724ba675SRob Herring	clkgpio: clkgpio@2350000 {
393*724ba675SRob Herring		#clock-cells = <0>;
394*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
395*724ba675SRob Herring		clocks = <&clkmodrst0>;
396*724ba675SRob Herring		clock-output-names = "gpio";
397*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
398*724ba675SRob Herring		reg-names = "control", "domain";
399*724ba675SRob Herring		domain-id = <0>;
400*724ba675SRob Herring	};
401*724ba675SRob Herring
402*724ba675SRob Herring	clkkeymgr: clkkeymgr@2350000 {
403*724ba675SRob Herring		#clock-cells = <0>;
404*724ba675SRob Herring		compatible = "ti,keystone,psc-clock";
405*724ba675SRob Herring		clocks = <&clkmodrst0>;
406*724ba675SRob Herring		clock-output-names = "keymgr";
407*724ba675SRob Herring		reg = <0x02350000 0xb00>, <0x02350000 0x400>;
408*724ba675SRob Herring		reg-names = "control", "domain";
409*724ba675SRob Herring		domain-id = <0>;
410*724ba675SRob Herring	};
411*724ba675SRob Herring
412*724ba675SRob Herring	/*
413*724ba675SRob Herring	 * Below are set of fixed, input clocks definitions,
414*724ba675SRob Herring	 * for which real frequencies have to be defined in board files.
415*724ba675SRob Herring	 * Those clocks can be used as reference clocks for some HW modules
416*724ba675SRob Herring	 * (as cpts, for example) by configuring corresponding clock muxes.
417*724ba675SRob Herring	 */
418*724ba675SRob Herring	timi0: timi0 {
419*724ba675SRob Herring		#clock-cells = <0>;
420*724ba675SRob Herring		compatible = "fixed-clock";
421*724ba675SRob Herring		clock-frequency = <0>;
422*724ba675SRob Herring		clock-output-names = "timi0";
423*724ba675SRob Herring	};
424*724ba675SRob Herring
425*724ba675SRob Herring	timi1: timi1 {
426*724ba675SRob Herring		#clock-cells = <0>;
427*724ba675SRob Herring		compatible = "fixed-clock";
428*724ba675SRob Herring		clock-frequency = <0>;
429*724ba675SRob Herring		clock-output-names = "timi1";
430*724ba675SRob Herring	};
431*724ba675SRob Herring
432*724ba675SRob Herring	tsrefclk: tsrefclk {
433*724ba675SRob Herring		#clock-cells = <0>;
434*724ba675SRob Herring		compatible = "fixed-clock";
435*724ba675SRob Herring		clock-frequency = <0>;
436*724ba675SRob Herring		clock-output-names = "tsrefclk";
437*724ba675SRob Herring	};
438*724ba675SRob Herring};
439