xref: /linux/scripts/dtc/include-prefixes/arm/st/stm32mp15xx-phycore-som.dtsi (revision 0fc8f6200d2313278fbf4539bbab74677c685531)

// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
 * Copyright (C) Phytec GmbH 2019-2020 - All Rights Reserved
 * Author: Dom VOVARD <dom.vovard@linrt.com>
 * Copyright (C) 2022-2023 Steffen Trumtrar <kernel@pengutronix.de>
 * Copyright (C) 2024 PHYTEC Messtechnik GmbH
 * Author: Christophe Parant <c.parant@phytec.fr>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/mfd/st,stpmic1.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "stm32mp15-pinctrl.dtsi"
#include "stm32mp15xxac-pinctrl.dtsi"

/ {

	aliases {
		ethernet0 = &ethernet0;
		rtc0 = &i2c4_rtc;
		rtc1 = &rtc;
	};

	/*
	 * Set the minimum memory size here and
	 * let the bootloader set the real size.
	 */
	memory@c0000000 {
		device_type = "memory";
		reg = <0xc0000000 0x20000000>;
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		mcuram2: mcuram2@10000000 {
			compatible = "shared-dma-pool";
			reg = <0x10000000 0x40000>;
			no-map;
		};

		vdev0vring0: vdev0vring0@10040000 {
			compatible = "shared-dma-pool";
			reg = <0x10040000 0x1000>;
			no-map;
		};

		vdev0vring1: vdev0vring1@10041000 {
			compatible = "shared-dma-pool";
			reg = <0x10041000 0x1000>;
			no-map;
		};

		vdev0buffer: vdev0buffer@10042000 {
			compatible = "shared-dma-pool";
			reg = <0x10042000 0x4000>;
			no-map;
		};

		mcuram: mcuram@30000000 {
			compatible = "shared-dma-pool";
			reg = <0x30000000 0x40000>;
			no-map;
		};

		retram: retram@38000000 {
			compatible = "shared-dma-pool";
			reg = <0x38000000 0x10000>;
			no-map;
		};
	};

	regulator_vin: regulator {
		compatible = "regulator-fixed";
		regulator-name = "VIN";
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
		regulator-always-on;
	};
};

&ethernet0 {
	pinctrl-0 = <&ethernet0_rgmii_pins_d>;
	pinctrl-1 = <&ethernet0_rgmii_sleep_pins_d>;
	pinctrl-names = "default", "sleep";
	phy-mode = "rgmii-id";
	max-speed = <1000>;
	phy-handle = <&phy0>;
	st,eth-clk-sel;
	status = "okay";

	mdio {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "snps,dwmac-mdio";

		phy0: ethernet-phy@1 {
			compatible = "ethernet-phy-ieee802.3-c22";
			reg = <1>;
			interrupt-parent = <&gpiog>;
			interrupts = <12 IRQ_TYPE_EDGE_FALLING>;
			enet-phy-lane-no-swap;
			ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
			ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
			ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
			ti,min-output-impedance;
			ti,clk-output-sel = <DP83867_CLK_O_SEL_OFF>;
		};
	};
};

&fmc {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&fmc_pins_a>;
	pinctrl-1 = <&fmc_sleep_pins_a>;
	status = "disabled";

	nand-controller@4,0 {
		nand0: nand@0 {
			reg = <0>;
			nand-on-flash-bbt;
			nand-ecc-strength = <4>;
			nand-ecc-step-size = <512>;
		};
	};
};

&i2c4 {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&i2c4_pins_a>;
	pinctrl-1 = <&i2c4_sleep_pins_a>;
	i2c-scl-rising-time-ns = <185>;
	i2c-scl-falling-time-ns = <20>;
	status = "okay";

	pmic@33 {
		compatible = "st,stpmic1";
		reg = <0x33>;
		interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>;
		interrupt-controller;
		#interrupt-cells = <2>;

		regulators {
			compatible = "st,stpmic1-regulators";
			buck1-supply = <&regulator_vin>;
			buck2-supply = <&regulator_vin>;
			buck3-supply = <&regulator_vin>;
			buck4-supply = <&regulator_vin>;
			ldo1-supply = <&v3v3>;
			ldo2-supply = <&v3v3>;
			ldo3-supply = <&vdd_ddr>;
			ldo4-supply = <&regulator_vin>;
			ldo5-supply = <&v3v3>;
			ldo6-supply = <&v3v3>;
			boost-supply = <&regulator_vin>;
			pwr_sw1-supply = <&bst_out>;
			pwr_sw2-supply = <&bst_out>;

			vddcore: buck1 {
				regulator-name = "VDD_CORE";
				regulator-min-microvolt = <1200000>;
				regulator-max-microvolt = <1350000>;
				regulator-always-on;
				regulator-initial-mode = <0>;
			};

			vdd_ddr: buck2 {
				regulator-name = "VDD_DDR";
				regulator-min-microvolt = <1350000>;
				regulator-max-microvolt = <1350000>;
				regulator-always-on;
				regulator-initial-mode = <0>;
			};

			vdd: buck3 {
				regulator-name = "VDD";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
				st,mask-reset;
				regulator-initial-mode = <0>;
			};

			v3v3: buck4 {
				regulator-name = "VDD_BUCK4";
				regulator-min-microvolt = <3300000>;
				regulator-max-microvolt = <3300000>;
				regulator-always-on;
				regulator-initial-mode = <0>;
			};

			v1v8_audio: ldo1 {
				regulator-name = "VDD_LDO1";
				regulator-min-microvolt = <1800000>;
				regulator-max-microvolt = <1800000>;
				regulator-always-on;
				interrupts = <IT_CURLIM_LDO1 0>;

			};

			vdd_eth_2v5: ldo2 {
				regulator-name = "VDD_ETH_2V5";
				regulator-min-microvolt = <2500000>;
				regulator-max-microvolt = <2500000>;
				regulator-always-on;
				interrupts = <IT_CURLIM_LDO2 0>;

			};

			vtt_ddr: ldo3 {
				regulator-name = "VTT_DDR";
				regulator-min-microvolt = <500000>;
				regulator-max-microvolt = <750000>;
				regulator-always-on;
				regulator-over-current-protection;
			};

			vdd_usb: ldo4 {
				regulator-name = "VDD_USB";
				interrupts = <IT_CURLIM_LDO4 0>;
			};

			vdda: ldo5 {
				regulator-name = "VDDA";
				regulator-min-microvolt = <2900000>;
				regulator-max-microvolt = <2900000>;
				interrupts = <IT_CURLIM_LDO5 0>;
				regulator-boot-on;
			};

			vdd_eth_1v0: ldo6 {
				regulator-name = "VDD_ETH_1V0";
				regulator-min-microvolt = <1000000>;
				regulator-max-microvolt = <1000000>;
				regulator-always-on;
				interrupts = <IT_CURLIM_LDO6 0>;

			};

			vref_ddr: vref_ddr {
				regulator-name = "VDD_REFDDR";
				regulator-always-on;
			};

			bst_out: boost {
				regulator-name = "BST_OUT";
				interrupts = <IT_OCP_BOOST 0>;
			};

			vbus_otg: pwr_sw1 {
				regulator-name = "VBUS_OTG";
				interrupts = <IT_OCP_OTG 0>;
				regulator-active-discharge = <1>;
			};

			vbus_sw: pwr_sw2 {
				regulator-name = "VBUS_SW";
				interrupts = <IT_OCP_SWOUT 0>;
				regulator-active-discharge = <1>;
			};
		};

		onkey {
			compatible = "st,stpmic1-onkey";
			interrupts = <IT_PONKEY_F 0>,
				     <IT_PONKEY_R 0>;
			interrupt-names = "onkey-falling",
					  "onkey-rising";
			power-off-time-sec = <10>;
		};

		watchdog {
			compatible = "st,stpmic1-wdt";
		};
	};

	i2c4_eeprom: eeprom@50 {
		compatible = "atmel,24c32";
		reg = <0x50>;
		status = "disabled";
	};

	i2c4_rtc: rtc@52 {
		compatible = "microcrystal,rv3028";
		reg = <0x52>;
		status = "disabled";
	};
};

&ipcc {
	status = "okay";
};

&iwdg2 {
	timeout-sec = <32>;
	status = "okay";
};

&m4_rproc {
	memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
			<&vdev0vring1>, <&vdev0buffer>;
	mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
	mbox-names = "vq0", "vq1", "shutdown", "detach";
	interrupt-parent = <&exti>;
	interrupts = <68 1>;
	status = "okay";
};

&pwr_regulators {
	vdd-supply = <&vdd>;
	vdd_3v3_usbfs-supply = <&vdd_usb>;
};

&qspi {
	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&qspi_clk_pins_a
		     &qspi_bk1_pins_a
		     &qspi_cs1_pins_a>;
	pinctrl-1 = <&qspi_clk_sleep_pins_a
		     &qspi_bk1_sleep_pins_a
		     &qspi_cs1_sleep_pins_a>;
	reg = <0x58003000 0x1000>,
	      <0x70000000 0x1000000>;
	status = "disabled";

	flash0: flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-rx-bus-width = <4>;
		spi-max-frequency = <50000000>;
		m25p,fast-read;
	};
};

&rng1 {
	status = "okay";
};

&rtc {
	status = "okay";
};

&dts {
	status = "okay";
};

&sdmmc2 {
	pinctrl-names = "default", "opendrain", "sleep";
	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_e>;
	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_e>;
	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_e>;
	non-removable;
	no-sd;
	no-sdio;
	bus-width = <8>;
	vmmc-supply = <&v3v3>;
	vqmmc-supply = <&v3v3>;
	mmc-ddr-3_3v;
	st,neg-edge;
	status = "disabled";
};