1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright 2012 Stefan Roese <sr@denx.de> 4724ba675SRob Herring */ 5724ba675SRob Herring 6724ba675SRob Herring/ { 7724ba675SRob Herring #address-cells = <1>; 8724ba675SRob Herring #size-cells = <1>; 9724ba675SRob Herring compatible = "st,spear600"; 10724ba675SRob Herring 11724ba675SRob Herring cpus { 12724ba675SRob Herring #address-cells = <0>; 13724ba675SRob Herring #size-cells = <0>; 14724ba675SRob Herring 15724ba675SRob Herring cpu { 16724ba675SRob Herring compatible = "arm,arm926ej-s"; 17724ba675SRob Herring device_type = "cpu"; 18724ba675SRob Herring }; 19724ba675SRob Herring }; 20724ba675SRob Herring 21724ba675SRob Herring memory { 22724ba675SRob Herring device_type = "memory"; 23724ba675SRob Herring reg = <0 0x40000000>; 24724ba675SRob Herring }; 25724ba675SRob Herring 26724ba675SRob Herring ahb { 27724ba675SRob Herring #address-cells = <1>; 28724ba675SRob Herring #size-cells = <1>; 29724ba675SRob Herring compatible = "simple-bus"; 30724ba675SRob Herring ranges = <0xd0000000 0xd0000000 0x30000000>; 31724ba675SRob Herring 32724ba675SRob Herring vic0: interrupt-controller@f1100000 { 33724ba675SRob Herring compatible = "arm,pl190-vic"; 34724ba675SRob Herring interrupt-controller; 35724ba675SRob Herring reg = <0xf1100000 0x1000>; 36724ba675SRob Herring #interrupt-cells = <1>; 37724ba675SRob Herring }; 38724ba675SRob Herring 39724ba675SRob Herring vic1: interrupt-controller@f1000000 { 40724ba675SRob Herring compatible = "arm,pl190-vic"; 41724ba675SRob Herring interrupt-controller; 42724ba675SRob Herring reg = <0xf1000000 0x1000>; 43724ba675SRob Herring #interrupt-cells = <1>; 44724ba675SRob Herring }; 45724ba675SRob Herring 46724ba675SRob Herring clcd: clcd@fc200000 { 47724ba675SRob Herring compatible = "arm,pl110", "arm,primecell"; 48724ba675SRob Herring reg = <0xfc200000 0x1000>; 49724ba675SRob Herring interrupt-parent = <&vic1>; 50724ba675SRob Herring interrupts = <13>; 51724ba675SRob Herring status = "disabled"; 52724ba675SRob Herring }; 53724ba675SRob Herring 54724ba675SRob Herring dmac: dma@fc400000 { 55724ba675SRob Herring compatible = "arm,pl080", "arm,primecell"; 56724ba675SRob Herring reg = <0xfc400000 0x1000>; 57724ba675SRob Herring interrupt-parent = <&vic1>; 58724ba675SRob Herring interrupts = <10>; 59724ba675SRob Herring status = "disabled"; 60724ba675SRob Herring }; 61724ba675SRob Herring 62724ba675SRob Herring gmac: ethernet@e0800000 { 63724ba675SRob Herring compatible = "st,spear600-gmac"; 64724ba675SRob Herring reg = <0xe0800000 0x8000>; 65724ba675SRob Herring interrupt-parent = <&vic1>; 66724ba675SRob Herring interrupts = <24 23>; 67724ba675SRob Herring interrupt-names = "macirq", "eth_wake_irq"; 68724ba675SRob Herring phy-mode = "gmii"; 69724ba675SRob Herring status = "disabled"; 70724ba675SRob Herring }; 71724ba675SRob Herring 72724ba675SRob Herring fsmc: flash@d1800000 { 73724ba675SRob Herring compatible = "st,spear600-fsmc-nand"; 74724ba675SRob Herring #address-cells = <1>; 75724ba675SRob Herring #size-cells = <1>; 76724ba675SRob Herring reg = <0xd1800000 0x1000 /* FSMC Register */ 77724ba675SRob Herring 0xd2000000 0x0010 /* NAND Base DATA */ 78724ba675SRob Herring 0xd2020000 0x0010 /* NAND Base ADDR */ 79724ba675SRob Herring 0xd2010000 0x0010>; /* NAND Base CMD */ 80724ba675SRob Herring reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; 81724ba675SRob Herring status = "disabled"; 82724ba675SRob Herring }; 83724ba675SRob Herring 84724ba675SRob Herring smi: flash@fc000000 { 85724ba675SRob Herring compatible = "st,spear600-smi"; 86724ba675SRob Herring #address-cells = <1>; 87724ba675SRob Herring #size-cells = <1>; 88724ba675SRob Herring reg = <0xfc000000 0x1000>; 89724ba675SRob Herring interrupt-parent = <&vic1>; 90724ba675SRob Herring interrupts = <12>; 91724ba675SRob Herring status = "disabled"; 92724ba675SRob Herring }; 93724ba675SRob Herring 94*e06534a1SWolfram Sang ehci_usb0: usb@e1800000 { 95724ba675SRob Herring compatible = "st,spear600-ehci", "usb-ehci"; 96724ba675SRob Herring reg = <0xe1800000 0x1000>; 97724ba675SRob Herring interrupt-parent = <&vic1>; 98724ba675SRob Herring interrupts = <27>; 99724ba675SRob Herring status = "disabled"; 100724ba675SRob Herring }; 101724ba675SRob Herring 102*e06534a1SWolfram Sang ehci_usb1: usb@e2000000 { 103724ba675SRob Herring compatible = "st,spear600-ehci", "usb-ehci"; 104724ba675SRob Herring reg = <0xe2000000 0x1000>; 105724ba675SRob Herring interrupt-parent = <&vic1>; 106724ba675SRob Herring interrupts = <29>; 107724ba675SRob Herring status = "disabled"; 108724ba675SRob Herring }; 109724ba675SRob Herring 110*e06534a1SWolfram Sang ohci_usb0: usb@e1900000 { 111724ba675SRob Herring compatible = "st,spear600-ohci", "usb-ohci"; 112724ba675SRob Herring reg = <0xe1900000 0x1000>; 113724ba675SRob Herring interrupt-parent = <&vic1>; 114724ba675SRob Herring interrupts = <26>; 115724ba675SRob Herring status = "disabled"; 116724ba675SRob Herring }; 117724ba675SRob Herring 118*e06534a1SWolfram Sang ohci_usb1: usb@e2100000 { 119724ba675SRob Herring compatible = "st,spear600-ohci", "usb-ohci"; 120724ba675SRob Herring reg = <0xe2100000 0x1000>; 121724ba675SRob Herring interrupt-parent = <&vic1>; 122724ba675SRob Herring interrupts = <28>; 123724ba675SRob Herring status = "disabled"; 124724ba675SRob Herring }; 125724ba675SRob Herring 126724ba675SRob Herring apb { 127724ba675SRob Herring #address-cells = <1>; 128724ba675SRob Herring #size-cells = <1>; 129724ba675SRob Herring compatible = "simple-bus"; 130724ba675SRob Herring ranges = <0xd0000000 0xd0000000 0x30000000>; 131724ba675SRob Herring 132724ba675SRob Herring uart0: serial@d0000000 { 133724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 134724ba675SRob Herring reg = <0xd0000000 0x1000>; 135724ba675SRob Herring interrupt-parent = <&vic0>; 136724ba675SRob Herring interrupts = <24>; 137724ba675SRob Herring status = "disabled"; 138724ba675SRob Herring }; 139724ba675SRob Herring 140724ba675SRob Herring uart1: serial@d0080000 { 141724ba675SRob Herring compatible = "arm,pl011", "arm,primecell"; 142724ba675SRob Herring reg = <0xd0080000 0x1000>; 143724ba675SRob Herring interrupt-parent = <&vic0>; 144724ba675SRob Herring interrupts = <25>; 145724ba675SRob Herring status = "disabled"; 146724ba675SRob Herring }; 147724ba675SRob Herring 148724ba675SRob Herring /* local/cpu GPIO */ 149724ba675SRob Herring gpio0: gpio@f0100000 { 150724ba675SRob Herring #gpio-cells = <2>; 151724ba675SRob Herring compatible = "arm,pl061", "arm,primecell"; 152724ba675SRob Herring gpio-controller; 153724ba675SRob Herring reg = <0xf0100000 0x1000>; 154724ba675SRob Herring interrupt-parent = <&vic0>; 155724ba675SRob Herring interrupts = <18>; 156724ba675SRob Herring }; 157724ba675SRob Herring 158724ba675SRob Herring /* basic GPIO */ 159724ba675SRob Herring gpio1: gpio@fc980000 { 160724ba675SRob Herring #gpio-cells = <2>; 161724ba675SRob Herring compatible = "arm,pl061", "arm,primecell"; 162724ba675SRob Herring gpio-controller; 163724ba675SRob Herring reg = <0xfc980000 0x1000>; 164724ba675SRob Herring interrupt-parent = <&vic1>; 165724ba675SRob Herring interrupts = <19>; 166724ba675SRob Herring }; 167724ba675SRob Herring 168724ba675SRob Herring /* appl GPIO */ 169724ba675SRob Herring gpio2: gpio@d8100000 { 170724ba675SRob Herring #gpio-cells = <2>; 171724ba675SRob Herring compatible = "arm,pl061", "arm,primecell"; 172724ba675SRob Herring gpio-controller; 173724ba675SRob Herring reg = <0xd8100000 0x1000>; 174724ba675SRob Herring interrupt-parent = <&vic1>; 175724ba675SRob Herring interrupts = <4>; 176724ba675SRob Herring }; 177724ba675SRob Herring 178724ba675SRob Herring i2c: i2c@d0200000 { 179724ba675SRob Herring #address-cells = <1>; 180724ba675SRob Herring #size-cells = <0>; 181724ba675SRob Herring compatible = "snps,designware-i2c"; 182724ba675SRob Herring reg = <0xd0200000 0x1000>; 183724ba675SRob Herring interrupt-parent = <&vic0>; 184724ba675SRob Herring interrupts = <28>; 185724ba675SRob Herring status = "disabled"; 186724ba675SRob Herring }; 187724ba675SRob Herring 188724ba675SRob Herring rtc: rtc@fc900000 { 189724ba675SRob Herring compatible = "st,spear600-rtc"; 190724ba675SRob Herring reg = <0xfc900000 0x1000>; 191724ba675SRob Herring interrupt-parent = <&vic0>; 192724ba675SRob Herring interrupts = <10>; 193724ba675SRob Herring status = "disabled"; 194724ba675SRob Herring }; 195724ba675SRob Herring 196724ba675SRob Herring timer@f0000000 { 197724ba675SRob Herring compatible = "st,spear-timer"; 198724ba675SRob Herring reg = <0xf0000000 0x400>; 199724ba675SRob Herring interrupt-parent = <&vic0>; 200724ba675SRob Herring interrupts = <16>; 201724ba675SRob Herring }; 202724ba675SRob Herring 203724ba675SRob Herring adc: adc@d820b000 { 204724ba675SRob Herring compatible = "st,spear600-adc"; 205724ba675SRob Herring reg = <0xd820b000 0x1000>; 206724ba675SRob Herring interrupt-parent = <&vic1>; 207724ba675SRob Herring interrupts = <6>; 208724ba675SRob Herring status = "disabled"; 209724ba675SRob Herring }; 210724ba675SRob Herring 211724ba675SRob Herring ssp1: spi@d0100000 { 212724ba675SRob Herring compatible = "arm,pl022", "arm,primecell"; 213724ba675SRob Herring reg = <0xd0100000 0x1000>; 214724ba675SRob Herring #address-cells = <1>; 215724ba675SRob Herring #size-cells = <0>; 216724ba675SRob Herring interrupt-parent = <&vic0>; 217724ba675SRob Herring interrupts = <26>; 218724ba675SRob Herring status = "disabled"; 219724ba675SRob Herring }; 220724ba675SRob Herring 221724ba675SRob Herring ssp2: spi@d0180000 { 222724ba675SRob Herring compatible = "arm,pl022", "arm,primecell"; 223724ba675SRob Herring reg = <0xd0180000 0x1000>; 224724ba675SRob Herring #address-cells = <1>; 225724ba675SRob Herring #size-cells = <0>; 226724ba675SRob Herring interrupt-parent = <&vic0>; 227724ba675SRob Herring interrupts = <27>; 228724ba675SRob Herring status = "disabled"; 229724ba675SRob Herring }; 230724ba675SRob Herring 231724ba675SRob Herring ssp3: spi@d8180000 { 232724ba675SRob Herring compatible = "arm,pl022", "arm,primecell"; 233724ba675SRob Herring reg = <0xd8180000 0x1000>; 234724ba675SRob Herring #address-cells = <1>; 235724ba675SRob Herring #size-cells = <0>; 236724ba675SRob Herring interrupt-parent = <&vic1>; 237724ba675SRob Herring interrupts = <5>; 238724ba675SRob Herring status = "disabled"; 239724ba675SRob Herring }; 240724ba675SRob Herring }; 241724ba675SRob Herring }; 242724ba675SRob Herring}; 243