1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+ OR MIT 2*724ba675SRob Herring// 3*724ba675SRob Herring// Device Tree Source for UniPhier LD6b SoC 4*724ba675SRob Herring// 5*724ba675SRob Herring// Copyright (C) 2015-2016 Socionext Inc. 6*724ba675SRob Herring// Author: Masahiro Yamada <yamada.masahiro@socionext.com> 7*724ba675SRob Herring 8*724ba675SRob Herring/* 9*724ba675SRob Herring * LD6b consists of two silicon dies: D-chip and A-chip. 10*724ba675SRob Herring * The D-chip (digital chip) is the same as the PXs2 die. 11*724ba675SRob Herring * Reuse the PXs2 device tree with some properties overridden. 12*724ba675SRob Herring */ 13*724ba675SRob Herring#include "uniphier-pxs2.dtsi" 14*724ba675SRob Herring 15*724ba675SRob Herring/ { 16*724ba675SRob Herring compatible = "socionext,uniphier-ld6b"; 17*724ba675SRob Herring}; 18*724ba675SRob Herring 19*724ba675SRob Herring/* UART3 unavailable: the pads are not wired to the package balls */ 20*724ba675SRob Herring&serial3 { 21*724ba675SRob Herring status = "disabled"; 22*724ba675SRob Herring}; 23*724ba675SRob Herring 24*724ba675SRob Herring/* 25*724ba675SRob Herring * LD6b and PXs2 have completely different packages, 26*724ba675SRob Herring * which makes the pinctrl driver unshareable. 27*724ba675SRob Herring */ 28*724ba675SRob Herring&pinctrl { 29*724ba675SRob Herring compatible = "socionext,uniphier-ld6b-pinctrl"; 30*724ba675SRob Herring}; 31