1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Hardkernel Odroid XU3/XU3-Lite/XU4/HC1 boards core device tree source 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (c) 2017 Marek Szyprowski 6*724ba675SRob Herring * Copyright (c) 2013-2017 Samsung Electronics Co., Ltd. 7*724ba675SRob Herring * http://www.samsung.com 8*724ba675SRob Herring */ 9*724ba675SRob Herring 10*724ba675SRob Herring#include <dt-bindings/clock/samsung,s2mps11.h> 11*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 12*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 13*724ba675SRob Herring#include "exynos5800.dtsi" 14*724ba675SRob Herring#include "exynos5422-cpus.dtsi" 15*724ba675SRob Herring 16*724ba675SRob Herring/ { 17*724ba675SRob Herring memory@40000000 { 18*724ba675SRob Herring device_type = "memory"; 19*724ba675SRob Herring reg = <0x40000000 0x7ea00000>; 20*724ba675SRob Herring }; 21*724ba675SRob Herring 22*724ba675SRob Herring aliases { 23*724ba675SRob Herring mmc2 = &mmc_2; 24*724ba675SRob Herring }; 25*724ba675SRob Herring 26*724ba675SRob Herring chosen { 27*724ba675SRob Herring stdout-path = "serial2:115200n8"; 28*724ba675SRob Herring }; 29*724ba675SRob Herring 30*724ba675SRob Herring firmware@2073000 { 31*724ba675SRob Herring compatible = "samsung,secure-firmware"; 32*724ba675SRob Herring reg = <0x02073000 0x1000>; 33*724ba675SRob Herring }; 34*724ba675SRob Herring 35*724ba675SRob Herring fixed-rate-clocks { 36*724ba675SRob Herring oscclk { 37*724ba675SRob Herring compatible = "samsung,exynos5420-oscclk"; 38*724ba675SRob Herring clock-frequency = <24000000>; 39*724ba675SRob Herring }; 40*724ba675SRob Herring }; 41*724ba675SRob Herring 42*724ba675SRob Herring bus_wcore_opp_table: opp-table-2 { 43*724ba675SRob Herring compatible = "operating-points-v2"; 44*724ba675SRob Herring 45*724ba675SRob Herring /* derived from 532MHz MPLL */ 46*724ba675SRob Herring opp00 { 47*724ba675SRob Herring opp-hz = /bits/ 64 <88700000>; 48*724ba675SRob Herring opp-microvolt = <925000 925000 1400000>; 49*724ba675SRob Herring }; 50*724ba675SRob Herring opp01 { 51*724ba675SRob Herring opp-hz = /bits/ 64 <133000000>; 52*724ba675SRob Herring opp-microvolt = <950000 950000 1400000>; 53*724ba675SRob Herring }; 54*724ba675SRob Herring opp02 { 55*724ba675SRob Herring opp-hz = /bits/ 64 <177400000>; 56*724ba675SRob Herring opp-microvolt = <950000 950000 1400000>; 57*724ba675SRob Herring }; 58*724ba675SRob Herring opp03 { 59*724ba675SRob Herring opp-hz = /bits/ 64 <266000000>; 60*724ba675SRob Herring opp-microvolt = <950000 950000 1400000>; 61*724ba675SRob Herring }; 62*724ba675SRob Herring opp04 { 63*724ba675SRob Herring opp-hz = /bits/ 64 <532000000>; 64*724ba675SRob Herring opp-microvolt = <1000000 1000000 1400000>; 65*724ba675SRob Herring }; 66*724ba675SRob Herring }; 67*724ba675SRob Herring 68*724ba675SRob Herring bus_noc_opp_table: opp-table-3 { 69*724ba675SRob Herring compatible = "operating-points-v2"; 70*724ba675SRob Herring 71*724ba675SRob Herring /* derived from 666MHz CPLL */ 72*724ba675SRob Herring opp00 { 73*724ba675SRob Herring opp-hz = /bits/ 64 <66600000>; 74*724ba675SRob Herring }; 75*724ba675SRob Herring opp01 { 76*724ba675SRob Herring opp-hz = /bits/ 64 <74000000>; 77*724ba675SRob Herring }; 78*724ba675SRob Herring opp02 { 79*724ba675SRob Herring opp-hz = /bits/ 64 <83250000>; 80*724ba675SRob Herring }; 81*724ba675SRob Herring opp03 { 82*724ba675SRob Herring opp-hz = /bits/ 64 <111000000>; 83*724ba675SRob Herring }; 84*724ba675SRob Herring }; 85*724ba675SRob Herring 86*724ba675SRob Herring bus_fsys_apb_opp_table: opp-table-4 { 87*724ba675SRob Herring compatible = "operating-points-v2"; 88*724ba675SRob Herring 89*724ba675SRob Herring /* derived from 666MHz CPLL */ 90*724ba675SRob Herring opp00 { 91*724ba675SRob Herring opp-hz = /bits/ 64 <111000000>; 92*724ba675SRob Herring }; 93*724ba675SRob Herring opp01 { 94*724ba675SRob Herring opp-hz = /bits/ 64 <222000000>; 95*724ba675SRob Herring }; 96*724ba675SRob Herring }; 97*724ba675SRob Herring 98*724ba675SRob Herring bus_fsys2_opp_table: opp-table-5 { 99*724ba675SRob Herring compatible = "operating-points-v2"; 100*724ba675SRob Herring 101*724ba675SRob Herring /* derived from 600MHz DPLL */ 102*724ba675SRob Herring opp00 { 103*724ba675SRob Herring opp-hz = /bits/ 64 <75000000>; 104*724ba675SRob Herring }; 105*724ba675SRob Herring opp01 { 106*724ba675SRob Herring opp-hz = /bits/ 64 <120000000>; 107*724ba675SRob Herring }; 108*724ba675SRob Herring opp02 { 109*724ba675SRob Herring opp-hz = /bits/ 64 <200000000>; 110*724ba675SRob Herring }; 111*724ba675SRob Herring }; 112*724ba675SRob Herring 113*724ba675SRob Herring bus_mfc_opp_table: opp-table-6 { 114*724ba675SRob Herring compatible = "operating-points-v2"; 115*724ba675SRob Herring 116*724ba675SRob Herring /* derived from 666MHz CPLL */ 117*724ba675SRob Herring opp00 { 118*724ba675SRob Herring opp-hz = /bits/ 64 <83250000>; 119*724ba675SRob Herring }; 120*724ba675SRob Herring opp01 { 121*724ba675SRob Herring opp-hz = /bits/ 64 <111000000>; 122*724ba675SRob Herring }; 123*724ba675SRob Herring opp02 { 124*724ba675SRob Herring opp-hz = /bits/ 64 <166500000>; 125*724ba675SRob Herring }; 126*724ba675SRob Herring opp03 { 127*724ba675SRob Herring opp-hz = /bits/ 64 <222000000>; 128*724ba675SRob Herring }; 129*724ba675SRob Herring opp04 { 130*724ba675SRob Herring opp-hz = /bits/ 64 <333000000>; 131*724ba675SRob Herring }; 132*724ba675SRob Herring }; 133*724ba675SRob Herring 134*724ba675SRob Herring bus_gen_opp_table: opp-table-7 { 135*724ba675SRob Herring compatible = "operating-points-v2"; 136*724ba675SRob Herring 137*724ba675SRob Herring /* derived from 532MHz MPLL */ 138*724ba675SRob Herring opp00 { 139*724ba675SRob Herring opp-hz = /bits/ 64 <88700000>; 140*724ba675SRob Herring }; 141*724ba675SRob Herring opp01 { 142*724ba675SRob Herring opp-hz = /bits/ 64 <133000000>; 143*724ba675SRob Herring }; 144*724ba675SRob Herring opp02 { 145*724ba675SRob Herring opp-hz = /bits/ 64 <178000000>; 146*724ba675SRob Herring }; 147*724ba675SRob Herring opp03 { 148*724ba675SRob Herring opp-hz = /bits/ 64 <266000000>; 149*724ba675SRob Herring }; 150*724ba675SRob Herring }; 151*724ba675SRob Herring 152*724ba675SRob Herring bus_peri_opp_table: opp-table-8 { 153*724ba675SRob Herring compatible = "operating-points-v2"; 154*724ba675SRob Herring 155*724ba675SRob Herring /* derived from 666MHz CPLL */ 156*724ba675SRob Herring opp00 { 157*724ba675SRob Herring opp-hz = /bits/ 64 <66600000>; 158*724ba675SRob Herring }; 159*724ba675SRob Herring }; 160*724ba675SRob Herring 161*724ba675SRob Herring bus_g2d_opp_table: opp-table-9 { 162*724ba675SRob Herring compatible = "operating-points-v2"; 163*724ba675SRob Herring 164*724ba675SRob Herring /* derived from 666MHz CPLL */ 165*724ba675SRob Herring opp00 { 166*724ba675SRob Herring opp-hz = /bits/ 64 <83250000>; 167*724ba675SRob Herring }; 168*724ba675SRob Herring opp01 { 169*724ba675SRob Herring opp-hz = /bits/ 64 <111000000>; 170*724ba675SRob Herring }; 171*724ba675SRob Herring opp02 { 172*724ba675SRob Herring opp-hz = /bits/ 64 <166500000>; 173*724ba675SRob Herring }; 174*724ba675SRob Herring opp03 { 175*724ba675SRob Herring opp-hz = /bits/ 64 <222000000>; 176*724ba675SRob Herring }; 177*724ba675SRob Herring opp04 { 178*724ba675SRob Herring opp-hz = /bits/ 64 <333000000>; 179*724ba675SRob Herring }; 180*724ba675SRob Herring }; 181*724ba675SRob Herring 182*724ba675SRob Herring bus_g2d_acp_opp_table: opp-table-10 { 183*724ba675SRob Herring compatible = "operating-points-v2"; 184*724ba675SRob Herring 185*724ba675SRob Herring /* derived from 532MHz MPLL */ 186*724ba675SRob Herring opp00 { 187*724ba675SRob Herring opp-hz = /bits/ 64 <66500000>; 188*724ba675SRob Herring }; 189*724ba675SRob Herring opp01 { 190*724ba675SRob Herring opp-hz = /bits/ 64 <133000000>; 191*724ba675SRob Herring }; 192*724ba675SRob Herring opp02 { 193*724ba675SRob Herring opp-hz = /bits/ 64 <178000000>; 194*724ba675SRob Herring }; 195*724ba675SRob Herring opp03 { 196*724ba675SRob Herring opp-hz = /bits/ 64 <266000000>; 197*724ba675SRob Herring }; 198*724ba675SRob Herring }; 199*724ba675SRob Herring 200*724ba675SRob Herring bus_jpeg_opp_table: opp-table-11 { 201*724ba675SRob Herring compatible = "operating-points-v2"; 202*724ba675SRob Herring 203*724ba675SRob Herring /* derived from 600MHz DPLL */ 204*724ba675SRob Herring opp00 { 205*724ba675SRob Herring opp-hz = /bits/ 64 <75000000>; 206*724ba675SRob Herring }; 207*724ba675SRob Herring opp01 { 208*724ba675SRob Herring opp-hz = /bits/ 64 <150000000>; 209*724ba675SRob Herring }; 210*724ba675SRob Herring opp02 { 211*724ba675SRob Herring opp-hz = /bits/ 64 <200000000>; 212*724ba675SRob Herring }; 213*724ba675SRob Herring opp03 { 214*724ba675SRob Herring opp-hz = /bits/ 64 <300000000>; 215*724ba675SRob Herring }; 216*724ba675SRob Herring }; 217*724ba675SRob Herring 218*724ba675SRob Herring bus_jpeg_apb_opp_table: opp-table-12 { 219*724ba675SRob Herring compatible = "operating-points-v2"; 220*724ba675SRob Herring 221*724ba675SRob Herring /* derived from 666MHz CPLL */ 222*724ba675SRob Herring opp00 { 223*724ba675SRob Herring opp-hz = /bits/ 64 <83250000>; 224*724ba675SRob Herring }; 225*724ba675SRob Herring opp01 { 226*724ba675SRob Herring opp-hz = /bits/ 64 <111000000>; 227*724ba675SRob Herring }; 228*724ba675SRob Herring opp02 { 229*724ba675SRob Herring opp-hz = /bits/ 64 <133000000>; 230*724ba675SRob Herring }; 231*724ba675SRob Herring opp03 { 232*724ba675SRob Herring opp-hz = /bits/ 64 <166500000>; 233*724ba675SRob Herring }; 234*724ba675SRob Herring }; 235*724ba675SRob Herring 236*724ba675SRob Herring bus_disp1_fimd_opp_table: opp-table-13 { 237*724ba675SRob Herring compatible = "operating-points-v2"; 238*724ba675SRob Herring 239*724ba675SRob Herring /* derived from 600MHz DPLL */ 240*724ba675SRob Herring opp00 { 241*724ba675SRob Herring opp-hz = /bits/ 64 <120000000>; 242*724ba675SRob Herring }; 243*724ba675SRob Herring opp01 { 244*724ba675SRob Herring opp-hz = /bits/ 64 <200000000>; 245*724ba675SRob Herring }; 246*724ba675SRob Herring }; 247*724ba675SRob Herring 248*724ba675SRob Herring bus_disp1_opp_table: opp-table-14 { 249*724ba675SRob Herring compatible = "operating-points-v2"; 250*724ba675SRob Herring 251*724ba675SRob Herring /* derived from 600MHz DPLL */ 252*724ba675SRob Herring opp00 { 253*724ba675SRob Herring opp-hz = /bits/ 64 <120000000>; 254*724ba675SRob Herring }; 255*724ba675SRob Herring opp01 { 256*724ba675SRob Herring opp-hz = /bits/ 64 <200000000>; 257*724ba675SRob Herring }; 258*724ba675SRob Herring opp02 { 259*724ba675SRob Herring opp-hz = /bits/ 64 <300000000>; 260*724ba675SRob Herring }; 261*724ba675SRob Herring }; 262*724ba675SRob Herring 263*724ba675SRob Herring bus_gscl_opp_table: opp-table-15 { 264*724ba675SRob Herring compatible = "operating-points-v2"; 265*724ba675SRob Herring 266*724ba675SRob Herring /* derived from 600MHz DPLL */ 267*724ba675SRob Herring opp00 { 268*724ba675SRob Herring opp-hz = /bits/ 64 <150000000>; 269*724ba675SRob Herring }; 270*724ba675SRob Herring opp01 { 271*724ba675SRob Herring opp-hz = /bits/ 64 <200000000>; 272*724ba675SRob Herring }; 273*724ba675SRob Herring opp02 { 274*724ba675SRob Herring opp-hz = /bits/ 64 <300000000>; 275*724ba675SRob Herring }; 276*724ba675SRob Herring }; 277*724ba675SRob Herring 278*724ba675SRob Herring bus_mscl_opp_table: opp-table-16 { 279*724ba675SRob Herring compatible = "operating-points-v2"; 280*724ba675SRob Herring 281*724ba675SRob Herring /* derived from 666MHz CPLL */ 282*724ba675SRob Herring opp00 { 283*724ba675SRob Herring opp-hz = /bits/ 64 <84000000>; 284*724ba675SRob Herring }; 285*724ba675SRob Herring opp01 { 286*724ba675SRob Herring opp-hz = /bits/ 64 <167000000>; 287*724ba675SRob Herring }; 288*724ba675SRob Herring opp02 { 289*724ba675SRob Herring opp-hz = /bits/ 64 <222000000>; 290*724ba675SRob Herring }; 291*724ba675SRob Herring opp03 { 292*724ba675SRob Herring opp-hz = /bits/ 64 <333000000>; 293*724ba675SRob Herring }; 294*724ba675SRob Herring opp04 { 295*724ba675SRob Herring opp-hz = /bits/ 64 <666000000>; 296*724ba675SRob Herring }; 297*724ba675SRob Herring }; 298*724ba675SRob Herring 299*724ba675SRob Herring dmc_opp_table: opp-table-17 { 300*724ba675SRob Herring compatible = "operating-points-v2"; 301*724ba675SRob Herring 302*724ba675SRob Herring opp00 { 303*724ba675SRob Herring opp-hz = /bits/ 64 <165000000>; 304*724ba675SRob Herring opp-microvolt = <875000>; 305*724ba675SRob Herring }; 306*724ba675SRob Herring opp01 { 307*724ba675SRob Herring opp-hz = /bits/ 64 <206000000>; 308*724ba675SRob Herring opp-microvolt = <875000>; 309*724ba675SRob Herring }; 310*724ba675SRob Herring opp02 { 311*724ba675SRob Herring opp-hz = /bits/ 64 <275000000>; 312*724ba675SRob Herring opp-microvolt = <875000>; 313*724ba675SRob Herring }; 314*724ba675SRob Herring opp03 { 315*724ba675SRob Herring opp-hz = /bits/ 64 <413000000>; 316*724ba675SRob Herring opp-microvolt = <887500>; 317*724ba675SRob Herring }; 318*724ba675SRob Herring opp04 { 319*724ba675SRob Herring opp-hz = /bits/ 64 <543000000>; 320*724ba675SRob Herring opp-microvolt = <937500>; 321*724ba675SRob Herring }; 322*724ba675SRob Herring opp05 { 323*724ba675SRob Herring opp-hz = /bits/ 64 <633000000>; 324*724ba675SRob Herring opp-microvolt = <1012500>; 325*724ba675SRob Herring }; 326*724ba675SRob Herring opp06 { 327*724ba675SRob Herring opp-hz = /bits/ 64 <728000000>; 328*724ba675SRob Herring opp-microvolt = <1037500>; 329*724ba675SRob Herring }; 330*724ba675SRob Herring opp07 { 331*724ba675SRob Herring opp-hz = /bits/ 64 <825000000>; 332*724ba675SRob Herring opp-microvolt = <1050000>; 333*724ba675SRob Herring }; 334*724ba675SRob Herring }; 335*724ba675SRob Herring 336*724ba675SRob Herring samsung_K3QF2F20DB: lpddr3 { 337*724ba675SRob Herring compatible = "samsung,K3QF2F20DB", "jedec,lpddr3"; 338*724ba675SRob Herring density = <16384>; 339*724ba675SRob Herring io-width = <32>; 340*724ba675SRob Herring 341*724ba675SRob Herring tRFC-min-tck = <17>; 342*724ba675SRob Herring tRRD-min-tck = <2>; 343*724ba675SRob Herring tRPab-min-tck = <2>; 344*724ba675SRob Herring tRPpb-min-tck = <2>; 345*724ba675SRob Herring tRCD-min-tck = <3>; 346*724ba675SRob Herring tRC-min-tck = <6>; 347*724ba675SRob Herring tRAS-min-tck = <5>; 348*724ba675SRob Herring tWTR-min-tck = <2>; 349*724ba675SRob Herring tWR-min-tck = <7>; 350*724ba675SRob Herring tRTP-min-tck = <2>; 351*724ba675SRob Herring tW2W-C2C-min-tck = <0>; 352*724ba675SRob Herring tR2R-C2C-min-tck = <0>; 353*724ba675SRob Herring tWL-min-tck = <8>; 354*724ba675SRob Herring tDQSCK-min-tck = <5>; 355*724ba675SRob Herring tRL-min-tck = <14>; 356*724ba675SRob Herring tFAW-min-tck = <5>; 357*724ba675SRob Herring tXSR-min-tck = <12>; 358*724ba675SRob Herring tXP-min-tck = <2>; 359*724ba675SRob Herring tCKE-min-tck = <2>; 360*724ba675SRob Herring tCKESR-min-tck = <2>; 361*724ba675SRob Herring tMRD-min-tck = <5>; 362*724ba675SRob Herring 363*724ba675SRob Herring timings_samsung_K3QF2F20DB_800mhz: timings { 364*724ba675SRob Herring compatible = "jedec,lpddr3-timings"; 365*724ba675SRob Herring max-freq = <800000000>; 366*724ba675SRob Herring min-freq = <100000000>; 367*724ba675SRob Herring tRFC = <65000>; 368*724ba675SRob Herring tRRD = <6000>; 369*724ba675SRob Herring tRPab = <12000>; 370*724ba675SRob Herring tRPpb = <12000>; 371*724ba675SRob Herring tRCD = <10000>; 372*724ba675SRob Herring tRC = <33750>; 373*724ba675SRob Herring tRAS = <23000>; 374*724ba675SRob Herring tWTR = <3750>; 375*724ba675SRob Herring tWR = <7500>; 376*724ba675SRob Herring tRTP = <3750>; 377*724ba675SRob Herring tW2W-C2C = <0>; 378*724ba675SRob Herring tR2R-C2C = <0>; 379*724ba675SRob Herring tFAW = <25000>; 380*724ba675SRob Herring tXSR = <70000>; 381*724ba675SRob Herring tXP = <3750>; 382*724ba675SRob Herring tCKE = <3750>; 383*724ba675SRob Herring tCKESR = <3750>; 384*724ba675SRob Herring tMRD = <7000>; 385*724ba675SRob Herring }; 386*724ba675SRob Herring }; 387*724ba675SRob Herring}; 388*724ba675SRob Herring 389*724ba675SRob Herring&adc { 390*724ba675SRob Herring vdd-supply = <&ldo4_reg>; 391*724ba675SRob Herring status = "okay"; 392*724ba675SRob Herring}; 393*724ba675SRob Herring 394*724ba675SRob Herring&bus_wcore { 395*724ba675SRob Herring operating-points-v2 = <&bus_wcore_opp_table>; 396*724ba675SRob Herring devfreq-events = <&nocp_mem0_0>, <&nocp_mem0_1>, 397*724ba675SRob Herring <&nocp_mem1_0>, <&nocp_mem1_1>; 398*724ba675SRob Herring vdd-supply = <&buck3_reg>; 399*724ba675SRob Herring exynos,saturation-ratio = <100>; 400*724ba675SRob Herring status = "okay"; 401*724ba675SRob Herring}; 402*724ba675SRob Herring 403*724ba675SRob Herring&bus_noc { 404*724ba675SRob Herring operating-points-v2 = <&bus_noc_opp_table>; 405*724ba675SRob Herring devfreq = <&bus_wcore>; 406*724ba675SRob Herring status = "okay"; 407*724ba675SRob Herring}; 408*724ba675SRob Herring 409*724ba675SRob Herring&bus_fsys_apb { 410*724ba675SRob Herring operating-points-v2 = <&bus_fsys_apb_opp_table>; 411*724ba675SRob Herring devfreq = <&bus_wcore>; 412*724ba675SRob Herring status = "okay"; 413*724ba675SRob Herring}; 414*724ba675SRob Herring 415*724ba675SRob Herring&bus_fsys2 { 416*724ba675SRob Herring operating-points-v2 = <&bus_fsys2_opp_table>; 417*724ba675SRob Herring devfreq = <&bus_wcore>; 418*724ba675SRob Herring status = "okay"; 419*724ba675SRob Herring}; 420*724ba675SRob Herring 421*724ba675SRob Herring&bus_mfc { 422*724ba675SRob Herring operating-points-v2 = <&bus_mfc_opp_table>; 423*724ba675SRob Herring devfreq = <&bus_wcore>; 424*724ba675SRob Herring status = "okay"; 425*724ba675SRob Herring}; 426*724ba675SRob Herring 427*724ba675SRob Herring&bus_gen { 428*724ba675SRob Herring operating-points-v2 = <&bus_gen_opp_table>; 429*724ba675SRob Herring devfreq = <&bus_wcore>; 430*724ba675SRob Herring status = "okay"; 431*724ba675SRob Herring}; 432*724ba675SRob Herring 433*724ba675SRob Herring&bus_peri { 434*724ba675SRob Herring operating-points-v2 = <&bus_peri_opp_table>; 435*724ba675SRob Herring devfreq = <&bus_wcore>; 436*724ba675SRob Herring status = "okay"; 437*724ba675SRob Herring}; 438*724ba675SRob Herring 439*724ba675SRob Herring&bus_g2d { 440*724ba675SRob Herring operating-points-v2 = <&bus_g2d_opp_table>; 441*724ba675SRob Herring devfreq = <&bus_wcore>; 442*724ba675SRob Herring status = "okay"; 443*724ba675SRob Herring}; 444*724ba675SRob Herring 445*724ba675SRob Herring&bus_g2d_acp { 446*724ba675SRob Herring operating-points-v2 = <&bus_g2d_acp_opp_table>; 447*724ba675SRob Herring devfreq = <&bus_wcore>; 448*724ba675SRob Herring status = "okay"; 449*724ba675SRob Herring}; 450*724ba675SRob Herring 451*724ba675SRob Herring&bus_jpeg { 452*724ba675SRob Herring operating-points-v2 = <&bus_jpeg_opp_table>; 453*724ba675SRob Herring devfreq = <&bus_wcore>; 454*724ba675SRob Herring status = "okay"; 455*724ba675SRob Herring}; 456*724ba675SRob Herring 457*724ba675SRob Herring&bus_jpeg_apb { 458*724ba675SRob Herring operating-points-v2 = <&bus_jpeg_apb_opp_table>; 459*724ba675SRob Herring devfreq = <&bus_wcore>; 460*724ba675SRob Herring status = "okay"; 461*724ba675SRob Herring}; 462*724ba675SRob Herring 463*724ba675SRob Herring&bus_disp1_fimd { 464*724ba675SRob Herring operating-points-v2 = <&bus_disp1_fimd_opp_table>; 465*724ba675SRob Herring devfreq = <&bus_wcore>; 466*724ba675SRob Herring status = "okay"; 467*724ba675SRob Herring}; 468*724ba675SRob Herring 469*724ba675SRob Herring&bus_disp1 { 470*724ba675SRob Herring operating-points-v2 = <&bus_disp1_opp_table>; 471*724ba675SRob Herring devfreq = <&bus_wcore>; 472*724ba675SRob Herring status = "okay"; 473*724ba675SRob Herring}; 474*724ba675SRob Herring 475*724ba675SRob Herring&bus_gscl_scaler { 476*724ba675SRob Herring operating-points-v2 = <&bus_gscl_opp_table>; 477*724ba675SRob Herring devfreq = <&bus_wcore>; 478*724ba675SRob Herring status = "okay"; 479*724ba675SRob Herring}; 480*724ba675SRob Herring 481*724ba675SRob Herring&bus_mscl { 482*724ba675SRob Herring operating-points-v2 = <&bus_mscl_opp_table>; 483*724ba675SRob Herring devfreq = <&bus_wcore>; 484*724ba675SRob Herring status = "okay"; 485*724ba675SRob Herring}; 486*724ba675SRob Herring 487*724ba675SRob Herring&cpu0 { 488*724ba675SRob Herring cpu-supply = <&buck6_reg>; 489*724ba675SRob Herring}; 490*724ba675SRob Herring 491*724ba675SRob Herring&cpu4 { 492*724ba675SRob Herring cpu-supply = <&buck2_reg>; 493*724ba675SRob Herring}; 494*724ba675SRob Herring 495*724ba675SRob Herring&dmc { 496*724ba675SRob Herring devfreq-events = <&ppmu_event3_dmc0_0>, <&ppmu_event3_dmc0_1>, 497*724ba675SRob Herring <&ppmu_event3_dmc1_0>, <&ppmu_event3_dmc1_1>; 498*724ba675SRob Herring device-handle = <&samsung_K3QF2F20DB>; 499*724ba675SRob Herring operating-points-v2 = <&dmc_opp_table>; 500*724ba675SRob Herring vdd-supply = <&buck1_reg>; 501*724ba675SRob Herring status = "okay"; 502*724ba675SRob Herring}; 503*724ba675SRob Herring 504*724ba675SRob Herring&hsi2c_4 { 505*724ba675SRob Herring status = "okay"; 506*724ba675SRob Herring 507*724ba675SRob Herring pmic@66 { 508*724ba675SRob Herring compatible = "samsung,s2mps11-pmic"; 509*724ba675SRob Herring reg = <0x66>; 510*724ba675SRob Herring samsung,s2mps11-acokb-ground; 511*724ba675SRob Herring 512*724ba675SRob Herring interrupt-parent = <&gpx0>; 513*724ba675SRob Herring interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 514*724ba675SRob Herring pinctrl-names = "default"; 515*724ba675SRob Herring pinctrl-0 = <&s2mps11_irq>; 516*724ba675SRob Herring wakeup-source; 517*724ba675SRob Herring 518*724ba675SRob Herring s2mps11_osc: clocks { 519*724ba675SRob Herring compatible = "samsung,s2mps11-clk"; 520*724ba675SRob Herring #clock-cells = <1>; 521*724ba675SRob Herring clock-output-names = "s2mps11_ap", 522*724ba675SRob Herring "s2mps11_cp", "s2mps11_bt"; 523*724ba675SRob Herring }; 524*724ba675SRob Herring 525*724ba675SRob Herring regulators { 526*724ba675SRob Herring ldo1_reg: LDO1 { 527*724ba675SRob Herring regulator-name = "vdd_ldo1"; 528*724ba675SRob Herring regulator-min-microvolt = <1000000>; 529*724ba675SRob Herring regulator-max-microvolt = <1000000>; 530*724ba675SRob Herring regulator-always-on; 531*724ba675SRob Herring }; 532*724ba675SRob Herring 533*724ba675SRob Herring ldo2_reg: LDO2 { 534*724ba675SRob Herring regulator-name = "vdd_ldo2"; 535*724ba675SRob Herring regulator-min-microvolt = <1800000>; 536*724ba675SRob Herring regulator-max-microvolt = <1800000>; 537*724ba675SRob Herring regulator-always-on; 538*724ba675SRob Herring }; 539*724ba675SRob Herring 540*724ba675SRob Herring ldo3_reg: LDO3 { 541*724ba675SRob Herring regulator-name = "vddq_mmc0"; 542*724ba675SRob Herring regulator-min-microvolt = <1800000>; 543*724ba675SRob Herring regulator-max-microvolt = <1800000>; 544*724ba675SRob Herring }; 545*724ba675SRob Herring 546*724ba675SRob Herring ldo4_reg: LDO4 { 547*724ba675SRob Herring regulator-name = "vdd_adc"; 548*724ba675SRob Herring regulator-min-microvolt = <1800000>; 549*724ba675SRob Herring regulator-max-microvolt = <1800000>; 550*724ba675SRob Herring 551*724ba675SRob Herring regulator-state-mem { 552*724ba675SRob Herring regulator-off-in-suspend; 553*724ba675SRob Herring }; 554*724ba675SRob Herring }; 555*724ba675SRob Herring 556*724ba675SRob Herring ldo5_reg: LDO5 { 557*724ba675SRob Herring regulator-name = "vdd_ldo5"; 558*724ba675SRob Herring regulator-min-microvolt = <1800000>; 559*724ba675SRob Herring regulator-max-microvolt = <1800000>; 560*724ba675SRob Herring regulator-always-on; 561*724ba675SRob Herring 562*724ba675SRob Herring regulator-state-mem { 563*724ba675SRob Herring regulator-off-in-suspend; 564*724ba675SRob Herring }; 565*724ba675SRob Herring }; 566*724ba675SRob Herring 567*724ba675SRob Herring ldo6_reg: LDO6 { 568*724ba675SRob Herring regulator-name = "vdd_ldo6"; 569*724ba675SRob Herring regulator-min-microvolt = <1000000>; 570*724ba675SRob Herring regulator-max-microvolt = <1000000>; 571*724ba675SRob Herring regulator-always-on; 572*724ba675SRob Herring 573*724ba675SRob Herring regulator-state-mem { 574*724ba675SRob Herring regulator-off-in-suspend; 575*724ba675SRob Herring }; 576*724ba675SRob Herring }; 577*724ba675SRob Herring 578*724ba675SRob Herring ldo7_reg: LDO7 { 579*724ba675SRob Herring regulator-name = "vdd_ldo7"; 580*724ba675SRob Herring regulator-min-microvolt = <1800000>; 581*724ba675SRob Herring regulator-max-microvolt = <1800000>; 582*724ba675SRob Herring regulator-always-on; 583*724ba675SRob Herring 584*724ba675SRob Herring regulator-state-mem { 585*724ba675SRob Herring regulator-off-in-suspend; 586*724ba675SRob Herring }; 587*724ba675SRob Herring }; 588*724ba675SRob Herring 589*724ba675SRob Herring ldo8_reg: LDO8 { 590*724ba675SRob Herring regulator-name = "vdd_ldo8"; 591*724ba675SRob Herring regulator-min-microvolt = <1800000>; 592*724ba675SRob Herring regulator-max-microvolt = <1800000>; 593*724ba675SRob Herring regulator-always-on; 594*724ba675SRob Herring 595*724ba675SRob Herring regulator-state-mem { 596*724ba675SRob Herring regulator-off-in-suspend; 597*724ba675SRob Herring }; 598*724ba675SRob Herring }; 599*724ba675SRob Herring 600*724ba675SRob Herring ldo9_reg: LDO9 { 601*724ba675SRob Herring regulator-name = "vdd_ldo9"; 602*724ba675SRob Herring regulator-min-microvolt = <3000000>; 603*724ba675SRob Herring regulator-max-microvolt = <3000000>; 604*724ba675SRob Herring regulator-always-on; 605*724ba675SRob Herring 606*724ba675SRob Herring regulator-state-mem { 607*724ba675SRob Herring regulator-off-in-suspend; 608*724ba675SRob Herring }; 609*724ba675SRob Herring }; 610*724ba675SRob Herring 611*724ba675SRob Herring ldo10_reg: LDO10 { 612*724ba675SRob Herring regulator-name = "vdd_ldo10"; 613*724ba675SRob Herring regulator-min-microvolt = <1800000>; 614*724ba675SRob Herring regulator-max-microvolt = <1800000>; 615*724ba675SRob Herring regulator-always-on; 616*724ba675SRob Herring 617*724ba675SRob Herring regulator-state-mem { 618*724ba675SRob Herring regulator-off-in-suspend; 619*724ba675SRob Herring }; 620*724ba675SRob Herring }; 621*724ba675SRob Herring 622*724ba675SRob Herring ldo11_reg: LDO11 { 623*724ba675SRob Herring regulator-name = "vdd_ldo11"; 624*724ba675SRob Herring regulator-min-microvolt = <1000000>; 625*724ba675SRob Herring regulator-max-microvolt = <1000000>; 626*724ba675SRob Herring regulator-always-on; 627*724ba675SRob Herring 628*724ba675SRob Herring regulator-state-mem { 629*724ba675SRob Herring regulator-off-in-suspend; 630*724ba675SRob Herring }; 631*724ba675SRob Herring }; 632*724ba675SRob Herring 633*724ba675SRob Herring ldo12_reg: LDO12 { 634*724ba675SRob Herring /* Unused */ 635*724ba675SRob Herring regulator-name = "vdd_ldo12"; 636*724ba675SRob Herring regulator-min-microvolt = <800000>; 637*724ba675SRob Herring regulator-max-microvolt = <2375000>; 638*724ba675SRob Herring }; 639*724ba675SRob Herring 640*724ba675SRob Herring ldo13_reg: LDO13 { 641*724ba675SRob Herring regulator-name = "vddq_mmc2"; 642*724ba675SRob Herring regulator-min-microvolt = <1800000>; 643*724ba675SRob Herring regulator-max-microvolt = <2800000>; 644*724ba675SRob Herring 645*724ba675SRob Herring regulator-state-mem { 646*724ba675SRob Herring regulator-off-in-suspend; 647*724ba675SRob Herring }; 648*724ba675SRob Herring }; 649*724ba675SRob Herring 650*724ba675SRob Herring ldo14_reg: LDO14 { 651*724ba675SRob Herring /* Unused */ 652*724ba675SRob Herring regulator-name = "vdd_ldo14"; 653*724ba675SRob Herring regulator-min-microvolt = <800000>; 654*724ba675SRob Herring regulator-max-microvolt = <3950000>; 655*724ba675SRob Herring }; 656*724ba675SRob Herring 657*724ba675SRob Herring ldo15_reg: LDO15 { 658*724ba675SRob Herring regulator-name = "vdd_ldo15"; 659*724ba675SRob Herring regulator-min-microvolt = <3300000>; 660*724ba675SRob Herring regulator-max-microvolt = <3300000>; 661*724ba675SRob Herring regulator-always-on; 662*724ba675SRob Herring 663*724ba675SRob Herring regulator-state-mem { 664*724ba675SRob Herring regulator-off-in-suspend; 665*724ba675SRob Herring }; 666*724ba675SRob Herring }; 667*724ba675SRob Herring 668*724ba675SRob Herring ldo16_reg: LDO16 { 669*724ba675SRob Herring /* Unused */ 670*724ba675SRob Herring regulator-name = "vdd_ldo16"; 671*724ba675SRob Herring regulator-min-microvolt = <800000>; 672*724ba675SRob Herring regulator-max-microvolt = <3950000>; 673*724ba675SRob Herring }; 674*724ba675SRob Herring 675*724ba675SRob Herring ldo17_reg: LDO17 { 676*724ba675SRob Herring regulator-name = "vdd_ldo17"; 677*724ba675SRob Herring regulator-min-microvolt = <3300000>; 678*724ba675SRob Herring regulator-max-microvolt = <3300000>; 679*724ba675SRob Herring regulator-always-on; 680*724ba675SRob Herring 681*724ba675SRob Herring regulator-state-mem { 682*724ba675SRob Herring regulator-off-in-suspend; 683*724ba675SRob Herring }; 684*724ba675SRob Herring }; 685*724ba675SRob Herring 686*724ba675SRob Herring ldo18_reg: LDO18 { 687*724ba675SRob Herring regulator-name = "vdd_emmc_1V8"; 688*724ba675SRob Herring regulator-min-microvolt = <1800000>; 689*724ba675SRob Herring regulator-max-microvolt = <1800000>; 690*724ba675SRob Herring 691*724ba675SRob Herring regulator-state-mem { 692*724ba675SRob Herring regulator-off-in-suspend; 693*724ba675SRob Herring }; 694*724ba675SRob Herring }; 695*724ba675SRob Herring 696*724ba675SRob Herring ldo19_reg: LDO19 { 697*724ba675SRob Herring regulator-name = "vdd_sd"; 698*724ba675SRob Herring regulator-min-microvolt = <2800000>; 699*724ba675SRob Herring regulator-max-microvolt = <2800000>; 700*724ba675SRob Herring 701*724ba675SRob Herring regulator-state-mem { 702*724ba675SRob Herring regulator-off-in-suspend; 703*724ba675SRob Herring }; 704*724ba675SRob Herring }; 705*724ba675SRob Herring 706*724ba675SRob Herring ldo20_reg: LDO20 { 707*724ba675SRob Herring /* Unused */ 708*724ba675SRob Herring regulator-name = "vdd_ldo20"; 709*724ba675SRob Herring regulator-min-microvolt = <800000>; 710*724ba675SRob Herring regulator-max-microvolt = <3950000>; 711*724ba675SRob Herring }; 712*724ba675SRob Herring 713*724ba675SRob Herring ldo21_reg: LDO21 { 714*724ba675SRob Herring /* Unused */ 715*724ba675SRob Herring regulator-name = "vdd_ldo21"; 716*724ba675SRob Herring regulator-min-microvolt = <800000>; 717*724ba675SRob Herring regulator-max-microvolt = <3950000>; 718*724ba675SRob Herring }; 719*724ba675SRob Herring 720*724ba675SRob Herring ldo22_reg: LDO22 { 721*724ba675SRob Herring /* Unused */ 722*724ba675SRob Herring regulator-name = "vdd_ldo22"; 723*724ba675SRob Herring regulator-min-microvolt = <800000>; 724*724ba675SRob Herring regulator-max-microvolt = <2375000>; 725*724ba675SRob Herring }; 726*724ba675SRob Herring 727*724ba675SRob Herring ldo23_reg: LDO23 { 728*724ba675SRob Herring regulator-name = "vdd_mifs"; 729*724ba675SRob Herring regulator-min-microvolt = <1100000>; 730*724ba675SRob Herring regulator-max-microvolt = <1100000>; 731*724ba675SRob Herring regulator-always-on; 732*724ba675SRob Herring 733*724ba675SRob Herring regulator-state-mem { 734*724ba675SRob Herring regulator-off-in-suspend; 735*724ba675SRob Herring }; 736*724ba675SRob Herring }; 737*724ba675SRob Herring 738*724ba675SRob Herring ldo24_reg: LDO24 { 739*724ba675SRob Herring /* Unused */ 740*724ba675SRob Herring regulator-name = "vdd_ldo24"; 741*724ba675SRob Herring regulator-min-microvolt = <800000>; 742*724ba675SRob Herring regulator-max-microvolt = <3950000>; 743*724ba675SRob Herring }; 744*724ba675SRob Herring 745*724ba675SRob Herring ldo25_reg: LDO25 { 746*724ba675SRob Herring /* Unused */ 747*724ba675SRob Herring regulator-name = "vdd_ldo25"; 748*724ba675SRob Herring regulator-min-microvolt = <800000>; 749*724ba675SRob Herring regulator-max-microvolt = <3950000>; 750*724ba675SRob Herring }; 751*724ba675SRob Herring 752*724ba675SRob Herring ldo26_reg: LDO26 { 753*724ba675SRob Herring /* Used on XU3, XU3-Lite and XU4 */ 754*724ba675SRob Herring regulator-name = "vdd_ldo26"; 755*724ba675SRob Herring regulator-min-microvolt = <800000>; 756*724ba675SRob Herring regulator-max-microvolt = <3950000>; 757*724ba675SRob Herring 758*724ba675SRob Herring regulator-state-mem { 759*724ba675SRob Herring regulator-off-in-suspend; 760*724ba675SRob Herring }; 761*724ba675SRob Herring }; 762*724ba675SRob Herring 763*724ba675SRob Herring ldo27_reg: LDO27 { 764*724ba675SRob Herring regulator-name = "vdd_g3ds"; 765*724ba675SRob Herring regulator-min-microvolt = <1000000>; 766*724ba675SRob Herring regulator-max-microvolt = <1000000>; 767*724ba675SRob Herring regulator-always-on; 768*724ba675SRob Herring 769*724ba675SRob Herring regulator-state-mem { 770*724ba675SRob Herring regulator-off-in-suspend; 771*724ba675SRob Herring }; 772*724ba675SRob Herring }; 773*724ba675SRob Herring 774*724ba675SRob Herring ldo28_reg: LDO28 { 775*724ba675SRob Herring /* Used on XU3 */ 776*724ba675SRob Herring regulator-name = "vdd_ldo28"; 777*724ba675SRob Herring regulator-min-microvolt = <800000>; 778*724ba675SRob Herring regulator-max-microvolt = <3950000>; 779*724ba675SRob Herring 780*724ba675SRob Herring regulator-state-mem { 781*724ba675SRob Herring regulator-off-in-suspend; 782*724ba675SRob Herring }; 783*724ba675SRob Herring }; 784*724ba675SRob Herring 785*724ba675SRob Herring ldo29_reg: LDO29 { 786*724ba675SRob Herring /* Unused */ 787*724ba675SRob Herring regulator-name = "vdd_ldo29"; 788*724ba675SRob Herring regulator-min-microvolt = <800000>; 789*724ba675SRob Herring regulator-max-microvolt = <3950000>; 790*724ba675SRob Herring }; 791*724ba675SRob Herring 792*724ba675SRob Herring ldo30_reg: LDO30 { 793*724ba675SRob Herring /* Unused */ 794*724ba675SRob Herring regulator-name = "vdd_ldo30"; 795*724ba675SRob Herring regulator-min-microvolt = <800000>; 796*724ba675SRob Herring regulator-max-microvolt = <3950000>; 797*724ba675SRob Herring }; 798*724ba675SRob Herring 799*724ba675SRob Herring ldo31_reg: LDO31 { 800*724ba675SRob Herring /* Unused */ 801*724ba675SRob Herring regulator-name = "vdd_ldo31"; 802*724ba675SRob Herring regulator-min-microvolt = <800000>; 803*724ba675SRob Herring regulator-max-microvolt = <3950000>; 804*724ba675SRob Herring }; 805*724ba675SRob Herring 806*724ba675SRob Herring ldo32_reg: LDO32 { 807*724ba675SRob Herring /* Unused */ 808*724ba675SRob Herring regulator-name = "vdd_ldo32"; 809*724ba675SRob Herring regulator-min-microvolt = <800000>; 810*724ba675SRob Herring regulator-max-microvolt = <3950000>; 811*724ba675SRob Herring }; 812*724ba675SRob Herring 813*724ba675SRob Herring ldo33_reg: LDO33 { 814*724ba675SRob Herring /* Unused */ 815*724ba675SRob Herring regulator-name = "vdd_ldo33"; 816*724ba675SRob Herring regulator-min-microvolt = <800000>; 817*724ba675SRob Herring regulator-max-microvolt = <3950000>; 818*724ba675SRob Herring }; 819*724ba675SRob Herring 820*724ba675SRob Herring ldo34_reg: LDO34 { 821*724ba675SRob Herring /* Unused */ 822*724ba675SRob Herring regulator-name = "vdd_ldo34"; 823*724ba675SRob Herring regulator-min-microvolt = <800000>; 824*724ba675SRob Herring regulator-max-microvolt = <3950000>; 825*724ba675SRob Herring }; 826*724ba675SRob Herring 827*724ba675SRob Herring ldo35_reg: LDO35 { 828*724ba675SRob Herring /* Unused */ 829*724ba675SRob Herring regulator-name = "vdd_ldo35"; 830*724ba675SRob Herring regulator-min-microvolt = <800000>; 831*724ba675SRob Herring regulator-max-microvolt = <2375000>; 832*724ba675SRob Herring }; 833*724ba675SRob Herring 834*724ba675SRob Herring ldo36_reg: LDO36 { 835*724ba675SRob Herring /* Unused */ 836*724ba675SRob Herring regulator-name = "vdd_ldo36"; 837*724ba675SRob Herring regulator-min-microvolt = <800000>; 838*724ba675SRob Herring regulator-max-microvolt = <3950000>; 839*724ba675SRob Herring }; 840*724ba675SRob Herring 841*724ba675SRob Herring ldo37_reg: LDO37 { 842*724ba675SRob Herring /* Unused */ 843*724ba675SRob Herring regulator-name = "vdd_ldo37"; 844*724ba675SRob Herring regulator-min-microvolt = <800000>; 845*724ba675SRob Herring regulator-max-microvolt = <3950000>; 846*724ba675SRob Herring }; 847*724ba675SRob Herring 848*724ba675SRob Herring ldo38_reg: LDO38 { 849*724ba675SRob Herring /* Unused */ 850*724ba675SRob Herring regulator-name = "vdd_ldo38"; 851*724ba675SRob Herring regulator-min-microvolt = <800000>; 852*724ba675SRob Herring regulator-max-microvolt = <3950000>; 853*724ba675SRob Herring }; 854*724ba675SRob Herring 855*724ba675SRob Herring buck1_reg: BUCK1 { 856*724ba675SRob Herring regulator-name = "vdd_mif"; 857*724ba675SRob Herring regulator-min-microvolt = <800000>; 858*724ba675SRob Herring regulator-max-microvolt = <1300000>; 859*724ba675SRob Herring regulator-always-on; 860*724ba675SRob Herring regulator-boot-on; 861*724ba675SRob Herring 862*724ba675SRob Herring regulator-state-mem { 863*724ba675SRob Herring regulator-off-in-suspend; 864*724ba675SRob Herring }; 865*724ba675SRob Herring }; 866*724ba675SRob Herring 867*724ba675SRob Herring buck2_reg: BUCK2 { 868*724ba675SRob Herring regulator-name = "vdd_arm"; 869*724ba675SRob Herring regulator-min-microvolt = <800000>; 870*724ba675SRob Herring regulator-max-microvolt = <1500000>; 871*724ba675SRob Herring regulator-always-on; 872*724ba675SRob Herring regulator-boot-on; 873*724ba675SRob Herring regulator-coupled-with = <&buck3_reg>; 874*724ba675SRob Herring regulator-coupled-max-spread = <300000>; 875*724ba675SRob Herring 876*724ba675SRob Herring regulator-state-mem { 877*724ba675SRob Herring regulator-off-in-suspend; 878*724ba675SRob Herring }; 879*724ba675SRob Herring }; 880*724ba675SRob Herring 881*724ba675SRob Herring buck3_reg: BUCK3 { 882*724ba675SRob Herring regulator-name = "vdd_int"; 883*724ba675SRob Herring regulator-min-microvolt = <800000>; 884*724ba675SRob Herring regulator-max-microvolt = <1400000>; 885*724ba675SRob Herring regulator-always-on; 886*724ba675SRob Herring regulator-boot-on; 887*724ba675SRob Herring regulator-coupled-with = <&buck2_reg>; 888*724ba675SRob Herring regulator-coupled-max-spread = <300000>; 889*724ba675SRob Herring 890*724ba675SRob Herring regulator-state-mem { 891*724ba675SRob Herring regulator-off-in-suspend; 892*724ba675SRob Herring }; 893*724ba675SRob Herring }; 894*724ba675SRob Herring 895*724ba675SRob Herring buck4_reg: BUCK4 { 896*724ba675SRob Herring regulator-name = "vdd_g3d"; 897*724ba675SRob Herring regulator-min-microvolt = <800000>; 898*724ba675SRob Herring regulator-max-microvolt = <1400000>; 899*724ba675SRob Herring regulator-boot-on; 900*724ba675SRob Herring regulator-always-on; 901*724ba675SRob Herring 902*724ba675SRob Herring regulator-state-mem { 903*724ba675SRob Herring regulator-off-in-suspend; 904*724ba675SRob Herring }; 905*724ba675SRob Herring }; 906*724ba675SRob Herring 907*724ba675SRob Herring buck5_reg: BUCK5 { 908*724ba675SRob Herring regulator-name = "vdd_mem"; 909*724ba675SRob Herring regulator-min-microvolt = <800000>; 910*724ba675SRob Herring regulator-max-microvolt = <1400000>; 911*724ba675SRob Herring regulator-always-on; 912*724ba675SRob Herring regulator-boot-on; 913*724ba675SRob Herring }; 914*724ba675SRob Herring 915*724ba675SRob Herring buck6_reg: BUCK6 { 916*724ba675SRob Herring regulator-name = "vdd_kfc"; 917*724ba675SRob Herring regulator-min-microvolt = <800000>; 918*724ba675SRob Herring regulator-max-microvolt = <1500000>; 919*724ba675SRob Herring regulator-always-on; 920*724ba675SRob Herring regulator-boot-on; 921*724ba675SRob Herring 922*724ba675SRob Herring regulator-state-mem { 923*724ba675SRob Herring regulator-off-in-suspend; 924*724ba675SRob Herring }; 925*724ba675SRob Herring }; 926*724ba675SRob Herring 927*724ba675SRob Herring buck7_reg: BUCK7 { 928*724ba675SRob Herring regulator-name = "vdd_1.35v_ldo"; 929*724ba675SRob Herring regulator-min-microvolt = <1200000>; 930*724ba675SRob Herring regulator-max-microvolt = <1500000>; 931*724ba675SRob Herring regulator-always-on; 932*724ba675SRob Herring regulator-boot-on; 933*724ba675SRob Herring }; 934*724ba675SRob Herring 935*724ba675SRob Herring buck8_reg: BUCK8 { 936*724ba675SRob Herring regulator-name = "vdd_2.0v_ldo"; 937*724ba675SRob Herring regulator-min-microvolt = <1800000>; 938*724ba675SRob Herring regulator-max-microvolt = <2100000>; 939*724ba675SRob Herring regulator-always-on; 940*724ba675SRob Herring regulator-boot-on; 941*724ba675SRob Herring }; 942*724ba675SRob Herring 943*724ba675SRob Herring buck9_reg: BUCK9 { 944*724ba675SRob Herring regulator-name = "vdd_2.8v_ldo"; 945*724ba675SRob Herring regulator-min-microvolt = <3000000>; 946*724ba675SRob Herring regulator-max-microvolt = <3750000>; 947*724ba675SRob Herring regulator-always-on; 948*724ba675SRob Herring regulator-boot-on; 949*724ba675SRob Herring 950*724ba675SRob Herring regulator-state-mem { 951*724ba675SRob Herring regulator-off-in-suspend; 952*724ba675SRob Herring }; 953*724ba675SRob Herring }; 954*724ba675SRob Herring 955*724ba675SRob Herring buck10_reg: BUCK10 { 956*724ba675SRob Herring regulator-name = "vdd_vmem"; 957*724ba675SRob Herring regulator-min-microvolt = <2850000>; 958*724ba675SRob Herring regulator-max-microvolt = <2850000>; 959*724ba675SRob Herring 960*724ba675SRob Herring regulator-state-mem { 961*724ba675SRob Herring regulator-off-in-suspend; 962*724ba675SRob Herring }; 963*724ba675SRob Herring }; 964*724ba675SRob Herring }; 965*724ba675SRob Herring }; 966*724ba675SRob Herring}; 967*724ba675SRob Herring 968*724ba675SRob Herring&mmc_2 { 969*724ba675SRob Herring status = "okay"; 970*724ba675SRob Herring card-detect-delay = <200>; 971*724ba675SRob Herring samsung,dw-mshc-ciu-div = <3>; 972*724ba675SRob Herring samsung,dw-mshc-sdr-timing = <0 4>; 973*724ba675SRob Herring samsung,dw-mshc-ddr-timing = <0 2>; 974*724ba675SRob Herring pinctrl-names = "default"; 975*724ba675SRob Herring pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_wp &sd2_bus1 &sd2_bus4>; 976*724ba675SRob Herring bus-width = <4>; 977*724ba675SRob Herring cap-sd-highspeed; 978*724ba675SRob Herring max-frequency = <200000000>; 979*724ba675SRob Herring vmmc-supply = <&ldo19_reg>; 980*724ba675SRob Herring vqmmc-supply = <&ldo13_reg>; 981*724ba675SRob Herring sd-uhs-sdr50; 982*724ba675SRob Herring sd-uhs-sdr104; 983*724ba675SRob Herring sd-uhs-ddr50; 984*724ba675SRob Herring}; 985*724ba675SRob Herring 986*724ba675SRob Herring&nocp_mem0_0 { 987*724ba675SRob Herring status = "okay"; 988*724ba675SRob Herring}; 989*724ba675SRob Herring 990*724ba675SRob Herring&nocp_mem0_1 { 991*724ba675SRob Herring status = "okay"; 992*724ba675SRob Herring}; 993*724ba675SRob Herring 994*724ba675SRob Herring&nocp_mem1_0 { 995*724ba675SRob Herring status = "okay"; 996*724ba675SRob Herring}; 997*724ba675SRob Herring 998*724ba675SRob Herring&nocp_mem1_1 { 999*724ba675SRob Herring status = "okay"; 1000*724ba675SRob Herring}; 1001*724ba675SRob Herring 1002*724ba675SRob Herring&pinctrl_0 { 1003*724ba675SRob Herring s2mps11_irq: s2mps11-irq-pins { 1004*724ba675SRob Herring samsung,pins = "gpx0-4"; 1005*724ba675SRob Herring samsung,pin-function = <EXYNOS_PIN_FUNC_F>; 1006*724ba675SRob Herring samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>; 1007*724ba675SRob Herring samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>; 1008*724ba675SRob Herring }; 1009*724ba675SRob Herring}; 1010*724ba675SRob Herring 1011*724ba675SRob Herring&ppmu_dmc0_0 { 1012*724ba675SRob Herring status = "okay"; 1013*724ba675SRob Herring}; 1014*724ba675SRob Herring 1015*724ba675SRob Herring&ppmu_dmc0_1 { 1016*724ba675SRob Herring status = "okay"; 1017*724ba675SRob Herring}; 1018*724ba675SRob Herring 1019*724ba675SRob Herring&ppmu_dmc1_0 { 1020*724ba675SRob Herring status = "okay"; 1021*724ba675SRob Herring}; 1022*724ba675SRob Herring 1023*724ba675SRob Herring&ppmu_dmc1_1 { 1024*724ba675SRob Herring status = "okay"; 1025*724ba675SRob Herring}; 1026*724ba675SRob Herring 1027*724ba675SRob Herring&tmu_cpu0 { 1028*724ba675SRob Herring vtmu-supply = <&ldo7_reg>; 1029*724ba675SRob Herring}; 1030*724ba675SRob Herring 1031*724ba675SRob Herring&tmu_cpu1 { 1032*724ba675SRob Herring vtmu-supply = <&ldo7_reg>; 1033*724ba675SRob Herring}; 1034*724ba675SRob Herring 1035*724ba675SRob Herring&tmu_cpu2 { 1036*724ba675SRob Herring vtmu-supply = <&ldo7_reg>; 1037*724ba675SRob Herring}; 1038*724ba675SRob Herring 1039*724ba675SRob Herring&tmu_cpu3 { 1040*724ba675SRob Herring vtmu-supply = <&ldo7_reg>; 1041*724ba675SRob Herring}; 1042*724ba675SRob Herring 1043*724ba675SRob Herring&tmu_gpu { 1044*724ba675SRob Herring vtmu-supply = <&ldo7_reg>; 1045*724ba675SRob Herring}; 1046*724ba675SRob Herring 1047*724ba675SRob Herring&gpu { 1048*724ba675SRob Herring mali-supply = <&buck4_reg>; 1049*724ba675SRob Herring status = "okay"; 1050*724ba675SRob Herring}; 1051*724ba675SRob Herring 1052*724ba675SRob Herring&rtc { 1053*724ba675SRob Herring status = "okay"; 1054*724ba675SRob Herring clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>; 1055*724ba675SRob Herring clock-names = "rtc", "rtc_src"; 1056*724ba675SRob Herring}; 1057*724ba675SRob Herring 1058*724ba675SRob Herring&usbdrd_dwc3_0 { 1059*724ba675SRob Herring dr_mode = "host"; 1060*724ba675SRob Herring}; 1061*724ba675SRob Herring 1062*724ba675SRob Herring/* usbdrd_dwc3_1 mode customized in each board */ 1063*724ba675SRob Herring 1064*724ba675SRob Herring&usbdrd3_0 { 1065*724ba675SRob Herring vdd33-supply = <&ldo9_reg>; 1066*724ba675SRob Herring vdd10-supply = <&ldo11_reg>; 1067*724ba675SRob Herring}; 1068*724ba675SRob Herring 1069*724ba675SRob Herring&usbdrd3_1 { 1070*724ba675SRob Herring vdd33-supply = <&ldo9_reg>; 1071*724ba675SRob Herring vdd10-supply = <&ldo11_reg>; 1072*724ba675SRob Herring}; 1073