xref: /linux/scripts/dtc/include-prefixes/arm/samsung/exynos5420-arndale-octa.dts (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Samsung's Exynos5420 based Arndale Octa board device tree source
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (c) 2013 Samsung Electronics Co., Ltd.
6*724ba675SRob Herring *		http://www.samsung.com
7*724ba675SRob Herring */
8*724ba675SRob Herring
9*724ba675SRob Herring/dts-v1/;
10*724ba675SRob Herring#include "exynos5420.dtsi"
11*724ba675SRob Herring#include "exynos5420-cpus.dtsi"
12*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
13*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h>
14*724ba675SRob Herring#include <dt-bindings/input/input.h>
15*724ba675SRob Herring#include <dt-bindings/clock/samsung,s2mps11.h>
16*724ba675SRob Herring
17*724ba675SRob Herring/ {
18*724ba675SRob Herring	model = "Insignal Arndale Octa evaluation board based on Exynos5420";
19*724ba675SRob Herring	compatible = "insignal,arndale-octa", "samsung,exynos5420", "samsung,exynos5";
20*724ba675SRob Herring
21*724ba675SRob Herring	memory@20000000 {
22*724ba675SRob Herring		device_type = "memory";
23*724ba675SRob Herring		reg = <0x20000000 0x80000000>;
24*724ba675SRob Herring	};
25*724ba675SRob Herring
26*724ba675SRob Herring	aliases {
27*724ba675SRob Herring		mmc0 = &mmc_0;
28*724ba675SRob Herring		mmc1 = &mmc_2;
29*724ba675SRob Herring	};
30*724ba675SRob Herring
31*724ba675SRob Herring	chosen {
32*724ba675SRob Herring		stdout-path = "serial3:115200n8";
33*724ba675SRob Herring	};
34*724ba675SRob Herring
35*724ba675SRob Herring	firmware@2073000 {
36*724ba675SRob Herring		compatible = "samsung,secure-firmware";
37*724ba675SRob Herring		reg = <0x02073000 0x1000>;
38*724ba675SRob Herring	};
39*724ba675SRob Herring
40*724ba675SRob Herring	fixed-rate-clocks {
41*724ba675SRob Herring		oscclk {
42*724ba675SRob Herring			compatible = "samsung,exynos5420-oscclk";
43*724ba675SRob Herring			clock-frequency = <24000000>;
44*724ba675SRob Herring		};
45*724ba675SRob Herring	};
46*724ba675SRob Herring
47*724ba675SRob Herring	gpio-keys {
48*724ba675SRob Herring		compatible = "gpio-keys";
49*724ba675SRob Herring
50*724ba675SRob Herring		key-wakeup {
51*724ba675SRob Herring			label = "SW-TACT1";
52*724ba675SRob Herring			gpios = <&gpx2 7 GPIO_ACTIVE_LOW>;
53*724ba675SRob Herring			linux,code = <KEY_WAKEUP>;
54*724ba675SRob Herring			wakeup-source;
55*724ba675SRob Herring		};
56*724ba675SRob Herring	};
57*724ba675SRob Herring};
58*724ba675SRob Herring
59*724ba675SRob Herring&adc {
60*724ba675SRob Herring	vdd-supply = <&ldo4_reg>;
61*724ba675SRob Herring	status = "okay";
62*724ba675SRob Herring};
63*724ba675SRob Herring
64*724ba675SRob Herring&cci {
65*724ba675SRob Herring	status = "disabled";
66*724ba675SRob Herring};
67*724ba675SRob Herring
68*724ba675SRob Herring&cpu0 {
69*724ba675SRob Herring	cpu-supply = <&buck2_reg>;
70*724ba675SRob Herring};
71*724ba675SRob Herring
72*724ba675SRob Herring&cpu4 {
73*724ba675SRob Herring	cpu-supply = <&buck6_reg>;
74*724ba675SRob Herring};
75*724ba675SRob Herring
76*724ba675SRob Herring&cpu0_thermal {
77*724ba675SRob Herring	trips {
78*724ba675SRob Herring		cpu0_alert0: cpu-alert-0 {
79*724ba675SRob Herring			temperature = <60000>; /* millicelsius */
80*724ba675SRob Herring			hysteresis = <5000>; /* millicelsius */
81*724ba675SRob Herring			type = "passive";
82*724ba675SRob Herring		};
83*724ba675SRob Herring		cpu0_alert1: cpu-alert-1 {
84*724ba675SRob Herring			temperature = <80000>; /* millicelsius */
85*724ba675SRob Herring			hysteresis = <10000>; /* millicelsius */
86*724ba675SRob Herring			type = "passive";
87*724ba675SRob Herring		};
88*724ba675SRob Herring		cpu0_alert2: cpu-alert-2 {
89*724ba675SRob Herring			temperature = <110000>; /* millicelsius */
90*724ba675SRob Herring			hysteresis = <10000>; /* millicelsius */
91*724ba675SRob Herring			type = "passive";
92*724ba675SRob Herring		};
93*724ba675SRob Herring		cpu0_crit0: cpu-crit-0 {
94*724ba675SRob Herring			temperature = <120000>; /* millicelsius */
95*724ba675SRob Herring			hysteresis = <0>; /* millicelsius */
96*724ba675SRob Herring			type = "critical";
97*724ba675SRob Herring		};
98*724ba675SRob Herring	};
99*724ba675SRob Herring
100*724ba675SRob Herring	cooling-maps {
101*724ba675SRob Herring		/*
102*724ba675SRob Herring		 * Reduce the CPU speed by 2 steps, down to: 1600 MHz
103*724ba675SRob Herring		 * and 1100 MHz.
104*724ba675SRob Herring		 */
105*724ba675SRob Herring		map0 {
106*724ba675SRob Herring			trip = <&cpu0_alert0>;
107*724ba675SRob Herring			cooling-device = <&cpu0 0 2>,
108*724ba675SRob Herring					 <&cpu1 0 2>,
109*724ba675SRob Herring					 <&cpu2 0 2>,
110*724ba675SRob Herring					 <&cpu3 0 2>,
111*724ba675SRob Herring					 <&cpu4 0 2>,
112*724ba675SRob Herring					 <&cpu5 0 2>,
113*724ba675SRob Herring					 <&cpu6 0 2>,
114*724ba675SRob Herring					 <&cpu7 0 2>;
115*724ba675SRob Herring		};
116*724ba675SRob Herring
117*724ba675SRob Herring		/*
118*724ba675SRob Herring		 * Reduce the CPU speed down to 1200 MHz big (6 steps)
119*724ba675SRob Herring		 * and 800 MHz LITTLE (5 steps).
120*724ba675SRob Herring		 */
121*724ba675SRob Herring		map1 {
122*724ba675SRob Herring			trip = <&cpu0_alert1>;
123*724ba675SRob Herring			cooling-device = <&cpu0 3 6>,
124*724ba675SRob Herring					 <&cpu1 3 6>,
125*724ba675SRob Herring					 <&cpu2 3 6>,
126*724ba675SRob Herring					 <&cpu3 3 6>,
127*724ba675SRob Herring					 <&cpu4 3 5>,
128*724ba675SRob Herring					 <&cpu5 3 5>,
129*724ba675SRob Herring					 <&cpu6 3 5>,
130*724ba675SRob Herring					 <&cpu7 3 5>;
131*724ba675SRob Herring		};
132*724ba675SRob Herring
133*724ba675SRob Herring		/*
134*724ba675SRob Herring		 * Reduce the CPU speed as much as possible, down to 700 MHz
135*724ba675SRob Herring		 * big (11 steps) and 600 MHz LITTLE (7 steps).
136*724ba675SRob Herring		 */
137*724ba675SRob Herring		map2 {
138*724ba675SRob Herring			trip = <&cpu0_alert2>;
139*724ba675SRob Herring			cooling-device = <&cpu0 6 11>,
140*724ba675SRob Herring					 <&cpu1 6 11>,
141*724ba675SRob Herring					 <&cpu2 6 11>,
142*724ba675SRob Herring					 <&cpu3 6 11>,
143*724ba675SRob Herring					 <&cpu4 5 7>,
144*724ba675SRob Herring					 <&cpu5 5 7>,
145*724ba675SRob Herring					 <&cpu6 5 7>,
146*724ba675SRob Herring					 <&cpu7 5 7>;
147*724ba675SRob Herring		};
148*724ba675SRob Herring	};
149*724ba675SRob Herring};
150*724ba675SRob Herring
151*724ba675SRob Herring&cpu1_thermal {
152*724ba675SRob Herring	trips {
153*724ba675SRob Herring		cpu1_alert0: cpu-alert-0 {
154*724ba675SRob Herring			temperature = <60000>; /* millicelsius */
155*724ba675SRob Herring			hysteresis = <5000>; /* millicelsius */
156*724ba675SRob Herring			type = "passive";
157*724ba675SRob Herring		};
158*724ba675SRob Herring		cpu1_alert1: cpu-alert-1 {
159*724ba675SRob Herring			temperature = <80000>; /* millicelsius */
160*724ba675SRob Herring			hysteresis = <10000>; /* millicelsius */
161*724ba675SRob Herring			type = "passive";
162*724ba675SRob Herring		};
163*724ba675SRob Herring		cpu1_alert2: cpu-alert-2 {
164*724ba675SRob Herring			temperature = <110000>; /* millicelsius */
165*724ba675SRob Herring			hysteresis = <10000>; /* millicelsius */
166*724ba675SRob Herring			type = "passive";
167*724ba675SRob Herring		};
168*724ba675SRob Herring		cpu1_crit0: cpu-crit-0 {
169*724ba675SRob Herring			temperature = <120000>; /* millicelsius */
170*724ba675SRob Herring			hysteresis = <0>; /* millicelsius */
171*724ba675SRob Herring			type = "critical";
172*724ba675SRob Herring		};
173*724ba675SRob Herring	};
174*724ba675SRob Herring
175*724ba675SRob Herring	cooling-maps {
176*724ba675SRob Herring		map0 {
177*724ba675SRob Herring			trip = <&cpu1_alert0>;
178*724ba675SRob Herring			cooling-device = <&cpu0 0 2>,
179*724ba675SRob Herring					 <&cpu1 0 2>,
180*724ba675SRob Herring					 <&cpu2 0 2>,
181*724ba675SRob Herring					 <&cpu3 0 2>,
182*724ba675SRob Herring					 <&cpu4 0 2>,
183*724ba675SRob Herring					 <&cpu5 0 2>,
184*724ba675SRob Herring					 <&cpu6 0 2>,
185*724ba675SRob Herring					 <&cpu7 0 2>;
186*724ba675SRob Herring		};
187*724ba675SRob Herring
188*724ba675SRob Herring		map1 {
189*724ba675SRob Herring			trip = <&cpu1_alert1>;
190*724ba675SRob Herring			cooling-device = <&cpu0 3 6>,
191*724ba675SRob Herring					 <&cpu1 3 6>,
192*724ba675SRob Herring					 <&cpu2 3 6>,
193*724ba675SRob Herring					 <&cpu3 3 6>,
194*724ba675SRob Herring					 <&cpu4 3 5>,
195*724ba675SRob Herring					 <&cpu5 3 5>,
196*724ba675SRob Herring					 <&cpu6 3 5>,
197*724ba675SRob Herring					 <&cpu7 3 5>;
198*724ba675SRob Herring		};
199*724ba675SRob Herring
200*724ba675SRob Herring		map2 {
201*724ba675SRob Herring			trip = <&cpu1_alert2>;
202*724ba675SRob Herring			cooling-device = <&cpu0 6 11>,
203*724ba675SRob Herring					 <&cpu1 6 11>,
204*724ba675SRob Herring					 <&cpu2 6 11>,
205*724ba675SRob Herring					 <&cpu3 6 11>,
206*724ba675SRob Herring					 <&cpu4 5 7>,
207*724ba675SRob Herring					 <&cpu5 5 7>,
208*724ba675SRob Herring					 <&cpu6 5 7>,
209*724ba675SRob Herring					 <&cpu7 5 7>;
210*724ba675SRob Herring		};
211*724ba675SRob Herring	};
212*724ba675SRob Herring};
213*724ba675SRob Herring
214*724ba675SRob Herring&cpu2_thermal {
215*724ba675SRob Herring	trips {
216*724ba675SRob Herring		cpu2_alert0: cpu-alert-0 {
217*724ba675SRob Herring			temperature = <60000>; /* millicelsius */
218*724ba675SRob Herring			hysteresis = <5000>; /* millicelsius */
219*724ba675SRob Herring			type = "passive";
220*724ba675SRob Herring		};
221*724ba675SRob Herring		cpu2_alert1: cpu-alert-1 {
222*724ba675SRob Herring			temperature = <80000>; /* millicelsius */
223*724ba675SRob Herring			hysteresis = <10000>; /* millicelsius */
224*724ba675SRob Herring			type = "passive";
225*724ba675SRob Herring		};
226*724ba675SRob Herring		cpu2_alert2: cpu-alert-2 {
227*724ba675SRob Herring			temperature = <110000>; /* millicelsius */
228*724ba675SRob Herring			hysteresis = <10000>; /* millicelsius */
229*724ba675SRob Herring			type = "passive";
230*724ba675SRob Herring		};
231*724ba675SRob Herring		cpu2_crit0: cpu-crit-0 {
232*724ba675SRob Herring			temperature = <120000>; /* millicelsius */
233*724ba675SRob Herring			hysteresis = <0>; /* millicelsius */
234*724ba675SRob Herring			type = "critical";
235*724ba675SRob Herring		};
236*724ba675SRob Herring	};
237*724ba675SRob Herring
238*724ba675SRob Herring	cooling-maps {
239*724ba675SRob Herring		map0 {
240*724ba675SRob Herring			trip = <&cpu2_alert0>;
241*724ba675SRob Herring			cooling-device = <&cpu0 0 2>,
242*724ba675SRob Herring					 <&cpu1 0 2>,
243*724ba675SRob Herring					 <&cpu2 0 2>,
244*724ba675SRob Herring					 <&cpu3 0 2>,
245*724ba675SRob Herring					 <&cpu4 0 2>,
246*724ba675SRob Herring					 <&cpu5 0 2>,
247*724ba675SRob Herring					 <&cpu6 0 2>,
248*724ba675SRob Herring					 <&cpu7 0 2>;
249*724ba675SRob Herring		};
250*724ba675SRob Herring
251*724ba675SRob Herring		map1 {
252*724ba675SRob Herring			trip = <&cpu2_alert1>;
253*724ba675SRob Herring			cooling-device = <&cpu0 3 6>,
254*724ba675SRob Herring					 <&cpu1 3 6>,
255*724ba675SRob Herring					 <&cpu2 3 6>,
256*724ba675SRob Herring					 <&cpu3 3 6>,
257*724ba675SRob Herring					 <&cpu4 3 5>,
258*724ba675SRob Herring					 <&cpu5 3 5>,
259*724ba675SRob Herring					 <&cpu6 3 5>,
260*724ba675SRob Herring					 <&cpu7 3 5>;
261*724ba675SRob Herring		};
262*724ba675SRob Herring
263*724ba675SRob Herring		map2 {
264*724ba675SRob Herring			trip = <&cpu2_alert2>;
265*724ba675SRob Herring			cooling-device = <&cpu0 6 11>,
266*724ba675SRob Herring					 <&cpu1 6 11>,
267*724ba675SRob Herring					 <&cpu2 6 11>,
268*724ba675SRob Herring					 <&cpu3 6 11>,
269*724ba675SRob Herring					 <&cpu4 6 7>,
270*724ba675SRob Herring					 <&cpu5 6 7>,
271*724ba675SRob Herring					 <&cpu6 6 7>,
272*724ba675SRob Herring					 <&cpu7 6 7>;
273*724ba675SRob Herring		};
274*724ba675SRob Herring	};
275*724ba675SRob Herring};
276*724ba675SRob Herring
277*724ba675SRob Herring&cpu3_thermal {
278*724ba675SRob Herring	trips {
279*724ba675SRob Herring		cpu3_alert0: cpu-alert-0 {
280*724ba675SRob Herring			temperature = <60000>; /* millicelsius */
281*724ba675SRob Herring			hysteresis = <5000>; /* millicelsius */
282*724ba675SRob Herring			type = "passive";
283*724ba675SRob Herring		};
284*724ba675SRob Herring		cpu3_alert1: cpu-alert-1 {
285*724ba675SRob Herring			temperature = <80000>; /* millicelsius */
286*724ba675SRob Herring			hysteresis = <10000>; /* millicelsius */
287*724ba675SRob Herring			type = "passive";
288*724ba675SRob Herring		};
289*724ba675SRob Herring		cpu3_alert2: cpu-alert-2 {
290*724ba675SRob Herring			temperature = <110000>; /* millicelsius */
291*724ba675SRob Herring			hysteresis = <10000>; /* millicelsius */
292*724ba675SRob Herring			type = "passive";
293*724ba675SRob Herring		};
294*724ba675SRob Herring		cpu3_crit0: cpu-crit-0 {
295*724ba675SRob Herring			temperature = <120000>; /* millicelsius */
296*724ba675SRob Herring			hysteresis = <0>; /* millicelsius */
297*724ba675SRob Herring			type = "critical";
298*724ba675SRob Herring		};
299*724ba675SRob Herring	};
300*724ba675SRob Herring
301*724ba675SRob Herring	cooling-maps {
302*724ba675SRob Herring		map0 {
303*724ba675SRob Herring			trip = <&cpu3_alert0>;
304*724ba675SRob Herring			cooling-device = <&cpu0 0 2>,
305*724ba675SRob Herring					 <&cpu1 0 2>,
306*724ba675SRob Herring					 <&cpu2 0 2>,
307*724ba675SRob Herring					 <&cpu3 0 2>,
308*724ba675SRob Herring					 <&cpu4 0 2>,
309*724ba675SRob Herring					 <&cpu5 0 2>,
310*724ba675SRob Herring					 <&cpu6 0 2>,
311*724ba675SRob Herring					 <&cpu7 0 2>;
312*724ba675SRob Herring		};
313*724ba675SRob Herring
314*724ba675SRob Herring		map1 {
315*724ba675SRob Herring			trip = <&cpu3_alert1>;
316*724ba675SRob Herring			cooling-device = <&cpu0 3 6>,
317*724ba675SRob Herring					 <&cpu1 3 6>,
318*724ba675SRob Herring					 <&cpu2 3 6>,
319*724ba675SRob Herring					 <&cpu3 3 6>,
320*724ba675SRob Herring					 <&cpu4 3 5>,
321*724ba675SRob Herring					 <&cpu5 3 5>,
322*724ba675SRob Herring					 <&cpu6 3 5>,
323*724ba675SRob Herring					 <&cpu7 3 5>;
324*724ba675SRob Herring		};
325*724ba675SRob Herring
326*724ba675SRob Herring		map2 {
327*724ba675SRob Herring			trip = <&cpu3_alert2>;
328*724ba675SRob Herring			cooling-device = <&cpu0 6 11>,
329*724ba675SRob Herring					 <&cpu1 6 11>,
330*724ba675SRob Herring					 <&cpu2 6 11>,
331*724ba675SRob Herring					 <&cpu3 6 11>,
332*724ba675SRob Herring					 <&cpu4 5 7>,
333*724ba675SRob Herring					 <&cpu5 5 7>,
334*724ba675SRob Herring					 <&cpu6 5 7>,
335*724ba675SRob Herring					 <&cpu7 5 7>;
336*724ba675SRob Herring		};
337*724ba675SRob Herring	};
338*724ba675SRob Herring};
339*724ba675SRob Herring
340*724ba675SRob Herring&hdmi {
341*724ba675SRob Herring	hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
342*724ba675SRob Herring	vdd_osc-supply = <&ldo7_reg>;
343*724ba675SRob Herring	vdd_pll-supply = <&ldo6_reg>;
344*724ba675SRob Herring	vdd-supply = <&ldo6_reg>;
345*724ba675SRob Herring	ddc = <&i2c_2>;
346*724ba675SRob Herring	status = "okay";
347*724ba675SRob Herring};
348*724ba675SRob Herring
349*724ba675SRob Herring&hsi2c_4 {
350*724ba675SRob Herring	status = "okay";
351*724ba675SRob Herring
352*724ba675SRob Herring	pmic@66 {
353*724ba675SRob Herring		compatible = "samsung,s2mps11-pmic";
354*724ba675SRob Herring		reg = <0x66>;
355*724ba675SRob Herring
356*724ba675SRob Herring		interrupt-parent = <&gpx3>;
357*724ba675SRob Herring		interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
358*724ba675SRob Herring		pinctrl-names = "default";
359*724ba675SRob Herring		pinctrl-0 = <&s2mps11_irq>;
360*724ba675SRob Herring		wakeup-source;
361*724ba675SRob Herring
362*724ba675SRob Herring		s2mps11_osc: clocks {
363*724ba675SRob Herring			compatible = "samsung,s2mps11-clk";
364*724ba675SRob Herring			#clock-cells = <1>;
365*724ba675SRob Herring			clock-output-names = "s2mps11_ap",
366*724ba675SRob Herring					"s2mps11_cp", "s2mps11_bt";
367*724ba675SRob Herring		};
368*724ba675SRob Herring
369*724ba675SRob Herring		regulators {
370*724ba675SRob Herring			ldo1_reg: LDO1 {
371*724ba675SRob Herring				regulator-name = "PVDD_ALIVE_1V0";
372*724ba675SRob Herring				regulator-min-microvolt = <1000000>;
373*724ba675SRob Herring				regulator-max-microvolt = <1000000>;
374*724ba675SRob Herring				regulator-always-on;
375*724ba675SRob Herring			};
376*724ba675SRob Herring
377*724ba675SRob Herring			ldo2_reg: LDO2 {
378*724ba675SRob Herring				regulator-name = "PVDD_APIO_1V8";
379*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
380*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
381*724ba675SRob Herring				regulator-always-on;
382*724ba675SRob Herring			};
383*724ba675SRob Herring
384*724ba675SRob Herring			ldo3_reg: LDO3 {
385*724ba675SRob Herring				regulator-name = "PVDD_APIO_MMCON_1V8";
386*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
387*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
388*724ba675SRob Herring				/*
389*724ba675SRob Herring				 * Must be always on, even though there is
390*724ba675SRob Herring				 * a consumer (mmc_0).  Otherwise the board
391*724ba675SRob Herring				 * does not reboot with vendor U-Boot
392*724ba675SRob Herring				 * (Linaro for Arndale Octa, v2012.07).
393*724ba675SRob Herring				 */
394*724ba675SRob Herring				regulator-always-on;
395*724ba675SRob Herring
396*724ba675SRob Herring				regulator-state-mem {
397*724ba675SRob Herring					regulator-off-in-suspend;
398*724ba675SRob Herring				};
399*724ba675SRob Herring			};
400*724ba675SRob Herring
401*724ba675SRob Herring			ldo4_reg: LDO4 {
402*724ba675SRob Herring				regulator-name = "PVDD_ADC_1V8";
403*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
404*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
405*724ba675SRob Herring			};
406*724ba675SRob Herring
407*724ba675SRob Herring			ldo5_reg: LDO5 {
408*724ba675SRob Herring				regulator-name = "PVDD_PLL_1V8";
409*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
410*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
411*724ba675SRob Herring				regulator-always-on;
412*724ba675SRob Herring			};
413*724ba675SRob Herring
414*724ba675SRob Herring			ldo6_reg: LDO6 {
415*724ba675SRob Herring				regulator-name = "PVDD_ANAIP_1V0";
416*724ba675SRob Herring				regulator-min-microvolt = <1000000>;
417*724ba675SRob Herring				regulator-max-microvolt = <1000000>;
418*724ba675SRob Herring			};
419*724ba675SRob Herring
420*724ba675SRob Herring			ldo7_reg: LDO7 {
421*724ba675SRob Herring				regulator-name = "PVDD_ANAIP_1V8";
422*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
423*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
424*724ba675SRob Herring
425*724ba675SRob Herring				regulator-state-mem {
426*724ba675SRob Herring					regulator-off-in-suspend;
427*724ba675SRob Herring				};
428*724ba675SRob Herring			};
429*724ba675SRob Herring
430*724ba675SRob Herring			ldo8_reg: LDO8 {
431*724ba675SRob Herring				regulator-name = "PVDD_ABB_1V8";
432*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
433*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
434*724ba675SRob Herring				regulator-always-on;
435*724ba675SRob Herring			};
436*724ba675SRob Herring
437*724ba675SRob Herring			ldo9_reg: LDO9 {
438*724ba675SRob Herring				regulator-name = "PVDD_USB_3V3";
439*724ba675SRob Herring				regulator-min-microvolt = <3000000>;
440*724ba675SRob Herring				regulator-max-microvolt = <3000000>;
441*724ba675SRob Herring				regulator-always-on;
442*724ba675SRob Herring			};
443*724ba675SRob Herring
444*724ba675SRob Herring			ldo10_reg: LDO10 {
445*724ba675SRob Herring				regulator-name = "PVDD_PRE_1V8";
446*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
447*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
448*724ba675SRob Herring				regulator-always-on;
449*724ba675SRob Herring			};
450*724ba675SRob Herring
451*724ba675SRob Herring			ldo11_reg: LDO11 {
452*724ba675SRob Herring				regulator-name = "PVDD_USB_1V0";
453*724ba675SRob Herring				regulator-min-microvolt = <1000000>;
454*724ba675SRob Herring				regulator-max-microvolt = <1000000>;
455*724ba675SRob Herring				regulator-always-on;
456*724ba675SRob Herring			};
457*724ba675SRob Herring
458*724ba675SRob Herring			ldo12_reg: LDO12 {
459*724ba675SRob Herring				regulator-name = "PVDD_HSIC_1V8";
460*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
461*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
462*724ba675SRob Herring			};
463*724ba675SRob Herring
464*724ba675SRob Herring			ldo13_reg: LDO13 {
465*724ba675SRob Herring				regulator-name = "PVDD_APIO_MMCOFF_2V8";
466*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
467*724ba675SRob Herring				regulator-max-microvolt = <2800000>;
468*724ba675SRob Herring
469*724ba675SRob Herring				regulator-state-mem {
470*724ba675SRob Herring					regulator-off-in-suspend;
471*724ba675SRob Herring				};
472*724ba675SRob Herring			};
473*724ba675SRob Herring
474*724ba675SRob Herring			ldo14_reg: LDO14 {
475*724ba675SRob Herring				/* Unused */
476*724ba675SRob Herring				regulator-name = "PVDD_LDO14";
477*724ba675SRob Herring				regulator-min-microvolt = <800000>;
478*724ba675SRob Herring				regulator-max-microvolt = <3950000>;
479*724ba675SRob Herring			};
480*724ba675SRob Herring
481*724ba675SRob Herring			ldo15_reg: LDO15 {
482*724ba675SRob Herring				regulator-name = "PVDD_PERI_2V8";
483*724ba675SRob Herring				regulator-min-microvolt = <3300000>;
484*724ba675SRob Herring				regulator-max-microvolt = <3300000>;
485*724ba675SRob Herring
486*724ba675SRob Herring				regulator-state-mem {
487*724ba675SRob Herring					regulator-on-in-suspend;
488*724ba675SRob Herring				};
489*724ba675SRob Herring			};
490*724ba675SRob Herring
491*724ba675SRob Herring			ldo16_reg: LDO16 {
492*724ba675SRob Herring				regulator-name = "PVDD_PERI_3V3";
493*724ba675SRob Herring				regulator-min-microvolt = <2200000>;
494*724ba675SRob Herring				regulator-max-microvolt = <2200000>;
495*724ba675SRob Herring
496*724ba675SRob Herring				regulator-state-mem {
497*724ba675SRob Herring					regulator-on-in-suspend;
498*724ba675SRob Herring				};
499*724ba675SRob Herring			};
500*724ba675SRob Herring
501*724ba675SRob Herring			ldo17_reg: LDO17 {
502*724ba675SRob Herring				/* Unused */
503*724ba675SRob Herring				regulator-name = "PVDD_LDO17";
504*724ba675SRob Herring				regulator-min-microvolt = <800000>;
505*724ba675SRob Herring				regulator-max-microvolt = <3950000>;
506*724ba675SRob Herring			};
507*724ba675SRob Herring
508*724ba675SRob Herring			ldo18_reg: LDO18 {
509*724ba675SRob Herring				regulator-name = "PVDD_EMMC_1V8";
510*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
511*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
512*724ba675SRob Herring				/*
513*724ba675SRob Herring				 * Must stay in "off" mode during shutdown for
514*724ba675SRob Herring				 * proper eMMC reset.  The "off" mode is in
515*724ba675SRob Herring				 * fact controlled by LDO18EN.  The eMMC does
516*724ba675SRob Herring				 * not have reset pin connected so the reset
517*724ba675SRob Herring				 * will be triggered by falling edge of
518*724ba675SRob Herring				 * LDO18EN.
519*724ba675SRob Herring				 */
520*724ba675SRob Herring
521*724ba675SRob Herring				regulator-state-mem {
522*724ba675SRob Herring					regulator-off-in-suspend;
523*724ba675SRob Herring				};
524*724ba675SRob Herring			};
525*724ba675SRob Herring
526*724ba675SRob Herring			ldo19_reg: LDO19 {
527*724ba675SRob Herring				regulator-name = "PVDD_TFLASH_2V8";
528*724ba675SRob Herring				regulator-min-microvolt = <2800000>;
529*724ba675SRob Herring				regulator-max-microvolt = <2800000>;
530*724ba675SRob Herring
531*724ba675SRob Herring				regulator-state-mem {
532*724ba675SRob Herring					regulator-off-in-suspend;
533*724ba675SRob Herring				};
534*724ba675SRob Herring			};
535*724ba675SRob Herring
536*724ba675SRob Herring			ldo20_reg: LDO20 {
537*724ba675SRob Herring				regulator-name = "PVDD_BTWIFI_1V8";
538*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
539*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
540*724ba675SRob Herring			};
541*724ba675SRob Herring
542*724ba675SRob Herring			ldo21_reg: LDO21 {
543*724ba675SRob Herring				regulator-name = "PVDD_CAM1IO_1V8";
544*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
545*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
546*724ba675SRob Herring			};
547*724ba675SRob Herring
548*724ba675SRob Herring			ldo22_reg: LDO22 {
549*724ba675SRob Herring				/* Unused */
550*724ba675SRob Herring				regulator-name = "PVDD_LDO22";
551*724ba675SRob Herring				regulator-min-microvolt = <800000>;
552*724ba675SRob Herring				regulator-max-microvolt = <2375000>;
553*724ba675SRob Herring			};
554*724ba675SRob Herring
555*724ba675SRob Herring			ldo23_reg: LDO23 {
556*724ba675SRob Herring				regulator-name = "PVDD_MIFS_1V1";
557*724ba675SRob Herring				regulator-min-microvolt = <800000>;
558*724ba675SRob Herring				regulator-max-microvolt = <1100000>;
559*724ba675SRob Herring				regulator-always-on;
560*724ba675SRob Herring
561*724ba675SRob Herring				regulator-state-mem {
562*724ba675SRob Herring					regulator-on-in-suspend;
563*724ba675SRob Herring				};
564*724ba675SRob Herring			};
565*724ba675SRob Herring
566*724ba675SRob Herring			ldo24_reg: LDO24 {
567*724ba675SRob Herring				regulator-name = "PVDD_CAM1_AVDD_2V8";
568*724ba675SRob Herring				regulator-min-microvolt = <2800000>;
569*724ba675SRob Herring				regulator-max-microvolt = <2800000>;
570*724ba675SRob Herring
571*724ba675SRob Herring				regulator-state-mem {
572*724ba675SRob Herring					regulator-on-in-suspend;
573*724ba675SRob Herring				};
574*724ba675SRob Herring			};
575*724ba675SRob Herring
576*724ba675SRob Herring			ldo25_reg: LDO25 {
577*724ba675SRob Herring				/* Unused */
578*724ba675SRob Herring				regulator-name = "PVDD_LDO25";
579*724ba675SRob Herring				regulator-min-microvolt = <800000>;
580*724ba675SRob Herring				regulator-max-microvolt = <3950000>;
581*724ba675SRob Herring			};
582*724ba675SRob Herring
583*724ba675SRob Herring			ldo26_reg: LDO26 {
584*724ba675SRob Herring				regulator-name = "PVDD_CAM0_AF_2V8";
585*724ba675SRob Herring				regulator-min-microvolt = <3000000>;
586*724ba675SRob Herring				regulator-max-microvolt = <3000000>;
587*724ba675SRob Herring			};
588*724ba675SRob Herring
589*724ba675SRob Herring			ldo27_reg: LDO27 {
590*724ba675SRob Herring				regulator-name = "PVDD_G3DS_1V0";
591*724ba675SRob Herring				regulator-min-microvolt = <800000>;
592*724ba675SRob Herring				regulator-max-microvolt = <1100000>;
593*724ba675SRob Herring				regulator-always-on;
594*724ba675SRob Herring
595*724ba675SRob Herring				regulator-state-mem {
596*724ba675SRob Herring					regulator-on-in-suspend;
597*724ba675SRob Herring				};
598*724ba675SRob Herring			};
599*724ba675SRob Herring
600*724ba675SRob Herring			ldo28_reg: LDO28 {
601*724ba675SRob Herring				regulator-name = "PVDD_TSP_3V3";
602*724ba675SRob Herring				regulator-min-microvolt = <3300000>;
603*724ba675SRob Herring				regulator-max-microvolt = <3300000>;
604*724ba675SRob Herring			};
605*724ba675SRob Herring
606*724ba675SRob Herring			ldo29_reg: LDO29 {
607*724ba675SRob Herring				regulator-name = "PVDD_AUDIO_1V8";
608*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
609*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
610*724ba675SRob Herring			};
611*724ba675SRob Herring
612*724ba675SRob Herring			ldo30_reg: LDO30 {
613*724ba675SRob Herring				/* Unused */
614*724ba675SRob Herring				regulator-name = "PVDD_LDO30";
615*724ba675SRob Herring				regulator-min-microvolt = <800000>;
616*724ba675SRob Herring				regulator-max-microvolt = <3950000>;
617*724ba675SRob Herring			};
618*724ba675SRob Herring
619*724ba675SRob Herring			ldo31_reg: LDO31 {
620*724ba675SRob Herring				regulator-name = "PVDD_PERI_1V8";
621*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
622*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
623*724ba675SRob Herring			};
624*724ba675SRob Herring
625*724ba675SRob Herring			ldo32_reg: LDO32 {
626*724ba675SRob Herring				regulator-name = "PVDD_LCD_1V8";
627*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
628*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
629*724ba675SRob Herring			};
630*724ba675SRob Herring
631*724ba675SRob Herring			ldo33_reg: LDO33 {
632*724ba675SRob Herring				regulator-name = "PVDD_CAM0IO_1V8";
633*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
634*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
635*724ba675SRob Herring			};
636*724ba675SRob Herring
637*724ba675SRob Herring			ldo34_reg: LDO34 {
638*724ba675SRob Herring				/* Unused */
639*724ba675SRob Herring				regulator-name = "PVDD_LDO34";
640*724ba675SRob Herring				regulator-min-microvolt = <800000>;
641*724ba675SRob Herring				regulator-max-microvolt = <3950000>;
642*724ba675SRob Herring			};
643*724ba675SRob Herring
644*724ba675SRob Herring			ldo35_reg: LDO35 {
645*724ba675SRob Herring				regulator-name = "PVDD_CAM0_DVDD_1V2";
646*724ba675SRob Herring				regulator-min-microvolt = <1200000>;
647*724ba675SRob Herring				regulator-max-microvolt = <1200000>;
648*724ba675SRob Herring			};
649*724ba675SRob Herring
650*724ba675SRob Herring			ldo36_reg: LDO36 {
651*724ba675SRob Herring				/* Unused */
652*724ba675SRob Herring				regulator-name = "PVDD_LDO36";
653*724ba675SRob Herring				regulator-min-microvolt = <800000>;
654*724ba675SRob Herring				regulator-max-microvolt = <3950000>;
655*724ba675SRob Herring			};
656*724ba675SRob Herring
657*724ba675SRob Herring			ldo37_reg: LDO37 {
658*724ba675SRob Herring				/* Unused */
659*724ba675SRob Herring				regulator-name = "PVDD_LDO37";
660*724ba675SRob Herring				regulator-min-microvolt = <800000>;
661*724ba675SRob Herring				regulator-max-microvolt = <3950000>;
662*724ba675SRob Herring			};
663*724ba675SRob Herring
664*724ba675SRob Herring			ldo38_reg: LDO38 {
665*724ba675SRob Herring				regulator-name = "PVDD_CAM0_AVDD_2V8";
666*724ba675SRob Herring				regulator-min-microvolt = <2800000>;
667*724ba675SRob Herring				regulator-max-microvolt = <2800000>;
668*724ba675SRob Herring			};
669*724ba675SRob Herring
670*724ba675SRob Herring			buck1_reg: BUCK1 {
671*724ba675SRob Herring				regulator-name = "PVDD_MIF_1V1";
672*724ba675SRob Herring				regulator-min-microvolt = <800000>;
673*724ba675SRob Herring				regulator-max-microvolt = <1300000>;
674*724ba675SRob Herring				regulator-always-on;
675*724ba675SRob Herring
676*724ba675SRob Herring				regulator-state-mem {
677*724ba675SRob Herring					regulator-off-in-suspend;
678*724ba675SRob Herring				};
679*724ba675SRob Herring			};
680*724ba675SRob Herring
681*724ba675SRob Herring			buck2_reg: BUCK2 {
682*724ba675SRob Herring				regulator-name = "PVDD_ARM_1V0";
683*724ba675SRob Herring				regulator-min-microvolt = <800000>;
684*724ba675SRob Herring				regulator-max-microvolt = <1500000>;
685*724ba675SRob Herring				regulator-always-on;
686*724ba675SRob Herring
687*724ba675SRob Herring				regulator-state-mem {
688*724ba675SRob Herring					regulator-off-in-suspend;
689*724ba675SRob Herring				};
690*724ba675SRob Herring			};
691*724ba675SRob Herring
692*724ba675SRob Herring			buck3_reg: BUCK3 {
693*724ba675SRob Herring				regulator-name = "PVDD_INT_1V0";
694*724ba675SRob Herring				regulator-min-microvolt = <800000>;
695*724ba675SRob Herring				regulator-max-microvolt = <1400000>;
696*724ba675SRob Herring				regulator-always-on;
697*724ba675SRob Herring
698*724ba675SRob Herring				regulator-state-mem {
699*724ba675SRob Herring					regulator-off-in-suspend;
700*724ba675SRob Herring				};
701*724ba675SRob Herring			};
702*724ba675SRob Herring
703*724ba675SRob Herring			buck4_reg: BUCK4 {
704*724ba675SRob Herring				regulator-name = "PVDD_G3D_1V0";
705*724ba675SRob Herring				regulator-min-microvolt = <800000>;
706*724ba675SRob Herring				regulator-max-microvolt = <1400000>;
707*724ba675SRob Herring				regulator-always-on;
708*724ba675SRob Herring
709*724ba675SRob Herring				regulator-state-mem {
710*724ba675SRob Herring					regulator-off-in-suspend;
711*724ba675SRob Herring				};
712*724ba675SRob Herring			};
713*724ba675SRob Herring
714*724ba675SRob Herring			buck5_reg: BUCK5 {
715*724ba675SRob Herring				regulator-name = "PVDD_LPDDR3_1V2";
716*724ba675SRob Herring				regulator-min-microvolt = <800000>;
717*724ba675SRob Herring				regulator-max-microvolt = <1400000>;
718*724ba675SRob Herring				regulator-always-on;
719*724ba675SRob Herring			};
720*724ba675SRob Herring
721*724ba675SRob Herring			buck6_reg: BUCK6 {
722*724ba675SRob Herring				regulator-name = "PVDD_KFC_1V0";
723*724ba675SRob Herring				regulator-min-microvolt = <800000>;
724*724ba675SRob Herring				regulator-max-microvolt = <1500000>;
725*724ba675SRob Herring				regulator-always-on;
726*724ba675SRob Herring
727*724ba675SRob Herring				regulator-state-mem {
728*724ba675SRob Herring					regulator-off-in-suspend;
729*724ba675SRob Herring				};
730*724ba675SRob Herring			};
731*724ba675SRob Herring
732*724ba675SRob Herring			buck7_reg: BUCK7 {
733*724ba675SRob Herring				regulator-name = "VIN_LLDO_1V4";
734*724ba675SRob Herring				regulator-min-microvolt = <1200000>;
735*724ba675SRob Herring				regulator-max-microvolt = <1500000>;
736*724ba675SRob Herring				regulator-always-on;
737*724ba675SRob Herring			};
738*724ba675SRob Herring
739*724ba675SRob Herring			buck8_reg: BUCK8 {
740*724ba675SRob Herring				regulator-name = "VIN_MLDO_2V0";
741*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
742*724ba675SRob Herring				regulator-max-microvolt = <2100000>;
743*724ba675SRob Herring				regulator-always-on;
744*724ba675SRob Herring			};
745*724ba675SRob Herring
746*724ba675SRob Herring			buck9_reg: BUCK9 {
747*724ba675SRob Herring				regulator-name = "VIN_HLDO_3V5";
748*724ba675SRob Herring				regulator-min-microvolt = <3000000>;
749*724ba675SRob Herring				regulator-max-microvolt = <3500000>;
750*724ba675SRob Herring				regulator-always-on;
751*724ba675SRob Herring			};
752*724ba675SRob Herring
753*724ba675SRob Herring			buck10_reg: BUCK10 {
754*724ba675SRob Herring				regulator-name = "PVDD_EMMCF_2V8";
755*724ba675SRob Herring				regulator-min-microvolt = <2800000>;
756*724ba675SRob Herring				regulator-max-microvolt = <2800000>;
757*724ba675SRob Herring				/*
758*724ba675SRob Herring				 * Must stay in "off" mode during shutdown for
759*724ba675SRob Herring				 * proper eMMC reset.  The "off" mode is in
760*724ba675SRob Herring				 * fact controlled by BUCK10EN.  The eMMC does
761*724ba675SRob Herring				 * not have reset pin connected so the reset
762*724ba675SRob Herring				 * will be triggered by falling edge of
763*724ba675SRob Herring				 * BUCK10EN.
764*724ba675SRob Herring				 */
765*724ba675SRob Herring
766*724ba675SRob Herring				regulator-state-mem {
767*724ba675SRob Herring					regulator-off-in-suspend;
768*724ba675SRob Herring				};
769*724ba675SRob Herring			};
770*724ba675SRob Herring		};
771*724ba675SRob Herring	};
772*724ba675SRob Herring};
773*724ba675SRob Herring
774*724ba675SRob Herring&i2c_2 {
775*724ba675SRob Herring	status = "okay";
776*724ba675SRob Herring};
777*724ba675SRob Herring
778*724ba675SRob Herring&mixer {
779*724ba675SRob Herring	status = "okay";
780*724ba675SRob Herring};
781*724ba675SRob Herring
782*724ba675SRob Herring&mmc_0 {
783*724ba675SRob Herring	status = "okay";
784*724ba675SRob Herring	non-removable;
785*724ba675SRob Herring	card-detect-delay = <200>;
786*724ba675SRob Herring	mmc-ddr-1_8v;
787*724ba675SRob Herring	samsung,dw-mshc-ciu-div = <3>;
788*724ba675SRob Herring	samsung,dw-mshc-sdr-timing = <0 4>;
789*724ba675SRob Herring	samsung,dw-mshc-ddr-timing = <0 2>;
790*724ba675SRob Herring	pinctrl-names = "default";
791*724ba675SRob Herring	pinctrl-0 = <&sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>;
792*724ba675SRob Herring	vmmc-supply = <&ldo18_reg>;
793*724ba675SRob Herring	vqmmc-supply = <&ldo3_reg>;
794*724ba675SRob Herring	bus-width = <8>;
795*724ba675SRob Herring	cap-mmc-highspeed;
796*724ba675SRob Herring	mmc-hs200-1_8v;
797*724ba675SRob Herring};
798*724ba675SRob Herring
799*724ba675SRob Herring&mmc_2 {
800*724ba675SRob Herring	status = "okay";
801*724ba675SRob Herring	card-detect-delay = <200>;
802*724ba675SRob Herring	samsung,dw-mshc-ciu-div = <3>;
803*724ba675SRob Herring	samsung,dw-mshc-sdr-timing = <0 4>;
804*724ba675SRob Herring	samsung,dw-mshc-ddr-timing = <0 2>;
805*724ba675SRob Herring	pinctrl-names = "default";
806*724ba675SRob Herring	pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>;
807*724ba675SRob Herring	vmmc-supply = <&ldo19_reg>;
808*724ba675SRob Herring	vqmmc-supply = <&ldo13_reg>;
809*724ba675SRob Herring	bus-width = <4>;
810*724ba675SRob Herring	cap-sd-highspeed;
811*724ba675SRob Herring	sd-uhs-sdr50;
812*724ba675SRob Herring	sd-uhs-sdr104;
813*724ba675SRob Herring	sd-uhs-ddr50;
814*724ba675SRob Herring};
815*724ba675SRob Herring
816*724ba675SRob Herring&pinctrl_0 {
817*724ba675SRob Herring	s2mps11_irq: s2mps11-irq-pins {
818*724ba675SRob Herring		samsung,pins = "gpx3-2";
819*724ba675SRob Herring		samsung,pin-function = <EXYNOS_PIN_FUNC_F>;
820*724ba675SRob Herring		samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
821*724ba675SRob Herring		samsung,pin-drv = <EXYNOS5420_PIN_DRV_LV1>;
822*724ba675SRob Herring	};
823*724ba675SRob Herring};
824*724ba675SRob Herring
825*724ba675SRob Herring&rtc {
826*724ba675SRob Herring	status = "okay";
827*724ba675SRob Herring	clocks = <&clock CLK_RTC>, <&s2mps11_osc S2MPS11_CLK_AP>;
828*724ba675SRob Herring	clock-names = "rtc", "rtc_src";
829*724ba675SRob Herring};
830*724ba675SRob Herring
831*724ba675SRob Herring&usbdrd_dwc3_1 {
832*724ba675SRob Herring	dr_mode = "host";
833*724ba675SRob Herring};
834*724ba675SRob Herring
835*724ba675SRob Herring&usbdrd3_0 {
836*724ba675SRob Herring	vdd10-supply = <&ldo11_reg>;
837*724ba675SRob Herring	vdd33-supply = <&ldo9_reg>;
838*724ba675SRob Herring};
839*724ba675SRob Herring
840*724ba675SRob Herring&usbdrd3_1 {
841*724ba675SRob Herring	vdd10-supply = <&ldo11_reg>;
842*724ba675SRob Herring	vdd33-supply = <&ldo9_reg>;
843*724ba675SRob Herring};
844