1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Samsung XYREF5260 board device tree source 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (c) 2013 Samsung Electronics Co., Ltd. 6*724ba675SRob Herring * http://www.samsung.com 7*724ba675SRob Herring */ 8*724ba675SRob Herring 9*724ba675SRob Herring/dts-v1/; 10*724ba675SRob Herring#include "exynos5260.dtsi" 11*724ba675SRob Herring 12*724ba675SRob Herring/ { 13*724ba675SRob Herring model = "Samsung XYREF5260 board based on Exynos5260"; 14*724ba675SRob Herring compatible = "samsung,xyref5260", "samsung,exynos5260", "samsung,exynos5"; 15*724ba675SRob Herring 16*724ba675SRob Herring memory@20000000 { 17*724ba675SRob Herring device_type = "memory"; 18*724ba675SRob Herring reg = <0x20000000 0x80000000>; 19*724ba675SRob Herring }; 20*724ba675SRob Herring 21*724ba675SRob Herring aliases { 22*724ba675SRob Herring mmc0 = &mmc_0; 23*724ba675SRob Herring mmc1 = &mmc_2; 24*724ba675SRob Herring }; 25*724ba675SRob Herring 26*724ba675SRob Herring chosen { 27*724ba675SRob Herring stdout-path = "serial2:115200n8"; 28*724ba675SRob Herring }; 29*724ba675SRob Herring 30*724ba675SRob Herring fin_pll: xxti { 31*724ba675SRob Herring compatible = "fixed-clock"; 32*724ba675SRob Herring clock-frequency = <24000000>; 33*724ba675SRob Herring clock-output-names = "fin_pll"; 34*724ba675SRob Herring #clock-cells = <0>; 35*724ba675SRob Herring }; 36*724ba675SRob Herring 37*724ba675SRob Herring ioclk_pcm: clock-pcm-ext { 38*724ba675SRob Herring compatible = "fixed-clock"; 39*724ba675SRob Herring clock-frequency = <2048000>; 40*724ba675SRob Herring clock-output-names = "ioclk_pcm_extclk"; 41*724ba675SRob Herring #clock-cells = <0>; 42*724ba675SRob Herring }; 43*724ba675SRob Herring 44*724ba675SRob Herring ioclk_i2s: clock-i2s-cd { 45*724ba675SRob Herring compatible = "fixed-clock"; 46*724ba675SRob Herring clock-frequency = <147456000>; 47*724ba675SRob Herring clock-output-names = "ioclk_i2s_cdclk"; 48*724ba675SRob Herring #clock-cells = <0>; 49*724ba675SRob Herring }; 50*724ba675SRob Herring 51*724ba675SRob Herring ioclk_spdif: clock-spdif-ext { 52*724ba675SRob Herring compatible = "fixed-clock"; 53*724ba675SRob Herring clock-frequency = <49152000>; 54*724ba675SRob Herring clock-output-names = "ioclk_spdif_extclk"; 55*724ba675SRob Herring #clock-cells = <0>; 56*724ba675SRob Herring }; 57*724ba675SRob Herring 58*724ba675SRob Herring xrtcxti: xrtcxti { 59*724ba675SRob Herring compatible = "fixed-clock"; 60*724ba675SRob Herring clock-frequency = <32768>; 61*724ba675SRob Herring clock-output-names = "xrtcxti"; 62*724ba675SRob Herring #clock-cells = <0>; 63*724ba675SRob Herring }; 64*724ba675SRob Herring}; 65*724ba675SRob Herring 66*724ba675SRob Herring&pinctrl_0 { 67*724ba675SRob Herring hdmi_hpd_irq: hdmi-hpd-irq-pins { 68*724ba675SRob Herring samsung,pins = "gpx3-7"; 69*724ba675SRob Herring samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; 70*724ba675SRob Herring samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>; 71*724ba675SRob Herring samsung,pin-drv = <EXYNOS5260_PIN_DRV_LV1>; 72*724ba675SRob Herring }; 73*724ba675SRob Herring}; 74*724ba675SRob Herring 75*724ba675SRob Herring&uart0 { 76*724ba675SRob Herring status = "okay"; 77*724ba675SRob Herring}; 78*724ba675SRob Herring 79*724ba675SRob Herring&uart1 { 80*724ba675SRob Herring status = "okay"; 81*724ba675SRob Herring}; 82*724ba675SRob Herring 83*724ba675SRob Herring&uart2 { 84*724ba675SRob Herring status = "okay"; 85*724ba675SRob Herring}; 86*724ba675SRob Herring 87*724ba675SRob Herring&uart3 { 88*724ba675SRob Herring status = "okay"; 89*724ba675SRob Herring}; 90*724ba675SRob Herring 91*724ba675SRob Herring&mmc_0 { 92*724ba675SRob Herring status = "okay"; 93*724ba675SRob Herring broken-cd; 94*724ba675SRob Herring cap-mmc-highspeed; 95*724ba675SRob Herring mmc-hs200-1_8v; 96*724ba675SRob Herring card-detect-delay = <200>; 97*724ba675SRob Herring mmc-ddr-1_8v; 98*724ba675SRob Herring samsung,dw-mshc-ciu-div = <3>; 99*724ba675SRob Herring samsung,dw-mshc-sdr-timing = <0 4>; 100*724ba675SRob Herring samsung,dw-mshc-ddr-timing = <0 2>; 101*724ba675SRob Herring pinctrl-names = "default"; 102*724ba675SRob Herring pinctrl-0 = <&sd0_rdqs &sd0_clk &sd0_cmd &sd0_bus1 &sd0_bus4 &sd0_bus8>; 103*724ba675SRob Herring bus-width = <8>; 104*724ba675SRob Herring}; 105*724ba675SRob Herring 106*724ba675SRob Herring&mmc_2 { 107*724ba675SRob Herring status = "okay"; 108*724ba675SRob Herring cap-sd-highspeed; 109*724ba675SRob Herring card-detect-delay = <200>; 110*724ba675SRob Herring samsung,dw-mshc-ciu-div = <3>; 111*724ba675SRob Herring samsung,dw-mshc-sdr-timing = <2 3>; 112*724ba675SRob Herring samsung,dw-mshc-ddr-timing = <1 2>; 113*724ba675SRob Herring pinctrl-names = "default"; 114*724ba675SRob Herring pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus1 &sd2_bus4>; 115*724ba675SRob Herring bus-width = <4>; 116*724ba675SRob Herring disable-wp; 117*724ba675SRob Herring}; 118