1724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright (c) 2020 Rockchip Electronics Co., Ltd. 4724ba675SRob Herring * Copyright (c) 2022 Edgeble AI Technologies Pvt. Ltd. 5724ba675SRob Herring */ 6724ba675SRob Herring 7724ba675SRob Herring/dts-v1/; 8724ba675SRob Herring#include "rv1126.dtsi" 9724ba675SRob Herring#include "rv1126-edgeble-neu2.dtsi" 10724ba675SRob Herring 11724ba675SRob Herring/ { 12724ba675SRob Herring model = "Edgeble Neu2 IO Board"; 13724ba675SRob Herring compatible = "edgeble,neural-compute-module-2-io", 14724ba675SRob Herring "edgeble,neural-compute-module-2", "rockchip,rv1126"; 15724ba675SRob Herring 16724ba675SRob Herring aliases { 17724ba675SRob Herring serial2 = &uart2; 18724ba675SRob Herring }; 19724ba675SRob Herring 20724ba675SRob Herring chosen { 21724ba675SRob Herring stdout-path = "serial2:1500000n8"; 22724ba675SRob Herring }; 23*5d1d164dSJagan Teki 24*5d1d164dSJagan Teki v3v3_sys: v3v3-sys-regulator { 25*5d1d164dSJagan Teki compatible = "regulator-fixed"; 26*5d1d164dSJagan Teki regulator-name = "v3v3_sys"; 27*5d1d164dSJagan Teki regulator-always-on; 28*5d1d164dSJagan Teki regulator-boot-on; 29*5d1d164dSJagan Teki regulator-min-microvolt = <3300000>; 30*5d1d164dSJagan Teki regulator-max-microvolt = <3300000>; 31*5d1d164dSJagan Teki vin-supply = <&vcc5v0_sys>; 32*5d1d164dSJagan Teki }; 33724ba675SRob Herring}; 34724ba675SRob Herring 35724ba675SRob Herring&gmac { 36724ba675SRob Herring assigned-clocks = <&cru CLK_GMAC_SRC>, <&cru CLK_GMAC_TX_RX>, 37724ba675SRob Herring <&cru CLK_GMAC_ETHERNET_OUT>; 38724ba675SRob Herring assigned-clock-parents = <&cru CLK_GMAC_SRC_M1>, <&cru RGMII_MODE_CLK>; 39724ba675SRob Herring assigned-clock-rates = <125000000>, <0>, <25000000>; 40724ba675SRob Herring clock_in_out = "input"; 41724ba675SRob Herring phy-handle = <&phy>; 42724ba675SRob Herring phy-mode = "rgmii"; 43724ba675SRob Herring phy-supply = <&vcc_3v3>; 44724ba675SRob Herring pinctrl-names = "default"; 45724ba675SRob Herring pinctrl-0 = <&rgmiim1_pins &clk_out_ethernetm1_pins>; 46724ba675SRob Herring tx_delay = <0x2a>; 47724ba675SRob Herring rx_delay = <0x1a>; 48724ba675SRob Herring status = "okay"; 49724ba675SRob Herring}; 50724ba675SRob Herring 51724ba675SRob Herring&mdio { 52724ba675SRob Herring phy: ethernet-phy@0 { 53724ba675SRob Herring compatible = "ethernet-phy-id001c.c916", 54724ba675SRob Herring "ethernet-phy-ieee802.3-c22"; 55724ba675SRob Herring reg = <0x0>; 56724ba675SRob Herring pinctrl-names = "default"; 57724ba675SRob Herring pinctrl-0 = <ð_phy_rst>; 58724ba675SRob Herring reset-assert-us = <20000>; 59724ba675SRob Herring reset-deassert-us = <100000>; 60724ba675SRob Herring reset-gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; 61724ba675SRob Herring }; 62724ba675SRob Herring}; 63724ba675SRob Herring 64724ba675SRob Herring&pinctrl { 65724ba675SRob Herring ethernet { 66724ba675SRob Herring eth_phy_rst: eth-phy-rst { 67724ba675SRob Herring rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 68724ba675SRob Herring }; 69724ba675SRob Herring }; 70724ba675SRob Herring}; 71724ba675SRob Herring 72724ba675SRob Herring&sdmmc { 73724ba675SRob Herring bus-width = <4>; 74724ba675SRob Herring cap-mmc-highspeed; 75724ba675SRob Herring cap-sd-highspeed; 76724ba675SRob Herring card-detect-delay = <200>; 77724ba675SRob Herring pinctrl-names = "default"; 78724ba675SRob Herring pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_bus4 &sdmmc0_det>; 79724ba675SRob Herring rockchip,default-sample-phase = <90>; 80724ba675SRob Herring sd-uhs-sdr12; 81724ba675SRob Herring sd-uhs-sdr25; 82724ba675SRob Herring sd-uhs-sdr104; 83724ba675SRob Herring vqmmc-supply = <&vccio_sd>; 84724ba675SRob Herring status = "okay"; 85724ba675SRob Herring}; 86724ba675SRob Herring 87724ba675SRob Herring&uart2 { 88724ba675SRob Herring status = "okay"; 89724ba675SRob Herring}; 90