1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2724ba675SRob Herring/* 3724ba675SRob Herring * Device Tree Source for the SK-RZG1M board 4724ba675SRob Herring * 5724ba675SRob Herring * Copyright (C) 2016-2017 Cogent Embedded, Inc. 6724ba675SRob Herring */ 7724ba675SRob Herring 8724ba675SRob Herring/dts-v1/; 9724ba675SRob Herring#include "r8a7743.dtsi" 10724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 11724ba675SRob Herring 12724ba675SRob Herring/ { 13724ba675SRob Herring model = "SK-RZG1M"; 14724ba675SRob Herring compatible = "renesas,sk-rzg1m", "renesas,r8a7743"; 15724ba675SRob Herring 16724ba675SRob Herring aliases { 17724ba675SRob Herring serial0 = &scif0; 18724ba675SRob Herring }; 19724ba675SRob Herring 20724ba675SRob Herring chosen { 21724ba675SRob Herring bootargs = "ignore_loglevel rw root=/dev/nfs ip=on"; 22724ba675SRob Herring stdout-path = "serial0:115200n8"; 23724ba675SRob Herring }; 24724ba675SRob Herring 25724ba675SRob Herring memory@40000000 { 26724ba675SRob Herring device_type = "memory"; 27724ba675SRob Herring reg = <0 0x40000000 0 0x40000000>; 28724ba675SRob Herring }; 29724ba675SRob Herring 30724ba675SRob Herring memory@200000000 { 31724ba675SRob Herring device_type = "memory"; 32724ba675SRob Herring reg = <2 0x00000000 0 0x40000000>; 33724ba675SRob Herring }; 34724ba675SRob Herring}; 35724ba675SRob Herring 36724ba675SRob Herring&extal_clk { 37724ba675SRob Herring clock-frequency = <20000000>; 38724ba675SRob Herring}; 39724ba675SRob Herring 40724ba675SRob Herring&pfc { 41724ba675SRob Herring scif0_pins: scif0 { 42724ba675SRob Herring groups = "scif0_data_d"; 43724ba675SRob Herring function = "scif0"; 44724ba675SRob Herring }; 45724ba675SRob Herring 46724ba675SRob Herring ether_pins: ether { 47724ba675SRob Herring groups = "eth_link", "eth_mdio", "eth_rmii"; 48724ba675SRob Herring function = "eth"; 49724ba675SRob Herring }; 50724ba675SRob Herring 51724ba675SRob Herring phy1_pins: phy1 { 52724ba675SRob Herring groups = "intc_irq0"; 53724ba675SRob Herring function = "intc"; 54724ba675SRob Herring }; 55724ba675SRob Herring}; 56724ba675SRob Herring 57724ba675SRob Herring&scif0 { 58724ba675SRob Herring pinctrl-0 = <&scif0_pins>; 59724ba675SRob Herring pinctrl-names = "default"; 60724ba675SRob Herring 61724ba675SRob Herring status = "okay"; 62724ba675SRob Herring}; 63724ba675SRob Herring 64724ba675SRob Herringðer { 65724ba675SRob Herring pinctrl-0 = <ðer_pins>, <&phy1_pins>; 66724ba675SRob Herring pinctrl-names = "default"; 67724ba675SRob Herring 68724ba675SRob Herring phy-handle = <&phy1>; 69724ba675SRob Herring renesas,ether-link-active-low; 70724ba675SRob Herring status = "okay"; 71724ba675SRob Herring 72724ba675SRob Herring phy1: ethernet-phy@1 { 73724ba675SRob Herring compatible = "ethernet-phy-id0022.1537", 74724ba675SRob Herring "ethernet-phy-ieee802.3-c22"; 75724ba675SRob Herring reg = <1>; 76*0cbf959fSGeert Uytterhoeven interrupts-extended = <&irqc 0 IRQ_TYPE_LEVEL_LOW>; 77724ba675SRob Herring micrel,led-mode = <1>; 78724ba675SRob Herring reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>; 79724ba675SRob Herring }; 80724ba675SRob Herring}; 81