1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2*724ba675SRob Herring 3*724ba675SRob Herring#include "qcom-ipq8064.dtsi" 4*724ba675SRob Herring 5*724ba675SRob Herring/ { 6*724ba675SRob Herring model = "Qualcomm Technologies, Inc. IPQ8064-v2.0"; 7*724ba675SRob Herring 8*724ba675SRob Herring aliases { 9*724ba675SRob Herring serial0 = &gsbi4_serial; 10*724ba675SRob Herring }; 11*724ba675SRob Herring 12*724ba675SRob Herring chosen { 13*724ba675SRob Herring stdout-path = "serial0:115200n8"; 14*724ba675SRob Herring }; 15*724ba675SRob Herring 16*724ba675SRob Herring reserved-memory { 17*724ba675SRob Herring #address-cells = <1>; 18*724ba675SRob Herring #size-cells = <1>; 19*724ba675SRob Herring ranges; 20*724ba675SRob Herring 21*724ba675SRob Herring rsvd@41200000 { 22*724ba675SRob Herring reg = <0x41200000 0x300000>; 23*724ba675SRob Herring no-map; 24*724ba675SRob Herring }; 25*724ba675SRob Herring }; 26*724ba675SRob Herring}; 27*724ba675SRob Herring 28*724ba675SRob Herring&gsbi4 { 29*724ba675SRob Herring qcom,mode = <GSBI_PROT_I2C_UART>; 30*724ba675SRob Herring status = "okay"; 31*724ba675SRob Herring 32*724ba675SRob Herring serial@16340000 { 33*724ba675SRob Herring status = "okay"; 34*724ba675SRob Herring }; 35*724ba675SRob Herring /* 36*724ba675SRob Herring * The i2c device on gsbi4 should not be enabled. 37*724ba675SRob Herring * On ipq806x designs gsbi4 i2c is meant for exclusive 38*724ba675SRob Herring * RPM usage. Turning this on in kernel manifests as 39*724ba675SRob Herring * i2c failure for the RPM. 40*724ba675SRob Herring */ 41*724ba675SRob Herring}; 42*724ba675SRob Herring 43*724ba675SRob Herring&pcie0 { 44*724ba675SRob Herring compatible = "qcom,pcie-ipq8064-v2"; 45*724ba675SRob Herring}; 46*724ba675SRob Herring 47*724ba675SRob Herring&pcie1 { 48*724ba675SRob Herring compatible = "qcom,pcie-ipq8064-v2"; 49*724ba675SRob Herring}; 50*724ba675SRob Herring 51*724ba675SRob Herring&pcie2 { 52*724ba675SRob Herring compatible = "qcom,pcie-ipq8064-v2"; 53*724ba675SRob Herring}; 54*724ba675SRob Herring 55*724ba675SRob Herring&sata { 56*724ba675SRob Herring ports-implemented = <0x1>; 57*724ba675SRob Herring}; 58*724ba675SRob Herring 59*724ba675SRob Herring&ss_phy_0 { 60*724ba675SRob Herring qcom,rx-eq = <2>; 61*724ba675SRob Herring qcom,tx-deamp_3_5db = <32>; 62*724ba675SRob Herring qcom,mpll = <5>; 63*724ba675SRob Herring}; 64*724ba675SRob Herring 65*724ba675SRob Herring&ss_phy_1 { 66*724ba675SRob Herring qcom,rx-eq = <2>; 67*724ba675SRob Herring qcom,tx-deamp_3_5db = <32>; 68*724ba675SRob Herring qcom,mpll = <5>; 69*724ba675SRob Herring}; 70