1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2724ba675SRob Herring// Copyright (c) 2018, Robert Marko <robimarko@gmail.com> 3724ba675SRob Herring 4724ba675SRob Herring#include "qcom-ipq4019.dtsi" 5724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 6724ba675SRob Herring#include <dt-bindings/input/input.h> 7724ba675SRob Herring 8724ba675SRob Herring/ { 9724ba675SRob Herring model = "8devices Jalapeno"; 10724ba675SRob Herring compatible = "8dev,jalapeno", "qcom,ipq4018"; 11724ba675SRob Herring}; 12724ba675SRob Herring 13724ba675SRob Herring&tlmm { 14*268a968eSRayyan Ansari mdio_pins: mdio-state { 15*268a968eSRayyan Ansari mdio-pins { 16724ba675SRob Herring pins = "gpio53"; 17724ba675SRob Herring function = "mdio"; 18*268a968eSRayyan Ansari bias-pull-up; 19724ba675SRob Herring }; 20724ba675SRob Herring 21*268a968eSRayyan Ansari mdc-pins { 22724ba675SRob Herring pins = "gpio52"; 23724ba675SRob Herring function = "mdc"; 24724ba675SRob Herring bias-pull-up; 25724ba675SRob Herring }; 26724ba675SRob Herring }; 27724ba675SRob Herring 28*268a968eSRayyan Ansari serial_pins: serial-state { 29724ba675SRob Herring pins = "gpio60", "gpio61"; 30724ba675SRob Herring function = "blsp_uart0"; 31724ba675SRob Herring bias-disable; 32724ba675SRob Herring }; 33724ba675SRob Herring 34*268a968eSRayyan Ansari spi_0_pins: spi-0-state { 35*268a968eSRayyan Ansari spi0-pins { 36724ba675SRob Herring function = "blsp_spi0"; 37724ba675SRob Herring pins = "gpio55", "gpio56", "gpio57"; 38724ba675SRob Herring drive-strength = <2>; 39724ba675SRob Herring bias-disable; 40724ba675SRob Herring }; 41724ba675SRob Herring 42*268a968eSRayyan Ansari spi0-cs-pins { 43724ba675SRob Herring function = "gpio"; 44724ba675SRob Herring pins = "gpio54", "gpio59"; 45724ba675SRob Herring drive-strength = <2>; 46724ba675SRob Herring bias-disable; 47724ba675SRob Herring output-high; 48724ba675SRob Herring }; 49724ba675SRob Herring }; 50724ba675SRob Herring}; 51724ba675SRob Herring 52724ba675SRob Herring&watchdog { 53724ba675SRob Herring status = "okay"; 54724ba675SRob Herring}; 55724ba675SRob Herring 56724ba675SRob Herring&prng { 57724ba675SRob Herring status = "okay"; 58724ba675SRob Herring}; 59724ba675SRob Herring 60724ba675SRob Herring&blsp_dma { 61724ba675SRob Herring status = "okay"; 62724ba675SRob Herring}; 63724ba675SRob Herring 64724ba675SRob Herring&blsp1_spi1 { 65724ba675SRob Herring status = "okay"; 66724ba675SRob Herring 67724ba675SRob Herring pinctrl-0 = <&spi_0_pins>; 68724ba675SRob Herring pinctrl-names = "default"; 69724ba675SRob Herring cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 59 GPIO_ACTIVE_HIGH>; 70724ba675SRob Herring 71724ba675SRob Herring flash@0 { 72724ba675SRob Herring status = "okay"; 73724ba675SRob Herring 74724ba675SRob Herring compatible = "jedec,spi-nor"; 75724ba675SRob Herring reg = <0>; 76724ba675SRob Herring spi-max-frequency = <24000000>; 77724ba675SRob Herring 78724ba675SRob Herring partitions { 79724ba675SRob Herring compatible = "fixed-partitions"; 80724ba675SRob Herring #address-cells = <1>; 81724ba675SRob Herring #size-cells = <1>; 82724ba675SRob Herring 83724ba675SRob Herring partition@0 { 84724ba675SRob Herring label = "SBL1"; 85724ba675SRob Herring reg = <0x00000000 0x00040000>; 86724ba675SRob Herring read-only; 87724ba675SRob Herring }; 88724ba675SRob Herring 89724ba675SRob Herring partition@40000 { 90724ba675SRob Herring label = "MIBIB"; 91724ba675SRob Herring reg = <0x00040000 0x00020000>; 92724ba675SRob Herring read-only; 93724ba675SRob Herring }; 94724ba675SRob Herring 95724ba675SRob Herring partition@60000 { 96724ba675SRob Herring label = "QSEE"; 97724ba675SRob Herring reg = <0x00060000 0x00060000>; 98724ba675SRob Herring read-only; 99724ba675SRob Herring }; 100724ba675SRob Herring 101724ba675SRob Herring partition@c0000 { 102724ba675SRob Herring label = "CDT"; 103724ba675SRob Herring reg = <0x000c0000 0x00010000>; 104724ba675SRob Herring read-only; 105724ba675SRob Herring }; 106724ba675SRob Herring 107724ba675SRob Herring partition@d0000 { 108724ba675SRob Herring label = "DDRPARAMS"; 109724ba675SRob Herring reg = <0x000d0000 0x00010000>; 110724ba675SRob Herring read-only; 111724ba675SRob Herring }; 112724ba675SRob Herring 113724ba675SRob Herring partition@e0000 { 114724ba675SRob Herring label = "u-boot-env"; 115724ba675SRob Herring reg = <0x000e0000 0x00010000>; 116724ba675SRob Herring }; 117724ba675SRob Herring 118724ba675SRob Herring partition@f0000 { 119724ba675SRob Herring label = "u-boot"; 120724ba675SRob Herring reg = <0x000f0000 0x00080000>; 121724ba675SRob Herring read-only; 122724ba675SRob Herring }; 123724ba675SRob Herring 124724ba675SRob Herring partition@170000 { 125724ba675SRob Herring label = "ART"; 126724ba675SRob Herring reg = <0x00170000 0x00010000>; 127724ba675SRob Herring read-only; 128724ba675SRob Herring }; 129724ba675SRob Herring }; 130724ba675SRob Herring }; 131724ba675SRob Herring 132724ba675SRob Herring spi-nand@1 { 133724ba675SRob Herring status = "okay"; 134724ba675SRob Herring 135724ba675SRob Herring compatible = "spi-nand"; 136724ba675SRob Herring reg = <1>; 137724ba675SRob Herring spi-max-frequency = <24000000>; 138724ba675SRob Herring 139724ba675SRob Herring partitions { 140724ba675SRob Herring compatible = "fixed-partitions"; 141724ba675SRob Herring #address-cells = <1>; 142724ba675SRob Herring #size-cells = <1>; 143724ba675SRob Herring 144724ba675SRob Herring partition@0 { 145724ba675SRob Herring label = "ubi1"; 146724ba675SRob Herring reg = <0x00000000 0x04000000>; 147724ba675SRob Herring }; 148724ba675SRob Herring 149724ba675SRob Herring partition@4000000 { 150724ba675SRob Herring label = "ubi2"; 151724ba675SRob Herring reg = <0x04000000 0x04000000>; 152724ba675SRob Herring }; 153724ba675SRob Herring }; 154724ba675SRob Herring }; 155724ba675SRob Herring}; 156724ba675SRob Herring 157724ba675SRob Herring&blsp1_uart1 { 158724ba675SRob Herring status = "okay"; 159724ba675SRob Herring 160724ba675SRob Herring pinctrl-0 = <&serial_pins>; 161724ba675SRob Herring pinctrl-names = "default"; 162724ba675SRob Herring}; 163724ba675SRob Herring 164724ba675SRob Herring&cryptobam { 165724ba675SRob Herring status = "okay"; 166724ba675SRob Herring}; 167724ba675SRob Herring 168724ba675SRob Herring&crypto { 169724ba675SRob Herring status = "okay"; 170724ba675SRob Herring}; 171724ba675SRob Herring 172724ba675SRob Herring&mdio { 173724ba675SRob Herring status = "okay"; 174724ba675SRob Herring 175724ba675SRob Herring pinctrl-0 = <&mdio_pins>; 176724ba675SRob Herring pinctrl-names = "default"; 177724ba675SRob Herring}; 178724ba675SRob Herring 179724ba675SRob Herring&wifi0 { 180724ba675SRob Herring status = "okay"; 181724ba675SRob Herring 182724ba675SRob Herring qcom,ath10k-calibration-variant = "8devices-Jalapeno"; 183724ba675SRob Herring}; 184724ba675SRob Herring 185724ba675SRob Herring&wifi1 { 186724ba675SRob Herring status = "okay"; 187724ba675SRob Herring 188724ba675SRob Herring qcom,ath10k-calibration-variant = "8devices-Jalapeno"; 189724ba675SRob Herring}; 190724ba675SRob Herring 191724ba675SRob Herring&usb3_ss_phy { 192724ba675SRob Herring status = "okay"; 193724ba675SRob Herring}; 194724ba675SRob Herring 195724ba675SRob Herring&usb3_hs_phy { 196724ba675SRob Herring status = "okay"; 197724ba675SRob Herring}; 198724ba675SRob Herring 199724ba675SRob Herring&usb3 { 200724ba675SRob Herring status = "okay"; 201724ba675SRob Herring}; 202724ba675SRob Herring 203724ba675SRob Herring&usb2_hs_phy { 204724ba675SRob Herring status = "okay"; 205724ba675SRob Herring}; 206724ba675SRob Herring 207724ba675SRob Herring&usb2 { 208724ba675SRob Herring status = "okay"; 209724ba675SRob Herring}; 210