1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2*724ba675SRob Herring 3*724ba675SRob Herring#include "qcom-ipq4019.dtsi" 4*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 5*724ba675SRob Herring#include <dt-bindings/input/input.h> 6*724ba675SRob Herring 7*724ba675SRob Herring/ { 8*724ba675SRob Herring model = "ALFA Network AP120C-AC"; 9*724ba675SRob Herring compatible = "alfa-network,ap120c-ac", "qcom,ipq4018"; 10*724ba675SRob Herring 11*724ba675SRob Herring aliases { 12*724ba675SRob Herring serial0 = &blsp1_uart1; 13*724ba675SRob Herring }; 14*724ba675SRob Herring 15*724ba675SRob Herring chosen { 16*724ba675SRob Herring stdout-path = "serial0:115200n8"; 17*724ba675SRob Herring }; 18*724ba675SRob Herring 19*724ba675SRob Herring keys { 20*724ba675SRob Herring compatible = "gpio-keys"; 21*724ba675SRob Herring 22*724ba675SRob Herring key-reset { 23*724ba675SRob Herring label = "reset"; 24*724ba675SRob Herring gpios = <&tlmm 63 GPIO_ACTIVE_LOW>; 25*724ba675SRob Herring linux,code = <KEY_RESTART>; 26*724ba675SRob Herring }; 27*724ba675SRob Herring }; 28*724ba675SRob Herring}; 29*724ba675SRob Herring 30*724ba675SRob Herring&tlmm { 31*724ba675SRob Herring i2c0_pins: i2c0_pinmux { 32*724ba675SRob Herring mux_i2c { 33*724ba675SRob Herring function = "blsp_i2c0"; 34*724ba675SRob Herring pins = "gpio58", "gpio59"; 35*724ba675SRob Herring drive-strength = <16>; 36*724ba675SRob Herring bias-disable; 37*724ba675SRob Herring }; 38*724ba675SRob Herring }; 39*724ba675SRob Herring 40*724ba675SRob Herring mdio_pins: mdio_pinmux { 41*724ba675SRob Herring mux_mdio { 42*724ba675SRob Herring pins = "gpio53"; 43*724ba675SRob Herring function = "mdio"; 44*724ba675SRob Herring bias-pull-up; 45*724ba675SRob Herring }; 46*724ba675SRob Herring 47*724ba675SRob Herring mux_mdc { 48*724ba675SRob Herring pins = "gpio52"; 49*724ba675SRob Herring function = "mdc"; 50*724ba675SRob Herring bias-pull-up; 51*724ba675SRob Herring }; 52*724ba675SRob Herring }; 53*724ba675SRob Herring 54*724ba675SRob Herring serial0_pins: serial0_pinmux { 55*724ba675SRob Herring mux_uart { 56*724ba675SRob Herring pins = "gpio60", "gpio61"; 57*724ba675SRob Herring function = "blsp_uart0"; 58*724ba675SRob Herring bias-disable; 59*724ba675SRob Herring }; 60*724ba675SRob Herring }; 61*724ba675SRob Herring 62*724ba675SRob Herring spi0_pins: spi0_pinmux { 63*724ba675SRob Herring mux_spi { 64*724ba675SRob Herring function = "blsp_spi0"; 65*724ba675SRob Herring pins = "gpio55", "gpio56", "gpio57"; 66*724ba675SRob Herring drive-strength = <12>; 67*724ba675SRob Herring bias-disable; 68*724ba675SRob Herring }; 69*724ba675SRob Herring 70*724ba675SRob Herring mux_cs { 71*724ba675SRob Herring function = "gpio"; 72*724ba675SRob Herring pins = "gpio54", "gpio4"; 73*724ba675SRob Herring drive-strength = <2>; 74*724ba675SRob Herring bias-disable; 75*724ba675SRob Herring output-high; 76*724ba675SRob Herring }; 77*724ba675SRob Herring }; 78*724ba675SRob Herring 79*724ba675SRob Herring usb-power-hog { 80*724ba675SRob Herring line-name = "USB-power"; 81*724ba675SRob Herring gpios = <1 GPIO_ACTIVE_HIGH>; 82*724ba675SRob Herring gpio-hog; 83*724ba675SRob Herring output-high; 84*724ba675SRob Herring }; 85*724ba675SRob Herring}; 86*724ba675SRob Herring 87*724ba675SRob Herring&watchdog { 88*724ba675SRob Herring status = "okay"; 89*724ba675SRob Herring}; 90*724ba675SRob Herring 91*724ba675SRob Herring&prng { 92*724ba675SRob Herring status = "okay"; 93*724ba675SRob Herring}; 94*724ba675SRob Herring 95*724ba675SRob Herring&blsp_dma { 96*724ba675SRob Herring status = "okay"; 97*724ba675SRob Herring}; 98*724ba675SRob Herring 99*724ba675SRob Herring&blsp1_i2c3 { 100*724ba675SRob Herring status = "okay"; 101*724ba675SRob Herring 102*724ba675SRob Herring pinctrl-0 = <&i2c0_pins>; 103*724ba675SRob Herring pinctrl-names = "default"; 104*724ba675SRob Herring 105*724ba675SRob Herring tpm@29 { 106*724ba675SRob Herring compatible = "atmel,at97sc3204t"; 107*724ba675SRob Herring reg = <0x29>; 108*724ba675SRob Herring }; 109*724ba675SRob Herring}; 110*724ba675SRob Herring 111*724ba675SRob Herring&blsp1_spi1 { 112*724ba675SRob Herring status = "okay"; 113*724ba675SRob Herring 114*724ba675SRob Herring pinctrl-0 = <&spi0_pins>; 115*724ba675SRob Herring pinctrl-names = "default"; 116*724ba675SRob Herring cs-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>, <&tlmm 4 GPIO_ACTIVE_HIGH>; 117*724ba675SRob Herring 118*724ba675SRob Herring flash@0 { 119*724ba675SRob Herring compatible = "jedec,spi-nor"; 120*724ba675SRob Herring reg = <0>; 121*724ba675SRob Herring spi-max-frequency = <24000000>; 122*724ba675SRob Herring 123*724ba675SRob Herring partitions { 124*724ba675SRob Herring compatible = "fixed-partitions"; 125*724ba675SRob Herring #address-cells = <1>; 126*724ba675SRob Herring #size-cells = <1>; 127*724ba675SRob Herring 128*724ba675SRob Herring partition@0 { 129*724ba675SRob Herring label = "SBL1"; 130*724ba675SRob Herring reg = <0x00000000 0x00040000>; 131*724ba675SRob Herring read-only; 132*724ba675SRob Herring }; 133*724ba675SRob Herring 134*724ba675SRob Herring partition@40000 { 135*724ba675SRob Herring label = "MIBIB"; 136*724ba675SRob Herring reg = <0x00040000 0x00020000>; 137*724ba675SRob Herring read-only; 138*724ba675SRob Herring }; 139*724ba675SRob Herring 140*724ba675SRob Herring partition@60000 { 141*724ba675SRob Herring label = "QSEE"; 142*724ba675SRob Herring reg = <0x00060000 0x00060000>; 143*724ba675SRob Herring read-only; 144*724ba675SRob Herring }; 145*724ba675SRob Herring 146*724ba675SRob Herring partition@c0000 { 147*724ba675SRob Herring label = "CDT"; 148*724ba675SRob Herring reg = <0x000c0000 0x00010000>; 149*724ba675SRob Herring read-only; 150*724ba675SRob Herring }; 151*724ba675SRob Herring 152*724ba675SRob Herring partition@d0000 { 153*724ba675SRob Herring label = "DDRPARAMS"; 154*724ba675SRob Herring reg = <0x000d0000 0x00010000>; 155*724ba675SRob Herring read-only; 156*724ba675SRob Herring }; 157*724ba675SRob Herring 158*724ba675SRob Herring partition@e0000 { 159*724ba675SRob Herring label = "u-boot-env"; 160*724ba675SRob Herring reg = <0x000e0000 0x00010000>; 161*724ba675SRob Herring }; 162*724ba675SRob Herring 163*724ba675SRob Herring partition@f0000 { 164*724ba675SRob Herring label = "u-boot"; 165*724ba675SRob Herring reg = <0x000f0000 0x00080000>; 166*724ba675SRob Herring read-only; 167*724ba675SRob Herring }; 168*724ba675SRob Herring 169*724ba675SRob Herring partition@170000 { 170*724ba675SRob Herring label = "ART"; 171*724ba675SRob Herring reg = <0x00170000 0x00010000>; 172*724ba675SRob Herring read-only; 173*724ba675SRob Herring compatible = "nvmem-cells"; 174*724ba675SRob Herring #address-cells = <1>; 175*724ba675SRob Herring #size-cells = <1>; 176*724ba675SRob Herring 177*724ba675SRob Herring precal_art_1000: precal@1000 { 178*724ba675SRob Herring reg = <0x1000 0x2f20>; 179*724ba675SRob Herring }; 180*724ba675SRob Herring 181*724ba675SRob Herring precal_art_5000: precal@5000 { 182*724ba675SRob Herring reg = <0x5000 0x2f20>; 183*724ba675SRob Herring }; 184*724ba675SRob Herring }; 185*724ba675SRob Herring 186*724ba675SRob Herring partition@180000 { 187*724ba675SRob Herring label = "priv_data1"; 188*724ba675SRob Herring reg = <0x00180000 0x00010000>; 189*724ba675SRob Herring read-only; 190*724ba675SRob Herring }; 191*724ba675SRob Herring 192*724ba675SRob Herring partition@190000 { 193*724ba675SRob Herring label = "priv_data2"; 194*724ba675SRob Herring reg = <0x00190000 0x00010000>; 195*724ba675SRob Herring read-only; 196*724ba675SRob Herring }; 197*724ba675SRob Herring }; 198*724ba675SRob Herring }; 199*724ba675SRob Herring 200*724ba675SRob Herring flash@1 { 201*724ba675SRob Herring compatible = "spi-nand"; 202*724ba675SRob Herring reg = <1>; 203*724ba675SRob Herring spi-max-frequency = <40000000>; 204*724ba675SRob Herring 205*724ba675SRob Herring partitions { 206*724ba675SRob Herring compatible = "fixed-partitions"; 207*724ba675SRob Herring #address-cells = <1>; 208*724ba675SRob Herring #size-cells = <1>; 209*724ba675SRob Herring 210*724ba675SRob Herring partition@0 { 211*724ba675SRob Herring label = "ubi1"; 212*724ba675SRob Herring reg = <0x00000000 0x04000000>; 213*724ba675SRob Herring }; 214*724ba675SRob Herring 215*724ba675SRob Herring partition@4000000 { 216*724ba675SRob Herring label = "ubi2"; 217*724ba675SRob Herring reg = <0x04000000 0x04000000>; 218*724ba675SRob Herring }; 219*724ba675SRob Herring }; 220*724ba675SRob Herring }; 221*724ba675SRob Herring}; 222*724ba675SRob Herring 223*724ba675SRob Herring&blsp1_uart1 { 224*724ba675SRob Herring status = "okay"; 225*724ba675SRob Herring 226*724ba675SRob Herring pinctrl-0 = <&serial0_pins>; 227*724ba675SRob Herring pinctrl-names = "default"; 228*724ba675SRob Herring}; 229*724ba675SRob Herring 230*724ba675SRob Herring&cryptobam { 231*724ba675SRob Herring status = "okay"; 232*724ba675SRob Herring}; 233*724ba675SRob Herring 234*724ba675SRob Herring&crypto { 235*724ba675SRob Herring status = "okay"; 236*724ba675SRob Herring}; 237*724ba675SRob Herring 238*724ba675SRob Herring&mdio { 239*724ba675SRob Herring status = "okay"; 240*724ba675SRob Herring 241*724ba675SRob Herring pinctrl-0 = <&mdio_pins>; 242*724ba675SRob Herring pinctrl-names = "default"; 243*724ba675SRob Herring}; 244*724ba675SRob Herring 245*724ba675SRob Herring&wifi0 { 246*724ba675SRob Herring status = "okay"; 247*724ba675SRob Herring nvmem-cell-names = "pre-calibration"; 248*724ba675SRob Herring nvmem-cells = <&precal_art_1000>; 249*724ba675SRob Herring}; 250*724ba675SRob Herring 251*724ba675SRob Herring&wifi1 { 252*724ba675SRob Herring status = "okay"; 253*724ba675SRob Herring nvmem-cell-names = "pre-calibration"; 254*724ba675SRob Herring nvmem-cells = <&precal_art_5000>; 255*724ba675SRob Herring qcom,ath10k-calibration-variant = "ALFA-Network-AP120C-AC"; 256*724ba675SRob Herring}; 257*724ba675SRob Herring 258*724ba675SRob Herring&usb3_hs_phy { 259*724ba675SRob Herring status = "okay"; 260*724ba675SRob Herring}; 261*724ba675SRob Herring 262*724ba675SRob Herring&usb3 { 263*724ba675SRob Herring status = "okay"; 264*724ba675SRob Herring 265*724ba675SRob Herring dwc3@8a00000 { 266*724ba675SRob Herring phys = <&usb3_hs_phy>; 267*724ba675SRob Herring phy-names = "usb2-phy"; 268*724ba675SRob Herring }; 269*724ba675SRob Herring}; 270*724ba675SRob Herring 271*724ba675SRob Herring&usb2_hs_phy { 272*724ba675SRob Herring status = "okay"; 273*724ba675SRob Herring}; 274*724ba675SRob Herring 275*724ba675SRob Herring&usb2 { 276*724ba675SRob Herring status = "okay"; 277*724ba675SRob Herring}; 278