xref: /linux/scripts/dtc/include-prefixes/arm/nxp/imx/imx7-tqma7.dtsi (revision c9d4affbe60a9597ca9df878b5c02bdb9a636e3c)
1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 OR X11
2724ba675SRob Herring/*
3724ba675SRob Herring * Device Tree Include file for TQ-Systems TQMa7x boards with full mounted PCB.
4724ba675SRob Herring *
5724ba675SRob Herring * Copyright (C) 2016 TQ-Systems GmbH
6724ba675SRob Herring * Author: Markus Niebel <Markus.Niebel@tq-group.com>
7724ba675SRob Herring * Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com>
8724ba675SRob Herring */
9724ba675SRob Herring
10724ba675SRob Herring/ {
11724ba675SRob Herring	memory@80000000 {
12724ba675SRob Herring		device_type = "memory";
13724ba675SRob Herring		/* 512 MB - default configuration */
14724ba675SRob Herring		reg = <0x80000000 0x20000000>;
15724ba675SRob Herring	};
16724ba675SRob Herring};
17724ba675SRob Herring
18724ba675SRob Herring&cpu0 {
19724ba675SRob Herring	cpu-supply = <&sw1a_reg>;
20724ba675SRob Herring};
21724ba675SRob Herring
22724ba675SRob Herring&gpio2 {
23724ba675SRob Herring	/* Configured as pullup by QSPI pin group */
24724ba675SRob Herring	qspi-reset-hog {
25724ba675SRob Herring		gpio-hog;
26724ba675SRob Herring		gpios = <4 GPIO_ACTIVE_LOW>;
27724ba675SRob Herring		input;
28724ba675SRob Herring		line-name = "qspi-reset";
29724ba675SRob Herring	};
30724ba675SRob Herring};
31724ba675SRob Herring
32724ba675SRob Herring&i2c1 {
33724ba675SRob Herring	pinctrl-names = "default";
34724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c1>;
35724ba675SRob Herring	clock-frequency = <100000>;
36724ba675SRob Herring	status = "okay";
37724ba675SRob Herring
38724ba675SRob Herring	pfuze3000: pmic@8 {
39724ba675SRob Herring		pinctrl-names = "default";
40724ba675SRob Herring		pinctrl-0 = <&pinctrl_pmic1>;
41724ba675SRob Herring		compatible = "fsl,pfuze3000";
42724ba675SRob Herring		reg = <0x08>;
43724ba675SRob Herring
44724ba675SRob Herring		regulators {
45724ba675SRob Herring			sw1a_reg: sw1a {
46724ba675SRob Herring				regulator-min-microvolt = <700000>;
47724ba675SRob Herring				regulator-max-microvolt = <3300000>;
48724ba675SRob Herring				regulator-boot-on;
49724ba675SRob Herring				regulator-always-on;
50724ba675SRob Herring				regulator-ramp-delay = <6250>;
51724ba675SRob Herring			};
52724ba675SRob Herring
53724ba675SRob Herring			/* use sw1c_reg to align with pfuze100/pfuze200 */
54724ba675SRob Herring			sw1c_reg: sw1b {
55724ba675SRob Herring				regulator-min-microvolt = <700000>;
56724ba675SRob Herring				regulator-max-microvolt = <1475000>;
57724ba675SRob Herring				regulator-boot-on;
58724ba675SRob Herring				regulator-always-on;
59724ba675SRob Herring				regulator-ramp-delay = <6250>;
60724ba675SRob Herring			};
61724ba675SRob Herring
62724ba675SRob Herring			sw2_reg: sw2 {
63724ba675SRob Herring				regulator-min-microvolt = <1500000>;
64724ba675SRob Herring				regulator-max-microvolt = <1850000>;
65724ba675SRob Herring				regulator-boot-on;
66724ba675SRob Herring				regulator-always-on;
67724ba675SRob Herring			};
68724ba675SRob Herring
69724ba675SRob Herring			sw3a_reg: sw3 {
70724ba675SRob Herring				regulator-min-microvolt = <900000>;
71724ba675SRob Herring				regulator-max-microvolt = <1650000>;
72724ba675SRob Herring				regulator-boot-on;
73724ba675SRob Herring				regulator-always-on;
74724ba675SRob Herring			};
75724ba675SRob Herring
76724ba675SRob Herring			swbst_reg: swbst {
77724ba675SRob Herring				regulator-min-microvolt = <5000000>;
78724ba675SRob Herring				regulator-max-microvolt = <5150000>;
79724ba675SRob Herring			};
80724ba675SRob Herring
81724ba675SRob Herring			snvs_reg: vsnvs {
82724ba675SRob Herring				regulator-min-microvolt = <1000000>;
83724ba675SRob Herring				regulator-max-microvolt = <3000000>;
84724ba675SRob Herring				regulator-boot-on;
85724ba675SRob Herring				regulator-always-on;
86724ba675SRob Herring			};
87724ba675SRob Herring
88724ba675SRob Herring			vref_reg: vrefddr {
89724ba675SRob Herring				regulator-boot-on;
90724ba675SRob Herring				regulator-always-on;
91724ba675SRob Herring			};
92724ba675SRob Herring
93724ba675SRob Herring			vgen1_reg: vldo1 {
94724ba675SRob Herring				regulator-min-microvolt = <1800000>;
95724ba675SRob Herring				regulator-max-microvolt = <3300000>;
96724ba675SRob Herring				regulator-always-on;
97724ba675SRob Herring			};
98724ba675SRob Herring
99724ba675SRob Herring			vgen2_reg: vldo2 {
100724ba675SRob Herring				regulator-min-microvolt = <800000>;
101724ba675SRob Herring				regulator-max-microvolt = <1550000>;
102724ba675SRob Herring				regulator-always-on;
103724ba675SRob Herring			};
104724ba675SRob Herring
105724ba675SRob Herring			vgen3_reg: vccsd {
106724ba675SRob Herring				regulator-min-microvolt = <2850000>;
107724ba675SRob Herring				regulator-max-microvolt = <3300000>;
108724ba675SRob Herring				regulator-always-on;
109724ba675SRob Herring			};
110724ba675SRob Herring
111724ba675SRob Herring			vgen4_reg: v33 {
112724ba675SRob Herring				regulator-min-microvolt = <2850000>;
113724ba675SRob Herring				regulator-max-microvolt = <3300000>;
114724ba675SRob Herring				regulator-always-on;
115724ba675SRob Herring			};
116724ba675SRob Herring
117724ba675SRob Herring			vgen5_reg: vldo3 {
118724ba675SRob Herring				regulator-min-microvolt = <1800000>;
119724ba675SRob Herring				regulator-max-microvolt = <3300000>;
120724ba675SRob Herring				regulator-always-on;
121724ba675SRob Herring			};
122724ba675SRob Herring
123724ba675SRob Herring			vgen6_reg: vldo4 {
124724ba675SRob Herring				regulator-min-microvolt = <1800000>;
125724ba675SRob Herring				regulator-max-microvolt = <3300000>;
126724ba675SRob Herring				regulator-always-on;
127724ba675SRob Herring			};
128724ba675SRob Herring		};
129724ba675SRob Herring	};
130724ba675SRob Herring
131*c9d4affbSJoão Rodrigues	/* LM75A temperature sensor, TQMa7x 01xx */
132*c9d4affbSJoão Rodrigues	lm75a: temperature-sensor@48 {
133*c9d4affbSJoão Rodrigues		compatible = "national,lm75a";
134*c9d4affbSJoão Rodrigues		reg = <0x48>;
135*c9d4affbSJoão Rodrigues	};
136*c9d4affbSJoão Rodrigues
137*c9d4affbSJoão Rodrigues	/* NXP SE97BTP with temperature sensor + eeprom, TQMa7x 02xx */
138724ba675SRob Herring	se97b: temperature-sensor-eeprom@1e {
139724ba675SRob Herring		compatible = "nxp,se97b", "jedec,jc-42.4-temp";
140724ba675SRob Herring		reg = <0x1e>;
141724ba675SRob Herring	};
142724ba675SRob Herring
143724ba675SRob Herring	/* ST M24C64 */
144724ba675SRob Herring	m24c64: eeprom@50 {
145724ba675SRob Herring		compatible = "atmel,24c64";
146724ba675SRob Herring		reg = <0x50>;
147724ba675SRob Herring		pagesize = <32>;
148724ba675SRob Herring		status = "okay";
149724ba675SRob Herring	};
150724ba675SRob Herring
151724ba675SRob Herring	at24c02: eeprom@56 {
152724ba675SRob Herring		compatible = "atmel,24c02";
153724ba675SRob Herring		reg = <0x56>;
154724ba675SRob Herring		pagesize = <16>;
155724ba675SRob Herring		status = "okay";
156724ba675SRob Herring	};
157724ba675SRob Herring
158724ba675SRob Herring	ds1339: rtc@68 {
159724ba675SRob Herring		compatible = "dallas,ds1339";
160724ba675SRob Herring		reg = <0x68>;
161724ba675SRob Herring	};
162724ba675SRob Herring};
163724ba675SRob Herring
164724ba675SRob Herring&iomuxc {
165724ba675SRob Herring	pinctrl_i2c1: i2c1grp {
166724ba675SRob Herring		fsl,pins = <
167724ba675SRob Herring			MX7D_PAD_I2C1_SDA__I2C1_SDA	0x40000078
168724ba675SRob Herring			MX7D_PAD_I2C1_SCL__I2C1_SCL	0x40000078
169724ba675SRob Herring		>;
170724ba675SRob Herring	};
171724ba675SRob Herring
172724ba675SRob Herring	pinctrl_pmic1: pmic1grp {
173724ba675SRob Herring		fsl,pins = <
174724ba675SRob Herring			MX7D_PAD_SD2_RESET_B__GPIO5_IO11	0x4000005C
175724ba675SRob Herring		>;
176724ba675SRob Herring	};
177724ba675SRob Herring
178724ba675SRob Herring	pinctrl_qspi: qspigrp {
179724ba675SRob Herring		fsl,pins = <
180724ba675SRob Herring			MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0	0x5A
181724ba675SRob Herring			MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1	0x5A
182724ba675SRob Herring			MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2	0x5A
183724ba675SRob Herring			MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3	0x5A
184724ba675SRob Herring			MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK	0x11
185724ba675SRob Herring			MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B	0x54
186724ba675SRob Herring			MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B	0x54
187724ba675SRob Herring		>;
188724ba675SRob Herring	};
189724ba675SRob Herring
190724ba675SRob Herring	pinctrl_qspi_reset: qspi_resetgrp {
191724ba675SRob Herring		fsl,pins = <
192724ba675SRob Herring			/* #QSPI_RESET */
193724ba675SRob Herring			MX7D_PAD_EPDC_DATA04__GPIO2_IO4		0x52
194724ba675SRob Herring		>;
195724ba675SRob Herring	};
196724ba675SRob Herring
197724ba675SRob Herring	pinctrl_usdhc3: usdhc3grp {
198724ba675SRob Herring		fsl,pins = <
199724ba675SRob Herring			MX7D_PAD_SD3_CMD__SD3_CMD		0x59
200724ba675SRob Herring			MX7D_PAD_SD3_CLK__SD3_CLK		0x56
201724ba675SRob Herring			MX7D_PAD_SD3_DATA0__SD3_DATA0		0x59
202724ba675SRob Herring			MX7D_PAD_SD3_DATA1__SD3_DATA1		0x59
203724ba675SRob Herring			MX7D_PAD_SD3_DATA2__SD3_DATA2		0x59
204724ba675SRob Herring			MX7D_PAD_SD3_DATA3__SD3_DATA3		0x59
205724ba675SRob Herring			MX7D_PAD_SD3_DATA4__SD3_DATA4		0x59
206724ba675SRob Herring			MX7D_PAD_SD3_DATA5__SD3_DATA5		0x59
207724ba675SRob Herring			MX7D_PAD_SD3_DATA6__SD3_DATA6		0x59
208724ba675SRob Herring			MX7D_PAD_SD3_DATA7__SD3_DATA7		0x59
209724ba675SRob Herring			MX7D_PAD_SD3_STROBE__SD3_STROBE		0x19
210724ba675SRob Herring		>;
211724ba675SRob Herring	};
212724ba675SRob Herring
213724ba675SRob Herring	pinctrl_usdhc3_100mhz: usdhc3grp_100mhz {
214724ba675SRob Herring		fsl,pins = <
215724ba675SRob Herring			MX7D_PAD_SD3_CMD__SD3_CMD               0x5a
216724ba675SRob Herring			MX7D_PAD_SD3_CLK__SD3_CLK               0x51
217724ba675SRob Herring			MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5a
218724ba675SRob Herring			MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5a
219724ba675SRob Herring			MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5a
220724ba675SRob Herring			MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5a
221724ba675SRob Herring			MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5a
222724ba675SRob Herring			MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5a
223724ba675SRob Herring			MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5a
224724ba675SRob Herring			MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5a
225724ba675SRob Herring			MX7D_PAD_SD3_STROBE__SD3_STROBE         0x1a
226724ba675SRob Herring		>;
227724ba675SRob Herring	};
228724ba675SRob Herring
229724ba675SRob Herring	pinctrl_usdhc3_200mhz: usdhc3grp_200mhz {
230724ba675SRob Herring		fsl,pins = <
231724ba675SRob Herring			MX7D_PAD_SD3_CMD__SD3_CMD               0x5b
232724ba675SRob Herring			MX7D_PAD_SD3_CLK__SD3_CLK               0x51
233724ba675SRob Herring			MX7D_PAD_SD3_DATA0__SD3_DATA0           0x5b
234724ba675SRob Herring			MX7D_PAD_SD3_DATA1__SD3_DATA1           0x5b
235724ba675SRob Herring			MX7D_PAD_SD3_DATA2__SD3_DATA2           0x5b
236724ba675SRob Herring			MX7D_PAD_SD3_DATA3__SD3_DATA3           0x5b
237724ba675SRob Herring			MX7D_PAD_SD3_DATA4__SD3_DATA4           0x5b
238724ba675SRob Herring			MX7D_PAD_SD3_DATA5__SD3_DATA5           0x5b
239724ba675SRob Herring			MX7D_PAD_SD3_DATA6__SD3_DATA6           0x5b
240724ba675SRob Herring			MX7D_PAD_SD3_DATA7__SD3_DATA7           0x5b
241724ba675SRob Herring			MX7D_PAD_SD3_STROBE__SD3_STROBE         0x1b
242724ba675SRob Herring		>;
243724ba675SRob Herring	};
244724ba675SRob Herring};
245724ba675SRob Herring
246724ba675SRob Herring&iomuxc_lpsr {
247724ba675SRob Herring	pinctrl_wdog1: wdog1grp {
248724ba675SRob Herring		fsl,pins = <
249724ba675SRob Herring			MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B	0x30
250724ba675SRob Herring		>;
251724ba675SRob Herring	};
252724ba675SRob Herring};
253724ba675SRob Herring
254724ba675SRob Herring&qspi {
255724ba675SRob Herring	pinctrl-names = "default";
256724ba675SRob Herring	pinctrl-0 = <&pinctrl_qspi &pinctrl_qspi_reset>;
257724ba675SRob Herring	status = "okay";
258724ba675SRob Herring
259724ba675SRob Herring	flash0: flash@0 {
260724ba675SRob Herring		compatible = "jedec,spi-nor";
261724ba675SRob Herring		reg = <0>;
262724ba675SRob Herring		spi-max-frequency = <29000000>;
263724ba675SRob Herring		spi-rx-bus-width = <4>;
264724ba675SRob Herring		spi-tx-bus-width = <4>;
265724ba675SRob Herring	};
266724ba675SRob Herring};
267724ba675SRob Herring
268724ba675SRob Herring&sdma {
269724ba675SRob Herring	status = "okay";
270724ba675SRob Herring};
271724ba675SRob Herring
272724ba675SRob Herring&usdhc3 {
273724ba675SRob Herring	pinctrl-names = "default", "state_100mhz", "state_200mhz";
274724ba675SRob Herring	pinctrl-0 = <&pinctrl_usdhc3>;
275724ba675SRob Herring	pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
276724ba675SRob Herring	pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
277724ba675SRob Herring	assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
278724ba675SRob Herring	assigned-clock-rates = <400000000>;
279724ba675SRob Herring	bus-width = <8>;
280724ba675SRob Herring	non-removable;
281724ba675SRob Herring	vmmc-supply = <&vgen4_reg>;
282724ba675SRob Herring	vqmmc-supply = <&sw2_reg>;
283724ba675SRob Herring	status = "okay";
284724ba675SRob Herring};
285724ba675SRob Herring
286724ba675SRob Herring&wdog1 {
287724ba675SRob Herring	pinctrl-names = "default";
288724ba675SRob Herring	pinctrl-0 = <&pinctrl_wdog1>;
289724ba675SRob Herring	/*
290724ba675SRob Herring	 * Errata e10574:
291724ba675SRob Herring	 * WDOG reset needs to run with WDOG_RESET_B signal enabled.
292724ba675SRob Herring	 * X1-51 (WDOG1#) signal needs carrier board handling to reset
293724ba675SRob Herring	 * TQMa7 on X1-22 (RESET_IN#).
294724ba675SRob Herring	 */
295724ba675SRob Herring	fsl,ext-reset-output;
296724ba675SRob Herring	status = "okay";
297724ba675SRob Herring};
298