1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 OR X11 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Device Tree Include file for TQ-Systems TQMa7x boards with full mounted PCB. 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2016 TQ-Systems GmbH 6*724ba675SRob Herring * Author: Markus Niebel <Markus.Niebel@tq-group.com> 7*724ba675SRob Herring * Copyright (C) 2019 Bruno Thomsen <bruno.thomsen@gmail.com> 8*724ba675SRob Herring */ 9*724ba675SRob Herring 10*724ba675SRob Herring/ { 11*724ba675SRob Herring memory@80000000 { 12*724ba675SRob Herring device_type = "memory"; 13*724ba675SRob Herring /* 512 MB - default configuration */ 14*724ba675SRob Herring reg = <0x80000000 0x20000000>; 15*724ba675SRob Herring }; 16*724ba675SRob Herring}; 17*724ba675SRob Herring 18*724ba675SRob Herring&cpu0 { 19*724ba675SRob Herring cpu-supply = <&sw1a_reg>; 20*724ba675SRob Herring}; 21*724ba675SRob Herring 22*724ba675SRob Herring&gpio2 { 23*724ba675SRob Herring /* Configured as pullup by QSPI pin group */ 24*724ba675SRob Herring qspi-reset-hog { 25*724ba675SRob Herring gpio-hog; 26*724ba675SRob Herring gpios = <4 GPIO_ACTIVE_LOW>; 27*724ba675SRob Herring input; 28*724ba675SRob Herring line-name = "qspi-reset"; 29*724ba675SRob Herring }; 30*724ba675SRob Herring}; 31*724ba675SRob Herring 32*724ba675SRob Herring&i2c1 { 33*724ba675SRob Herring pinctrl-names = "default"; 34*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 35*724ba675SRob Herring clock-frequency = <100000>; 36*724ba675SRob Herring status = "okay"; 37*724ba675SRob Herring 38*724ba675SRob Herring pfuze3000: pmic@8 { 39*724ba675SRob Herring pinctrl-names = "default"; 40*724ba675SRob Herring pinctrl-0 = <&pinctrl_pmic1>; 41*724ba675SRob Herring compatible = "fsl,pfuze3000"; 42*724ba675SRob Herring reg = <0x08>; 43*724ba675SRob Herring 44*724ba675SRob Herring regulators { 45*724ba675SRob Herring sw1a_reg: sw1a { 46*724ba675SRob Herring regulator-min-microvolt = <700000>; 47*724ba675SRob Herring regulator-max-microvolt = <3300000>; 48*724ba675SRob Herring regulator-boot-on; 49*724ba675SRob Herring regulator-always-on; 50*724ba675SRob Herring regulator-ramp-delay = <6250>; 51*724ba675SRob Herring }; 52*724ba675SRob Herring 53*724ba675SRob Herring /* use sw1c_reg to align with pfuze100/pfuze200 */ 54*724ba675SRob Herring sw1c_reg: sw1b { 55*724ba675SRob Herring regulator-min-microvolt = <700000>; 56*724ba675SRob Herring regulator-max-microvolt = <1475000>; 57*724ba675SRob Herring regulator-boot-on; 58*724ba675SRob Herring regulator-always-on; 59*724ba675SRob Herring regulator-ramp-delay = <6250>; 60*724ba675SRob Herring }; 61*724ba675SRob Herring 62*724ba675SRob Herring sw2_reg: sw2 { 63*724ba675SRob Herring regulator-min-microvolt = <1500000>; 64*724ba675SRob Herring regulator-max-microvolt = <1850000>; 65*724ba675SRob Herring regulator-boot-on; 66*724ba675SRob Herring regulator-always-on; 67*724ba675SRob Herring }; 68*724ba675SRob Herring 69*724ba675SRob Herring sw3a_reg: sw3 { 70*724ba675SRob Herring regulator-min-microvolt = <900000>; 71*724ba675SRob Herring regulator-max-microvolt = <1650000>; 72*724ba675SRob Herring regulator-boot-on; 73*724ba675SRob Herring regulator-always-on; 74*724ba675SRob Herring }; 75*724ba675SRob Herring 76*724ba675SRob Herring swbst_reg: swbst { 77*724ba675SRob Herring regulator-min-microvolt = <5000000>; 78*724ba675SRob Herring regulator-max-microvolt = <5150000>; 79*724ba675SRob Herring }; 80*724ba675SRob Herring 81*724ba675SRob Herring snvs_reg: vsnvs { 82*724ba675SRob Herring regulator-min-microvolt = <1000000>; 83*724ba675SRob Herring regulator-max-microvolt = <3000000>; 84*724ba675SRob Herring regulator-boot-on; 85*724ba675SRob Herring regulator-always-on; 86*724ba675SRob Herring }; 87*724ba675SRob Herring 88*724ba675SRob Herring vref_reg: vrefddr { 89*724ba675SRob Herring regulator-boot-on; 90*724ba675SRob Herring regulator-always-on; 91*724ba675SRob Herring }; 92*724ba675SRob Herring 93*724ba675SRob Herring vgen1_reg: vldo1 { 94*724ba675SRob Herring regulator-min-microvolt = <1800000>; 95*724ba675SRob Herring regulator-max-microvolt = <3300000>; 96*724ba675SRob Herring regulator-always-on; 97*724ba675SRob Herring }; 98*724ba675SRob Herring 99*724ba675SRob Herring vgen2_reg: vldo2 { 100*724ba675SRob Herring regulator-min-microvolt = <800000>; 101*724ba675SRob Herring regulator-max-microvolt = <1550000>; 102*724ba675SRob Herring regulator-always-on; 103*724ba675SRob Herring }; 104*724ba675SRob Herring 105*724ba675SRob Herring vgen3_reg: vccsd { 106*724ba675SRob Herring regulator-min-microvolt = <2850000>; 107*724ba675SRob Herring regulator-max-microvolt = <3300000>; 108*724ba675SRob Herring regulator-always-on; 109*724ba675SRob Herring }; 110*724ba675SRob Herring 111*724ba675SRob Herring vgen4_reg: v33 { 112*724ba675SRob Herring regulator-min-microvolt = <2850000>; 113*724ba675SRob Herring regulator-max-microvolt = <3300000>; 114*724ba675SRob Herring regulator-always-on; 115*724ba675SRob Herring }; 116*724ba675SRob Herring 117*724ba675SRob Herring vgen5_reg: vldo3 { 118*724ba675SRob Herring regulator-min-microvolt = <1800000>; 119*724ba675SRob Herring regulator-max-microvolt = <3300000>; 120*724ba675SRob Herring regulator-always-on; 121*724ba675SRob Herring }; 122*724ba675SRob Herring 123*724ba675SRob Herring vgen6_reg: vldo4 { 124*724ba675SRob Herring regulator-min-microvolt = <1800000>; 125*724ba675SRob Herring regulator-max-microvolt = <3300000>; 126*724ba675SRob Herring regulator-always-on; 127*724ba675SRob Herring }; 128*724ba675SRob Herring }; 129*724ba675SRob Herring }; 130*724ba675SRob Herring 131*724ba675SRob Herring /* NXP SE97BTP with temperature sensor + eeprom */ 132*724ba675SRob Herring se97b: temperature-sensor-eeprom@1e { 133*724ba675SRob Herring compatible = "nxp,se97b", "jedec,jc-42.4-temp"; 134*724ba675SRob Herring reg = <0x1e>; 135*724ba675SRob Herring status = "okay"; 136*724ba675SRob Herring }; 137*724ba675SRob Herring 138*724ba675SRob Herring /* ST M24C64 */ 139*724ba675SRob Herring m24c64: eeprom@50 { 140*724ba675SRob Herring compatible = "atmel,24c64"; 141*724ba675SRob Herring reg = <0x50>; 142*724ba675SRob Herring pagesize = <32>; 143*724ba675SRob Herring status = "okay"; 144*724ba675SRob Herring }; 145*724ba675SRob Herring 146*724ba675SRob Herring at24c02: eeprom@56 { 147*724ba675SRob Herring compatible = "atmel,24c02"; 148*724ba675SRob Herring reg = <0x56>; 149*724ba675SRob Herring pagesize = <16>; 150*724ba675SRob Herring status = "okay"; 151*724ba675SRob Herring }; 152*724ba675SRob Herring 153*724ba675SRob Herring ds1339: rtc@68 { 154*724ba675SRob Herring compatible = "dallas,ds1339"; 155*724ba675SRob Herring reg = <0x68>; 156*724ba675SRob Herring }; 157*724ba675SRob Herring}; 158*724ba675SRob Herring 159*724ba675SRob Herring&iomuxc { 160*724ba675SRob Herring pinctrl_i2c1: i2c1grp { 161*724ba675SRob Herring fsl,pins = < 162*724ba675SRob Herring MX7D_PAD_I2C1_SDA__I2C1_SDA 0x40000078 163*724ba675SRob Herring MX7D_PAD_I2C1_SCL__I2C1_SCL 0x40000078 164*724ba675SRob Herring >; 165*724ba675SRob Herring }; 166*724ba675SRob Herring 167*724ba675SRob Herring pinctrl_pmic1: pmic1grp { 168*724ba675SRob Herring fsl,pins = < 169*724ba675SRob Herring MX7D_PAD_SD2_RESET_B__GPIO5_IO11 0x4000005C 170*724ba675SRob Herring >; 171*724ba675SRob Herring }; 172*724ba675SRob Herring 173*724ba675SRob Herring pinctrl_qspi: qspigrp { 174*724ba675SRob Herring fsl,pins = < 175*724ba675SRob Herring MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x5A 176*724ba675SRob Herring MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x5A 177*724ba675SRob Herring MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x5A 178*724ba675SRob Herring MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x5A 179*724ba675SRob Herring MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x11 180*724ba675SRob Herring MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x54 181*724ba675SRob Herring MX7D_PAD_EPDC_DATA07__QSPI_A_SS1_B 0x54 182*724ba675SRob Herring >; 183*724ba675SRob Herring }; 184*724ba675SRob Herring 185*724ba675SRob Herring pinctrl_qspi_reset: qspi_resetgrp { 186*724ba675SRob Herring fsl,pins = < 187*724ba675SRob Herring /* #QSPI_RESET */ 188*724ba675SRob Herring MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x52 189*724ba675SRob Herring >; 190*724ba675SRob Herring }; 191*724ba675SRob Herring 192*724ba675SRob Herring pinctrl_usdhc3: usdhc3grp { 193*724ba675SRob Herring fsl,pins = < 194*724ba675SRob Herring MX7D_PAD_SD3_CMD__SD3_CMD 0x59 195*724ba675SRob Herring MX7D_PAD_SD3_CLK__SD3_CLK 0x56 196*724ba675SRob Herring MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 197*724ba675SRob Herring MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 198*724ba675SRob Herring MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 199*724ba675SRob Herring MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 200*724ba675SRob Herring MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 201*724ba675SRob Herring MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 202*724ba675SRob Herring MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 203*724ba675SRob Herring MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 204*724ba675SRob Herring MX7D_PAD_SD3_STROBE__SD3_STROBE 0x19 205*724ba675SRob Herring >; 206*724ba675SRob Herring }; 207*724ba675SRob Herring 208*724ba675SRob Herring pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { 209*724ba675SRob Herring fsl,pins = < 210*724ba675SRob Herring MX7D_PAD_SD3_CMD__SD3_CMD 0x5a 211*724ba675SRob Herring MX7D_PAD_SD3_CLK__SD3_CLK 0x51 212*724ba675SRob Herring MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a 213*724ba675SRob Herring MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a 214*724ba675SRob Herring MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a 215*724ba675SRob Herring MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a 216*724ba675SRob Herring MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a 217*724ba675SRob Herring MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a 218*724ba675SRob Herring MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a 219*724ba675SRob Herring MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a 220*724ba675SRob Herring MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1a 221*724ba675SRob Herring >; 222*724ba675SRob Herring }; 223*724ba675SRob Herring 224*724ba675SRob Herring pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { 225*724ba675SRob Herring fsl,pins = < 226*724ba675SRob Herring MX7D_PAD_SD3_CMD__SD3_CMD 0x5b 227*724ba675SRob Herring MX7D_PAD_SD3_CLK__SD3_CLK 0x51 228*724ba675SRob Herring MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b 229*724ba675SRob Herring MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b 230*724ba675SRob Herring MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b 231*724ba675SRob Herring MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b 232*724ba675SRob Herring MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b 233*724ba675SRob Herring MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b 234*724ba675SRob Herring MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b 235*724ba675SRob Herring MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b 236*724ba675SRob Herring MX7D_PAD_SD3_STROBE__SD3_STROBE 0x1b 237*724ba675SRob Herring >; 238*724ba675SRob Herring }; 239*724ba675SRob Herring}; 240*724ba675SRob Herring 241*724ba675SRob Herring&iomuxc_lpsr { 242*724ba675SRob Herring pinctrl_wdog1: wdog1grp { 243*724ba675SRob Herring fsl,pins = < 244*724ba675SRob Herring MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x30 245*724ba675SRob Herring >; 246*724ba675SRob Herring }; 247*724ba675SRob Herring}; 248*724ba675SRob Herring 249*724ba675SRob Herring&qspi { 250*724ba675SRob Herring pinctrl-names = "default"; 251*724ba675SRob Herring pinctrl-0 = <&pinctrl_qspi &pinctrl_qspi_reset>; 252*724ba675SRob Herring status = "okay"; 253*724ba675SRob Herring 254*724ba675SRob Herring flash0: flash@0 { 255*724ba675SRob Herring compatible = "jedec,spi-nor"; 256*724ba675SRob Herring reg = <0>; 257*724ba675SRob Herring spi-max-frequency = <29000000>; 258*724ba675SRob Herring spi-rx-bus-width = <4>; 259*724ba675SRob Herring spi-tx-bus-width = <4>; 260*724ba675SRob Herring }; 261*724ba675SRob Herring}; 262*724ba675SRob Herring 263*724ba675SRob Herring&sdma { 264*724ba675SRob Herring status = "okay"; 265*724ba675SRob Herring}; 266*724ba675SRob Herring 267*724ba675SRob Herring&usdhc3 { 268*724ba675SRob Herring pinctrl-names = "default", "state_100mhz", "state_200mhz"; 269*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc3>; 270*724ba675SRob Herring pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 271*724ba675SRob Herring pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 272*724ba675SRob Herring assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; 273*724ba675SRob Herring assigned-clock-rates = <400000000>; 274*724ba675SRob Herring bus-width = <8>; 275*724ba675SRob Herring non-removable; 276*724ba675SRob Herring vmmc-supply = <&vgen4_reg>; 277*724ba675SRob Herring vqmmc-supply = <&sw2_reg>; 278*724ba675SRob Herring status = "okay"; 279*724ba675SRob Herring}; 280*724ba675SRob Herring 281*724ba675SRob Herring&wdog1 { 282*724ba675SRob Herring pinctrl-names = "default"; 283*724ba675SRob Herring pinctrl-0 = <&pinctrl_wdog1>; 284*724ba675SRob Herring /* 285*724ba675SRob Herring * Errata e10574: 286*724ba675SRob Herring * WDOG reset needs to run with WDOG_RESET_B signal enabled. 287*724ba675SRob Herring * X1-51 (WDOG1#) signal needs carrier board handling to reset 288*724ba675SRob Herring * TQMa7 on X1-22 (RESET_IN#). 289*724ba675SRob Herring */ 290*724ba675SRob Herring fsl,ext-reset-output; 291*724ba675SRob Herring status = "okay"; 292*724ba675SRob Herring}; 293