1e3b56971SParthiban Nallathambi// SPDX-License-Identifier: GPL-2.0 2e3b56971SParthiban Nallathambi/* 3e3b56971SParthiban Nallathambi * Copyright (c) 2024 Linumiz 4e3b56971SParthiban Nallathambi * Author: Parthiban <parthiban@linumiz.com> 5e3b56971SParthiban Nallathambi */ 6e3b56971SParthiban Nallathambi 7e3b56971SParthiban Nallathambi#include <dt-bindings/gpio/gpio.h> 8e3b56971SParthiban Nallathambi 9e3b56971SParthiban Nallathambi/ { 10e3b56971SParthiban Nallathambi chosen { 11e3b56971SParthiban Nallathambi stdout-path = &uart1; 12e3b56971SParthiban Nallathambi }; 13e3b56971SParthiban Nallathambi 14e3b56971SParthiban Nallathambi gpio_buttons: gpio-keys { 15e3b56971SParthiban Nallathambi compatible = "gpio-keys"; 16e3b56971SParthiban Nallathambi pinctrl-names = "default"; 17e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_button>; 18e3b56971SParthiban Nallathambi 19e3b56971SParthiban Nallathambi button-0 { 20e3b56971SParthiban Nallathambi gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; 21e3b56971SParthiban Nallathambi label = "SW2"; 22e3b56971SParthiban Nallathambi linux,code = <KEY_A>; 23e3b56971SParthiban Nallathambi wakeup-source; 24e3b56971SParthiban Nallathambi }; 25e3b56971SParthiban Nallathambi }; 26e3b56971SParthiban Nallathambi 27e3b56971SParthiban Nallathambi gpio-leds { 28e3b56971SParthiban Nallathambi compatible = "gpio-leds"; 29e3b56971SParthiban Nallathambi pinctrl-names = "default"; 30e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_gpio_leds>; 31e3b56971SParthiban Nallathambi 32e3b56971SParthiban Nallathambi led-blue { 33e3b56971SParthiban Nallathambi gpios = <&gpio4 19 GPIO_ACTIVE_LOW>; 34e3b56971SParthiban Nallathambi label = "LED_B"; 35e3b56971SParthiban Nallathambi linux,default-trigger = "heartbeat"; 36e3b56971SParthiban Nallathambi default-state = "on"; 37e3b56971SParthiban Nallathambi }; 38e3b56971SParthiban Nallathambi 39e3b56971SParthiban Nallathambi led-green { 40e3b56971SParthiban Nallathambi gpios = <&gpio4 20 GPIO_ACTIVE_LOW>; 41e3b56971SParthiban Nallathambi label = "LED_G"; 42e3b56971SParthiban Nallathambi linux,default-trigger = "heartbeat"; 43e3b56971SParthiban Nallathambi default-state = "on"; 44e3b56971SParthiban Nallathambi }; 45e3b56971SParthiban Nallathambi 46e3b56971SParthiban Nallathambi led-red { 47e3b56971SParthiban Nallathambi gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 48e3b56971SParthiban Nallathambi label = "LED_R"; 49e3b56971SParthiban Nallathambi linux,default-trigger = "heartbeat"; 50e3b56971SParthiban Nallathambi default-state = "on"; 51e3b56971SParthiban Nallathambi }; 52e3b56971SParthiban Nallathambi 53e3b56971SParthiban Nallathambi led-user { 54e3b56971SParthiban Nallathambi gpios = <&gpio5 3 GPIO_ACTIVE_LOW>; 55e3b56971SParthiban Nallathambi label = "User"; 56e3b56971SParthiban Nallathambi linux,default-trigger = "heartbeat"; 57e3b56971SParthiban Nallathambi default-state = "on"; 58e3b56971SParthiban Nallathambi }; 59e3b56971SParthiban Nallathambi }; 60e3b56971SParthiban Nallathambi 61e3b56971SParthiban Nallathambi reg_5v_sys: regulator-5v-sys { 62e3b56971SParthiban Nallathambi compatible = "regulator-fixed"; 63e3b56971SParthiban Nallathambi regulator-name = "5V_SYS"; 64e3b56971SParthiban Nallathambi regulator-min-microvolt = <5000000>; 65e3b56971SParthiban Nallathambi regulator-max-microvolt = <5000000>; 66e3b56971SParthiban Nallathambi regulator-always-on; 67e3b56971SParthiban Nallathambi }; 68e3b56971SParthiban Nallathambi 69e3b56971SParthiban Nallathambi reg_5v: regulator-5v { 70e3b56971SParthiban Nallathambi compatible = "regulator-fixed"; 71e3b56971SParthiban Nallathambi regulator-name = "5V"; 72e3b56971SParthiban Nallathambi regulator-min-microvolt = <5000000>; 73e3b56971SParthiban Nallathambi regulator-max-microvolt = <5000000>; 74e3b56971SParthiban Nallathambi regulator-always-on; 75e3b56971SParthiban Nallathambi vin-supply = <®_5v_sys>; 76e3b56971SParthiban Nallathambi }; 77e3b56971SParthiban Nallathambi 78e3b56971SParthiban Nallathambi reg_3v3_in: regulator-3v3-in { 79e3b56971SParthiban Nallathambi compatible = "regulator-fixed"; 80e3b56971SParthiban Nallathambi regulator-name = "3V3_IN"; 81e3b56971SParthiban Nallathambi regulator-min-microvolt = <3300000>; 82e3b56971SParthiban Nallathambi regulator-max-microvolt = <3300000>; 83e3b56971SParthiban Nallathambi regulator-always-on; 84e3b56971SParthiban Nallathambi vin-supply = <®_5v_sys>; 85e3b56971SParthiban Nallathambi }; 86e3b56971SParthiban Nallathambi 87e3b56971SParthiban Nallathambi reg_3v3: regulator-3v3 { 88e3b56971SParthiban Nallathambi compatible = "regulator-fixed"; 89e3b56971SParthiban Nallathambi regulator-name = "3V3"; 90e3b56971SParthiban Nallathambi regulator-min-microvolt = <3300000>; 91e3b56971SParthiban Nallathambi regulator-max-microvolt = <3300000>; 92e3b56971SParthiban Nallathambi regulator-always-on; 93e3b56971SParthiban Nallathambi vin-supply = <®_3v3_in>; 94e3b56971SParthiban Nallathambi }; 95e3b56971SParthiban Nallathambi 96e3b56971SParthiban Nallathambi reg_sd1_vmmc: regulator-sd1-vmmc { 97e3b56971SParthiban Nallathambi compatible = "regulator-fixed"; 98e3b56971SParthiban Nallathambi regulator-name = "3V3_SD"; 99e3b56971SParthiban Nallathambi regulator-min-microvolt = <3300000>; 100e3b56971SParthiban Nallathambi regulator-max-microvolt = <3300000>; 101e3b56971SParthiban Nallathambi gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; 102e3b56971SParthiban Nallathambi pinctrl-names = "default"; 103e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_reg_vmmc>; 104e3b56971SParthiban Nallathambi enable-active-high; 105e3b56971SParthiban Nallathambi regulator-always-on; 106e3b56971SParthiban Nallathambi vin-supply = <®_3v3>; 107e3b56971SParthiban Nallathambi }; 108e3b56971SParthiban Nallathambi}; 109e3b56971SParthiban Nallathambi 110e3b56971SParthiban Nallathambi&csi { 111e3b56971SParthiban Nallathambi pinctrl-names = "default"; 112e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_csi1>; 113e3b56971SParthiban Nallathambi status = "disabled"; /* LED Blue & Green shared */ 114e3b56971SParthiban Nallathambi}; 115e3b56971SParthiban Nallathambi 116e3b56971SParthiban Nallathambi&fec1 { 117e3b56971SParthiban Nallathambi pinctrl-names = "default"; 118e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_enet1>; 119e3b56971SParthiban Nallathambi phy-mode = "rmii"; 120e3b56971SParthiban Nallathambi phy-handle = <ðphy0>; 121e3b56971SParthiban Nallathambi status = "okay"; 122e3b56971SParthiban Nallathambi}; 123e3b56971SParthiban Nallathambi 124e3b56971SParthiban Nallathambi&fec2 { 125e3b56971SParthiban Nallathambi pinctrl-names = "default"; 126e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_enet2>; 127e3b56971SParthiban Nallathambi phy-mode = "rmii"; 128e3b56971SParthiban Nallathambi phy-handle = <ðphy1>; 129e3b56971SParthiban Nallathambi status = "okay"; 130e3b56971SParthiban Nallathambi 131e3b56971SParthiban Nallathambi mdio { 132e3b56971SParthiban Nallathambi #address-cells = <1>; 133e3b56971SParthiban Nallathambi #size-cells = <0>; 134e3b56971SParthiban Nallathambi 135e3b56971SParthiban Nallathambi ethphy0: ethernet-phy@2 { 136e3b56971SParthiban Nallathambi compatible = "ethernet-phy-ieee802.3-c22"; 137e3b56971SParthiban Nallathambi reg = <2>; 138e3b56971SParthiban Nallathambi micrel,led-mode = <1>; 139e3b56971SParthiban Nallathambi clocks = <&clks IMX6UL_CLK_ENET_REF>; 140e3b56971SParthiban Nallathambi clock-names = "rmii-ref"; 141e3b56971SParthiban Nallathambi }; 142e3b56971SParthiban Nallathambi 143e3b56971SParthiban Nallathambi ethphy1: ethernet-phy@1 { 144e3b56971SParthiban Nallathambi compatible = "ethernet-phy-ieee802.3-c22"; 145e3b56971SParthiban Nallathambi reg = <1>; 146e3b56971SParthiban Nallathambi micrel,led-mode = <1>; 147e3b56971SParthiban Nallathambi clocks = <&clks IMX6UL_CLK_ENET2_REF>; 148e3b56971SParthiban Nallathambi clock-names = "rmii-ref"; 149e3b56971SParthiban Nallathambi }; 150e3b56971SParthiban Nallathambi }; 151e3b56971SParthiban Nallathambi}; 152e3b56971SParthiban Nallathambi 153e3b56971SParthiban Nallathambi&lcdif { 154e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_lcdif>; 155e3b56971SParthiban Nallathambi pinctrl-names = "default"; 156e3b56971SParthiban Nallathambi status = "disabled"; 157e3b56971SParthiban Nallathambi}; 158e3b56971SParthiban Nallathambi 159e3b56971SParthiban Nallathambi®_dcdc_3v3 { 160e3b56971SParthiban Nallathambi vin-supply = <®_3v3_in>; 161e3b56971SParthiban Nallathambi}; 162e3b56971SParthiban Nallathambi 163e3b56971SParthiban Nallathambi&sai2 { 164e3b56971SParthiban Nallathambi assigned-clock-rates = <320000000>; 165e3b56971SParthiban Nallathambi assigned-clocks = <&clks IMX6UL_CLK_PLL3_PFD2>; 166e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_sai2>; 167e3b56971SParthiban Nallathambi pinctrl-names = "default"; 168e3b56971SParthiban Nallathambi status = "okay"; 169e3b56971SParthiban Nallathambi}; 170e3b56971SParthiban Nallathambi 171e3b56971SParthiban Nallathambi&snvs_poweroff { 172e3b56971SParthiban Nallathambi status = "okay"; 173e3b56971SParthiban Nallathambi}; 174e3b56971SParthiban Nallathambi 175e3b56971SParthiban Nallathambi&uart1 { 176e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_uart1>; 177e3b56971SParthiban Nallathambi status = "okay"; 178e3b56971SParthiban Nallathambi}; 179e3b56971SParthiban Nallathambi 180e3b56971SParthiban Nallathambi&uart2 { 181e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_uart2>; 182e3b56971SParthiban Nallathambi uart-has-rtscts; 183e3b56971SParthiban Nallathambi status = "okay"; 184e3b56971SParthiban Nallathambi}; 185e3b56971SParthiban Nallathambi 186e3b56971SParthiban Nallathambi&uart3 { 187e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_uart3>; 188e3b56971SParthiban Nallathambi uart-has-rtscts; 189e3b56971SParthiban Nallathambi status = "okay"; 190e3b56971SParthiban Nallathambi}; 191e3b56971SParthiban Nallathambi 192e3b56971SParthiban Nallathambi&uart4 { 193e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_uart4>; 194e3b56971SParthiban Nallathambi status = "okay"; 195e3b56971SParthiban Nallathambi}; 196e3b56971SParthiban Nallathambi 197e3b56971SParthiban Nallathambi&uart5 { 198e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_uart5>; 199e3b56971SParthiban Nallathambi status = "okay"; 200e3b56971SParthiban Nallathambi}; 201e3b56971SParthiban Nallathambi 202e3b56971SParthiban Nallathambi&usbotg1 { 203e3b56971SParthiban Nallathambi pinctrl-names = "default"; 204e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_usb_otg1_id>; 205e3b56971SParthiban Nallathambi dr_mode = "otg"; 206e3b56971SParthiban Nallathambi srp-disable; 207e3b56971SParthiban Nallathambi hnp-disable; 208e3b56971SParthiban Nallathambi adp-disable; 209e3b56971SParthiban Nallathambi status = "okay"; 210e3b56971SParthiban Nallathambi}; 211e3b56971SParthiban Nallathambi 212e3b56971SParthiban Nallathambi&usbotg2 { 213e3b56971SParthiban Nallathambi dr_mode = "host"; 214e3b56971SParthiban Nallathambi disable-over-current; 215e3b56971SParthiban Nallathambi status = "okay"; 216e3b56971SParthiban Nallathambi}; 217e3b56971SParthiban Nallathambi 218e3b56971SParthiban Nallathambi&usdhc1 { 219e3b56971SParthiban Nallathambi pinctrl-names = "default", "state_100mhz", "state_200mhz"; 220e3b56971SParthiban Nallathambi pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_usdhc1_cd>; 221e3b56971SParthiban Nallathambi pinctrl-1 = <&pinctrl_usdhc1_100mhz &pinctrl_usdhc1_cd>; 222e3b56971SParthiban Nallathambi pinctrl-2 = <&pinctrl_usdhc1_200mhz &pinctrl_usdhc1_cd>; 223e3b56971SParthiban Nallathambi cd-gpios = <&gpio1 19 GPIO_ACTIVE_LOW>; 224e3b56971SParthiban Nallathambi no-1-8-v; 225e3b56971SParthiban Nallathambi keep-power-in-suspend; 226e3b56971SParthiban Nallathambi wakeup-source; 227e3b56971SParthiban Nallathambi vmmc-supply = <®_sd1_vmmc>; 228e3b56971SParthiban Nallathambi status = "okay"; 229e3b56971SParthiban Nallathambi}; 230e3b56971SParthiban Nallathambi 231e3b56971SParthiban Nallathambi&iomuxc { 232e3b56971SParthiban Nallathambi pinctrl_button: buttongrp { 233e3b56971SParthiban Nallathambi fsl,pins = < 234e3b56971SParthiban Nallathambi MX6ULL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0 235e3b56971SParthiban Nallathambi >; 236e3b56971SParthiban Nallathambi }; 237e3b56971SParthiban Nallathambi 238e3b56971SParthiban Nallathambi pinctrl_csi1: csi1grp { 239e3b56971SParthiban Nallathambi fsl,pins = < 240e3b56971SParthiban Nallathambi MX6UL_PAD_CSI_PIXCLK__CSI_PIXCLK 0x1b088 241e3b56971SParthiban Nallathambi MX6UL_PAD_CSI_VSYNC__CSI_VSYNC 0x1b088 242e3b56971SParthiban Nallathambi MX6UL_PAD_CSI_HSYNC__CSI_HSYNC 0x1b088 243e3b56971SParthiban Nallathambi MX6UL_PAD_CSI_DATA00__CSI_DATA02 0x1b088 244e3b56971SParthiban Nallathambi MX6UL_PAD_CSI_DATA01__CSI_DATA03 0x1b088 245e3b56971SParthiban Nallathambi MX6UL_PAD_CSI_DATA02__CSI_DATA04 0x1b088 246e3b56971SParthiban Nallathambi MX6UL_PAD_CSI_DATA03__CSI_DATA05 0x1b088 247e3b56971SParthiban Nallathambi MX6UL_PAD_CSI_DATA04__CSI_DATA06 0x1b088 248e3b56971SParthiban Nallathambi MX6UL_PAD_CSI_DATA05__CSI_DATA07 0x1b088 249e3b56971SParthiban Nallathambi MX6UL_PAD_CSI_DATA06__CSI_DATA08 0x1b088 250e3b56971SParthiban Nallathambi MX6UL_PAD_CSI_DATA07__CSI_DATA09 0x1b088 251e3b56971SParthiban Nallathambi >; 252e3b56971SParthiban Nallathambi }; 253e3b56971SParthiban Nallathambi 254e3b56971SParthiban Nallathambi pinctrl_enet1: enet1grp { 255e3b56971SParthiban Nallathambi fsl,pins = < 256e3b56971SParthiban Nallathambi MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x1b0b0 257e3b56971SParthiban Nallathambi MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x1b0b0 258e3b56971SParthiban Nallathambi MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x1b0b0 259e3b56971SParthiban Nallathambi MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x1b0b0 260e3b56971SParthiban Nallathambi MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 261e3b56971SParthiban Nallathambi MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 262e3b56971SParthiban Nallathambi MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 263e3b56971SParthiban Nallathambi MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 264e3b56971SParthiban Nallathambi >; 265e3b56971SParthiban Nallathambi }; 266e3b56971SParthiban Nallathambi 267e3b56971SParthiban Nallathambi pinctrl_enet2: enet2grp { 268e3b56971SParthiban Nallathambi fsl,pins = < 269e3b56971SParthiban Nallathambi MX6UL_PAD_GPIO1_IO07__ENET2_MDC 0x1b0b0 270e3b56971SParthiban Nallathambi MX6UL_PAD_GPIO1_IO06__ENET2_MDIO 0x1b0b0 271e3b56971SParthiban Nallathambi MX6UL_PAD_ENET2_RX_EN__ENET2_RX_EN 0x1b0b0 272e3b56971SParthiban Nallathambi MX6UL_PAD_ENET2_RX_ER__ENET2_RX_ER 0x1b0b0 273e3b56971SParthiban Nallathambi MX6UL_PAD_ENET2_RX_DATA0__ENET2_RDATA00 0x1b0b0 274e3b56971SParthiban Nallathambi MX6UL_PAD_ENET2_RX_DATA1__ENET2_RDATA01 0x1b0b0 275e3b56971SParthiban Nallathambi MX6UL_PAD_ENET2_TX_EN__ENET2_TX_EN 0x1b0b0 276e3b56971SParthiban Nallathambi MX6UL_PAD_ENET2_TX_DATA0__ENET2_TDATA00 0x1b0b0 277e3b56971SParthiban Nallathambi MX6UL_PAD_ENET2_TX_DATA1__ENET2_TDATA01 0x1b0b0 278e3b56971SParthiban Nallathambi MX6UL_PAD_ENET2_TX_CLK__ENET2_REF_CLK2 0x4001b031 279e3b56971SParthiban Nallathambi >; 280e3b56971SParthiban Nallathambi }; 281e3b56971SParthiban Nallathambi 282e3b56971SParthiban Nallathambi pinctrl_gpio_leds: ledgrp { 283e3b56971SParthiban Nallathambi fsl,pins = < 284e3b56971SParthiban Nallathambi MX6UL_PAD_GPIO1_IO04__GPIO1_IO04 0x0b0b0 285e3b56971SParthiban Nallathambi MX6UL_PAD_CSI_VSYNC__GPIO4_IO19 0x0b0b0 286e3b56971SParthiban Nallathambi MX6UL_PAD_CSI_HSYNC__GPIO4_IO20 0x0b0b0 287e3b56971SParthiban Nallathambi MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0 288e3b56971SParthiban Nallathambi >; 289e3b56971SParthiban Nallathambi }; 290e3b56971SParthiban Nallathambi 291e3b56971SParthiban Nallathambi pinctrl_lcdif: lcdif-grp { 292e3b56971SParthiban Nallathambi fsl,pins = < 293e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_CLK__LCDIF_CLK 0x79 294e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_ENABLE__LCDIF_ENABLE 0x79 295e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_HSYNC__LCDIF_HSYNC 0x79 296e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_VSYNC__LCDIF_VSYNC 0x79 297e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_RESET__LCDIF_RESET 0x79 298e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA00__LCDIF_DATA00 0x79 299e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA01__LCDIF_DATA01 0x79 300e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA02__LCDIF_DATA02 0x79 301e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA03__LCDIF_DATA03 0x79 302e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA04__LCDIF_DATA04 0x79 303e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA05__LCDIF_DATA05 0x79 304e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA06__LCDIF_DATA06 0x79 305e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA07__LCDIF_DATA07 0x79 306e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA08__LCDIF_DATA08 0x79 307e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA09__LCDIF_DATA09 0x79 308e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA10__LCDIF_DATA10 0x79 309e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA11__LCDIF_DATA11 0x79 310e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA12__LCDIF_DATA12 0x79 311e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA13__LCDIF_DATA13 0x79 312e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA14__LCDIF_DATA14 0x79 313e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA15__LCDIF_DATA15 0x79 314e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA16__LCDIF_DATA16 0x79 315e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA17__LCDIF_DATA17 0x79 316e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA18__LCDIF_DATA18 0x79 317e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA19__LCDIF_DATA19 0x79 318e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA20__LCDIF_DATA20 0x79 319e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA21__LCDIF_DATA21 0x79 320e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA22__LCDIF_DATA22 0x79 321e3b56971SParthiban Nallathambi MX6UL_PAD_LCD_DATA23__LCDIF_DATA23 0x79 322e3b56971SParthiban Nallathambi MX6UL_PAD_GPIO1_IO08__GPIO1_IO08 0x79 323e3b56971SParthiban Nallathambi >; 324e3b56971SParthiban Nallathambi }; 325e3b56971SParthiban Nallathambi 326*a9c741d8SKrzysztof Kozlowski pinctrl_reg_vmmc: usdhc1regvmmc-grp { 327e3b56971SParthiban Nallathambi fsl,pins = < 328e3b56971SParthiban Nallathambi MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 329e3b56971SParthiban Nallathambi >; 330e3b56971SParthiban Nallathambi }; 331e3b56971SParthiban Nallathambi 332e3b56971SParthiban Nallathambi pinctrl_sai2: sai2-grp { 333e3b56971SParthiban Nallathambi fsl,pins = < 334e3b56971SParthiban Nallathambi MX6UL_PAD_JTAG_TCK__SAI2_RX_DATA 0x130b0 335e3b56971SParthiban Nallathambi MX6UL_PAD_JTAG_TDI__SAI2_TX_BCLK 0x17088 336e3b56971SParthiban Nallathambi MX6UL_PAD_JTAG_TDO__SAI2_TX_SYNC 0x17088 337e3b56971SParthiban Nallathambi MX6UL_PAD_JTAG_TRST_B__SAI2_TX_DATA 0x120b0 338e3b56971SParthiban Nallathambi >; 339e3b56971SParthiban Nallathambi }; 340e3b56971SParthiban Nallathambi 341e3b56971SParthiban Nallathambi pinctrl_uart1: uart1grp { 3423dedd488SKrzysztof Kozlowski fsl,pins = < 343e3b56971SParthiban Nallathambi MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 344e3b56971SParthiban Nallathambi MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 345e3b56971SParthiban Nallathambi >; 346e3b56971SParthiban Nallathambi }; 347e3b56971SParthiban Nallathambi 348e3b56971SParthiban Nallathambi pinctrl_uart2: uart2grp { 3493dedd488SKrzysztof Kozlowski fsl,pins = < 350e3b56971SParthiban Nallathambi MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX 0x1b0b1 351e3b56971SParthiban Nallathambi MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX 0x1b0b1 352e3b56971SParthiban Nallathambi MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS 0x1b0b1 353e3b56971SParthiban Nallathambi MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS 0x1b0b1 354e3b56971SParthiban Nallathambi >; 355e3b56971SParthiban Nallathambi }; 356e3b56971SParthiban Nallathambi 357e3b56971SParthiban Nallathambi pinctrl_uart3: uart3grp { 3583dedd488SKrzysztof Kozlowski fsl,pins = < 359e3b56971SParthiban Nallathambi MX6UL_PAD_UART3_TX_DATA__UART3_DCE_TX 0x1b0b1 360e3b56971SParthiban Nallathambi MX6UL_PAD_UART3_RX_DATA__UART3_DCE_RX 0x1b0b1 361e3b56971SParthiban Nallathambi MX6UL_PAD_UART3_CTS_B__UART3_DCE_CTS 0x1b0b1 362e3b56971SParthiban Nallathambi MX6UL_PAD_UART3_RTS_B__UART3_DCE_RTS 0x1b0b1 363e3b56971SParthiban Nallathambi >; 364e3b56971SParthiban Nallathambi }; 365e3b56971SParthiban Nallathambi 366e3b56971SParthiban Nallathambi pinctrl_uart4: uart4grp { 3673dedd488SKrzysztof Kozlowski fsl,pins = < 368e3b56971SParthiban Nallathambi MX6UL_PAD_UART4_TX_DATA__UART4_DCE_TX 0x1b0b1 369e3b56971SParthiban Nallathambi MX6UL_PAD_UART4_RX_DATA__UART4_DCE_RX 0x1b0b1 370e3b56971SParthiban Nallathambi >; 371e3b56971SParthiban Nallathambi }; 372e3b56971SParthiban Nallathambi 373e3b56971SParthiban Nallathambi pinctrl_uart5: uart5grp { 3743dedd488SKrzysztof Kozlowski fsl,pins = < 375e3b56971SParthiban Nallathambi MX6UL_PAD_UART5_TX_DATA__UART5_DCE_TX 0x1b0b1 376e3b56971SParthiban Nallathambi MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x1b0b1 377e3b56971SParthiban Nallathambi >; 378e3b56971SParthiban Nallathambi }; 379e3b56971SParthiban Nallathambi 380e3b56971SParthiban Nallathambi pinctrl_usb_otg1_id: usbotg1idgrp { 3813dedd488SKrzysztof Kozlowski fsl,pins = < 382e3b56971SParthiban Nallathambi MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 383e3b56971SParthiban Nallathambi >; 384e3b56971SParthiban Nallathambi }; 385e3b56971SParthiban Nallathambi 386e3b56971SParthiban Nallathambi pinctrl_usdhc1: usdhc1grp { 387e3b56971SParthiban Nallathambi fsl,pins = < 388e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 389e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 390e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 391e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 392e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 393e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 394e3b56971SParthiban Nallathambi >; 395e3b56971SParthiban Nallathambi }; 396e3b56971SParthiban Nallathambi 397*a9c741d8SKrzysztof Kozlowski pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { 398e3b56971SParthiban Nallathambi fsl,pins = < 399e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170b9 400e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100b9 401e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170b9 402e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170b9 403e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170b9 404e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170b9 405e3b56971SParthiban Nallathambi >; 406e3b56971SParthiban Nallathambi }; 407e3b56971SParthiban Nallathambi 408*a9c741d8SKrzysztof Kozlowski pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { 409e3b56971SParthiban Nallathambi fsl,pins = < 410e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x170f9 411e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x100f9 412e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x170f9 413e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x170f9 414e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x170f9 415e3b56971SParthiban Nallathambi MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x170f9 416e3b56971SParthiban Nallathambi >; 417e3b56971SParthiban Nallathambi }; 418e3b56971SParthiban Nallathambi 419*a9c741d8SKrzysztof Kozlowski pinctrl_usdhc1_cd: usdhc1cd-grp { 420e3b56971SParthiban Nallathambi fsl,pins = < 421e3b56971SParthiban Nallathambi MX6UL_PAD_UART1_RTS_B__GPIO1_IO19 0x17059 422e3b56971SParthiban Nallathambi >; 423e3b56971SParthiban Nallathambi }; 424e3b56971SParthiban Nallathambi}; 425