1724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT) 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright 2018-2022 TQ-Systems GmbH 4724ba675SRob Herring * Author: Markus Niebel <Markus.Niebel@tq-group.com> 5724ba675SRob Herring */ 6724ba675SRob Herring 7724ba675SRob Herring/dts-v1/; 8724ba675SRob Herring 9*22d8f69cSMax Merchel#include "imx6ul-tqma6ul2.dtsi" 10724ba675SRob Herring#include "mba6ulx.dtsi" 11*22d8f69cSMax Merchel#include "imx6ul-tqma6ul1.dtsi" 12724ba675SRob Herring 13724ba675SRob Herring/ { 14724ba675SRob Herring model = "TQ-Systems TQMa6UL1 SoM on MBa6ULx board"; 15724ba675SRob Herring compatible = "tq,imx6ul-tqma6ul1-mba6ulx", "tq,imx6ul-tqma6ul1", "fsl,imx6ul"; 16724ba675SRob Herring}; 17724ba675SRob Herring 18724ba675SRob Herring/* 19724ba675SRob Herring * Note: can2 and fec2 are enabled on mba6ulx level (for i.MX6ULG2 usage) 20724ba675SRob Herring * and need to be disabled here again 21724ba675SRob Herring */ 22724ba675SRob Herring&can2 { 23724ba675SRob Herring status = "disabled"; 24724ba675SRob Herring}; 25724ba675SRob Herring 26724ba675SRob Herring&fec1 { 27724ba675SRob Herring pinctrl-names = "default"; 28724ba675SRob Herring pinctrl-0 = <&pinctrl_enet1>, <&pinctrl_enet1_mdc>; 29724ba675SRob Herring status = "okay"; 30724ba675SRob Herring 31724ba675SRob Herring mdio { 32724ba675SRob Herring #address-cells = <1>; 33724ba675SRob Herring #size-cells = <0>; 34724ba675SRob Herring 35724ba675SRob Herring ethphy0: ethernet-phy@0 { 36724ba675SRob Herring compatible = "ethernet-phy-ieee802.3-c22"; 37724ba675SRob Herring max-speed = <100>; 38724ba675SRob Herring reg = <0>; 39724ba675SRob Herring }; 40724ba675SRob Herring }; 41724ba675SRob Herring}; 42724ba675SRob Herring 43724ba675SRob Herring&fec2 { 44724ba675SRob Herring /delete-property/ phy-handle; 45724ba675SRob Herring /delete-node/ mdio; 46724ba675SRob Herring}; 47724ba675SRob Herring 48724ba675SRob Herring&iomuxc { 49724ba675SRob Herring pinctrl_enet1_mdc: enet1mdcgrp { 50724ba675SRob Herring fsl,pins = < 51724ba675SRob Herring /* mdio */ 52724ba675SRob Herring MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0 53724ba675SRob Herring MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0 54724ba675SRob Herring >; 55724ba675SRob Herring }; 56724ba675SRob Herring}; 57