1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 OR MIT 2*724ba675SRob Herring// 3*724ba675SRob Herring// Copyright 2019 Armadeus Systems <support@armadeus.com> 4*724ba675SRob Herring 5*724ba675SRob Herring/ { 6*724ba675SRob Herring memory@80000000 { 7*724ba675SRob Herring device_type = "memory"; 8*724ba675SRob Herring reg = <0x80000000 0>; /* will be filled by U-Boot */ 9*724ba675SRob Herring }; 10*724ba675SRob Herring 11*724ba675SRob Herring reg_3v3: regulator-3v3 { 12*724ba675SRob Herring compatible = "regulator-fixed"; 13*724ba675SRob Herring regulator-name = "3V3"; 14*724ba675SRob Herring regulator-min-microvolt = <3300000>; 15*724ba675SRob Herring regulator-max-microvolt = <3300000>; 16*724ba675SRob Herring }; 17*724ba675SRob Herring 18*724ba675SRob Herring usdhc3_pwrseq: usdhc3-pwrseq { 19*724ba675SRob Herring compatible = "mmc-pwrseq-simple"; 20*724ba675SRob Herring reset-gpios = <&gpio2 9 GPIO_ACTIVE_LOW>; 21*724ba675SRob Herring }; 22*724ba675SRob Herring}; 23*724ba675SRob Herring 24*724ba675SRob Herring&fec1 { 25*724ba675SRob Herring pinctrl-names = "default"; 26*724ba675SRob Herring pinctrl-0 = <&pinctrl_enet1>; 27*724ba675SRob Herring phy-mode = "rmii"; 28*724ba675SRob Herring phy-reset-duration = <1>; 29*724ba675SRob Herring phy-reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; 30*724ba675SRob Herring phy-handle = <ðphy1>; 31*724ba675SRob Herring phy-supply = <®_3v3>; 32*724ba675SRob Herring status = "okay"; 33*724ba675SRob Herring 34*724ba675SRob Herring mdio: mdio { 35*724ba675SRob Herring #address-cells = <1>; 36*724ba675SRob Herring #size-cells = <0>; 37*724ba675SRob Herring 38*724ba675SRob Herring ethphy1: ethernet-phy@1 { 39*724ba675SRob Herring compatible = "ethernet-phy-ieee802.3-c22"; 40*724ba675SRob Herring reg = <1>; 41*724ba675SRob Herring interrupt-parent = <&gpio4>; 42*724ba675SRob Herring interrupts = <16 IRQ_TYPE_LEVEL_LOW>; 43*724ba675SRob Herring status = "okay"; 44*724ba675SRob Herring }; 45*724ba675SRob Herring }; 46*724ba675SRob Herring}; 47*724ba675SRob Herring 48*724ba675SRob Herring/* Bluetooth */ 49*724ba675SRob Herring&uart8 { 50*724ba675SRob Herring pinctrl-names = "default"; 51*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart8>; 52*724ba675SRob Herring uart-has-rtscts; 53*724ba675SRob Herring status = "okay"; 54*724ba675SRob Herring}; 55*724ba675SRob Herring 56*724ba675SRob Herring/* eMMC */ 57*724ba675SRob Herring&usdhc1 { 58*724ba675SRob Herring pinctrl-names = "default"; 59*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc1>; 60*724ba675SRob Herring bus-width = <8>; 61*724ba675SRob Herring no-1-8-v; 62*724ba675SRob Herring non-removable; 63*724ba675SRob Herring status = "okay"; 64*724ba675SRob Herring}; 65*724ba675SRob Herring 66*724ba675SRob Herring/* WiFi */ 67*724ba675SRob Herring&usdhc2 { 68*724ba675SRob Herring pinctrl-names = "default"; 69*724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc2>; 70*724ba675SRob Herring bus-width = <4>; 71*724ba675SRob Herring no-1-8-v; 72*724ba675SRob Herring non-removable; 73*724ba675SRob Herring mmc-pwrseq = <&usdhc3_pwrseq>; 74*724ba675SRob Herring status = "okay"; 75*724ba675SRob Herring 76*724ba675SRob Herring #address-cells = <1>; 77*724ba675SRob Herring #size-cells = <0>; 78*724ba675SRob Herring 79*724ba675SRob Herring brcmf: wifi@1 { 80*724ba675SRob Herring compatible = "brcm,bcm4329-fmac"; 81*724ba675SRob Herring reg = <1>; 82*724ba675SRob Herring interrupt-parent = <&gpio2>; 83*724ba675SRob Herring interrupts = <8 IRQ_TYPE_LEVEL_LOW>; 84*724ba675SRob Herring interrupt-names = "host-wake"; 85*724ba675SRob Herring }; 86*724ba675SRob Herring}; 87*724ba675SRob Herring 88*724ba675SRob Herring&iomuxc { 89*724ba675SRob Herring pinctrl_enet1: enet1grp { 90*724ba675SRob Herring fsl,pins = < 91*724ba675SRob Herring MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0 92*724ba675SRob Herring MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0 93*724ba675SRob Herring MX6UL_PAD_ENET1_RX_ER__ENET1_RX_ER 0x130b0 94*724ba675SRob Herring MX6UL_PAD_ENET1_RX_EN__ENET1_RX_EN 0x130b0 95*724ba675SRob Herring MX6UL_PAD_ENET1_RX_DATA1__ENET1_RDATA01 0x130b0 96*724ba675SRob Herring MX6UL_PAD_ENET1_RX_DATA0__ENET1_RDATA00 0x130b0 97*724ba675SRob Herring MX6UL_PAD_ENET1_TX_DATA0__ENET1_TDATA00 0x1b0b0 98*724ba675SRob Herring MX6UL_PAD_ENET1_TX_DATA1__ENET1_TDATA01 0x1b0b0 99*724ba675SRob Herring MX6UL_PAD_ENET1_TX_EN__ENET1_TX_EN 0x1b0b0 100*724ba675SRob Herring /* INT# */ 101*724ba675SRob Herring MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x1b0b0 102*724ba675SRob Herring /* RST# */ 103*724ba675SRob Herring MX6UL_PAD_NAND_DATA00__GPIO4_IO02 0x130b0 104*724ba675SRob Herring MX6UL_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 0x4001b031 105*724ba675SRob Herring >; 106*724ba675SRob Herring }; 107*724ba675SRob Herring 108*724ba675SRob Herring pinctrl_uart8: uart8grp { 109*724ba675SRob Herring fsl,pins = < 110*724ba675SRob Herring MX6UL_PAD_ENET2_TX_EN__UART8_DCE_RX 0x1b0b0 111*724ba675SRob Herring MX6UL_PAD_ENET2_TX_DATA1__UART8_DCE_TX 0x1b0b0 112*724ba675SRob Herring MX6UL_PAD_ENET2_RX_ER__UART8_DCE_RTS 0x1b0b0 113*724ba675SRob Herring MX6UL_PAD_ENET2_TX_CLK__UART8_DCE_CTS 0x1b0b0 114*724ba675SRob Herring /* BT_REG_ON */ 115*724ba675SRob Herring MX6UL_PAD_ENET2_RX_EN__GPIO2_IO10 0x130b0 116*724ba675SRob Herring >; 117*724ba675SRob Herring }; 118*724ba675SRob Herring 119*724ba675SRob Herring pinctrl_usdhc1: usdhc1grp { 120*724ba675SRob Herring fsl,pins = < 121*724ba675SRob Herring MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 122*724ba675SRob Herring MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 123*724ba675SRob Herring MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 124*724ba675SRob Herring MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 125*724ba675SRob Herring MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 126*724ba675SRob Herring MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 127*724ba675SRob Herring MX6UL_PAD_NAND_READY_B__USDHC1_DATA4 0x17059 128*724ba675SRob Herring MX6UL_PAD_NAND_CE0_B__USDHC1_DATA5 0x17059 129*724ba675SRob Herring MX6UL_PAD_NAND_CE1_B__USDHC1_DATA6 0x17059 130*724ba675SRob Herring MX6UL_PAD_NAND_CLE__USDHC1_DATA7 0x17059 131*724ba675SRob Herring >; 132*724ba675SRob Herring }; 133*724ba675SRob Herring 134*724ba675SRob Herring pinctrl_usdhc2: usdhc2grp { 135*724ba675SRob Herring fsl,pins = < 136*724ba675SRob Herring MX6UL_PAD_LCD_DATA18__USDHC2_CMD 0x1b0b0 137*724ba675SRob Herring MX6UL_PAD_LCD_DATA19__USDHC2_CLK 0x100b0 138*724ba675SRob Herring MX6UL_PAD_LCD_DATA20__USDHC2_DATA0 0x1b0b0 139*724ba675SRob Herring MX6UL_PAD_LCD_DATA21__USDHC2_DATA1 0x1b0b0 140*724ba675SRob Herring MX6UL_PAD_LCD_DATA22__USDHC2_DATA2 0x1b0b0 141*724ba675SRob Herring MX6UL_PAD_LCD_DATA23__USDHC2_DATA3 0x1b0b0 142*724ba675SRob Herring /* WL_REG_ON */ 143*724ba675SRob Herring MX6UL_PAD_ENET2_RX_DATA1__GPIO2_IO09 0x130b0 144*724ba675SRob Herring /* WL_IRQ */ 145*724ba675SRob Herring MX6UL_PAD_ENET2_RX_DATA0__GPIO2_IO08 0x1b0b0 146*724ba675SRob Herring >; 147*724ba675SRob Herring }; 148*724ba675SRob Herring}; 149