1*dac1c504SMichael Walle// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*dac1c504SMichael Walle/* 3*dac1c504SMichael Walle * Device Tree include for the Kontron SMARC-sAMX6i board on a SMARC Eval 4*dac1c504SMichael Walle * 2.0 carrier (ADS2). 5*dac1c504SMichael Walle * 6*dac1c504SMichael Walle */ 7*dac1c504SMichael Walle 8*dac1c504SMichael Walle/ { 9*dac1c504SMichael Walle chosen { 10*dac1c504SMichael Walle stdout-path = "serial0:115200n8"; 11*dac1c504SMichael Walle }; 12*dac1c504SMichael Walle 13*dac1c504SMichael Walle sound { 14*dac1c504SMichael Walle #address-cells = <1>; 15*dac1c504SMichael Walle #size-cells = <0>; 16*dac1c504SMichael Walle compatible = "simple-audio-card"; 17*dac1c504SMichael Walle simple-audio-card,format = "i2s"; 18*dac1c504SMichael Walle simple-audio-card,bitclock-master = <&dailink_master>; 19*dac1c504SMichael Walle simple-audio-card,frame-master = <&dailink_master>; 20*dac1c504SMichael Walle simple-audio-card,widgets = 21*dac1c504SMichael Walle "Headphone", "Headphone Jack", 22*dac1c504SMichael Walle "Line", "Line Out Jack", 23*dac1c504SMichael Walle "Microphone", "Microphone Jack", 24*dac1c504SMichael Walle "Line", "Line In Jack"; 25*dac1c504SMichael Walle simple-audio-card,routing = 26*dac1c504SMichael Walle "Line Out Jack", "LINEOUTR", 27*dac1c504SMichael Walle "Line Out Jack", "LINEOUTL", 28*dac1c504SMichael Walle "Headphone Jack", "HPOUTR", 29*dac1c504SMichael Walle "Headphone Jack", "HPOUTL", 30*dac1c504SMichael Walle "IN1L", "Line In Jack", 31*dac1c504SMichael Walle "IN1R", "Line In Jack", 32*dac1c504SMichael Walle "Microphone Jack", "MICBIAS", 33*dac1c504SMichael Walle "IN2L", "Microphone Jack", 34*dac1c504SMichael Walle "IN2R", "Microphone Jack"; 35*dac1c504SMichael Walle 36*dac1c504SMichael Walle simple-audio-card,cpu { 37*dac1c504SMichael Walle sound-dai = <&ssi1>; 38*dac1c504SMichael Walle }; 39*dac1c504SMichael Walle 40*dac1c504SMichael Walle dailink_master: simple-audio-card,codec { 41*dac1c504SMichael Walle sound-dai = <&wm8904>; 42*dac1c504SMichael Walle }; 43*dac1c504SMichael Walle }; 44*dac1c504SMichael Walle 45*dac1c504SMichael Walle reg_codec_mic: regulator-codec-mic { 46*dac1c504SMichael Walle compatible = "regulator-fixed"; 47*dac1c504SMichael Walle regulator-name = "V_3V3_MIC"; 48*dac1c504SMichael Walle regulator-min-microvolt = <3300000>; 49*dac1c504SMichael Walle regulator-max-microvolt = <3300000>; 50*dac1c504SMichael Walle regulator-always-on; 51*dac1c504SMichael Walle regulator-boot-on; 52*dac1c504SMichael Walle }; 53*dac1c504SMichael Walle 54*dac1c504SMichael Walle reg_codec_1p8v: regulator-codec-1p8v { 55*dac1c504SMichael Walle compatible = "regulator-fixed"; 56*dac1c504SMichael Walle regulator-name = "V_1V8_S0_CODEC"; 57*dac1c504SMichael Walle regulator-min-microvolt = <1800000>; 58*dac1c504SMichael Walle regulator-max-microvolt = <1800000>; 59*dac1c504SMichael Walle regulator-always-on; 60*dac1c504SMichael Walle regulator-boot-on; 61*dac1c504SMichael Walle }; 62*dac1c504SMichael Walle}; 63*dac1c504SMichael Walle 64*dac1c504SMichael Walle&audmux { 65*dac1c504SMichael Walle status = "okay"; 66*dac1c504SMichael Walle}; 67*dac1c504SMichael Walle 68*dac1c504SMichael Walle&can1 { 69*dac1c504SMichael Walle status = "okay"; 70*dac1c504SMichael Walle}; 71*dac1c504SMichael Walle 72*dac1c504SMichael Walle&can2 { 73*dac1c504SMichael Walle status = "okay"; 74*dac1c504SMichael Walle}; 75*dac1c504SMichael Walle 76*dac1c504SMichael Walle&ecspi4 { 77*dac1c504SMichael Walle flash@1 { 78*dac1c504SMichael Walle compatible = "jedec,spi-nor"; 79*dac1c504SMichael Walle reg = <1>; 80*dac1c504SMichael Walle spi-max-frequency = <100000000>; 81*dac1c504SMichael Walle m25p,fast-read; 82*dac1c504SMichael Walle }; 83*dac1c504SMichael Walle}; 84*dac1c504SMichael Walle 85*dac1c504SMichael Walle&fec { 86*dac1c504SMichael Walle status = "okay"; 87*dac1c504SMichael Walle}; 88*dac1c504SMichael Walle 89*dac1c504SMichael Walle&i2c1 { 90*dac1c504SMichael Walle status = "okay"; 91*dac1c504SMichael Walle 92*dac1c504SMichael Walle wm8904: audio-codec@1a { 93*dac1c504SMichael Walle compatible = "wlf,wm8904"; 94*dac1c504SMichael Walle reg = <0x1a>; 95*dac1c504SMichael Walle #sound-dai-cells = <0>; 96*dac1c504SMichael Walle clocks = <&clks IMX6QDL_CLK_CKO2>; 97*dac1c504SMichael Walle clock-names = "mclk"; 98*dac1c504SMichael Walle AVDD-supply = <®_codec_1p8v>; 99*dac1c504SMichael Walle CPVDD-supply = <®_codec_1p8v>; 100*dac1c504SMichael Walle DBVDD-supply = <®_codec_1p8v>; 101*dac1c504SMichael Walle DCVDD-supply = <®_codec_1p8v>; 102*dac1c504SMichael Walle MICVDD-supply = <®_codec_mic>; 103*dac1c504SMichael Walle }; 104*dac1c504SMichael Walle}; 105*dac1c504SMichael Walle 106*dac1c504SMichael Walle&i2c3 { 107*dac1c504SMichael Walle eeprom@57 { 108*dac1c504SMichael Walle compatible = "atmel,24c64"; 109*dac1c504SMichael Walle reg = <0x57>; 110*dac1c504SMichael Walle pagesize = <32>; 111*dac1c504SMichael Walle }; 112*dac1c504SMichael Walle}; 113*dac1c504SMichael Walle 114*dac1c504SMichael Walle&pcie { 115*dac1c504SMichael Walle status = "okay"; 116*dac1c504SMichael Walle}; 117*dac1c504SMichael Walle 118*dac1c504SMichael Walle&ssi1 { 119*dac1c504SMichael Walle status = "okay"; 120*dac1c504SMichael Walle}; 121*dac1c504SMichael Walle 122*dac1c504SMichael Walle&uart1 { 123*dac1c504SMichael Walle status = "okay"; 124*dac1c504SMichael Walle}; 125*dac1c504SMichael Walle 126*dac1c504SMichael Walle&uart2 { 127*dac1c504SMichael Walle status = "okay"; 128*dac1c504SMichael Walle}; 129*dac1c504SMichael Walle 130*dac1c504SMichael Walle&uart4 { 131*dac1c504SMichael Walle status = "okay"; 132*dac1c504SMichael Walle}; 133*dac1c504SMichael Walle 134*dac1c504SMichael Walle&uart5 { 135*dac1c504SMichael Walle status = "okay"; 136*dac1c504SMichael Walle}; 137*dac1c504SMichael Walle 138*dac1c504SMichael Walle&usbh1 { 139*dac1c504SMichael Walle status = "okay"; 140*dac1c504SMichael Walle}; 141*dac1c504SMichael Walle 142*dac1c504SMichael Walle&usbotg { 143*dac1c504SMichael Walle status = "okay"; 144*dac1c504SMichael Walle}; 145*dac1c504SMichael Walle 146*dac1c504SMichael Walle&usdhc3 { 147*dac1c504SMichael Walle status = "okay"; 148*dac1c504SMichael Walle}; 149