1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright 2014 Gateworks Corporation 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 7*724ba675SRob Herring#include <dt-bindings/input/linux-event-codes.h> 8*724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h> 9*724ba675SRob Herring 10*724ba675SRob Herring/ { 11*724ba675SRob Herring /* these are used by bootloader for disabling nodes */ 12*724ba675SRob Herring aliases { 13*724ba675SRob Herring led0 = &led0; 14*724ba675SRob Herring led1 = &led1; 15*724ba675SRob Herring led2 = &led2; 16*724ba675SRob Herring nand = &gpmi; 17*724ba675SRob Herring usb0 = &usbh1; 18*724ba675SRob Herring usb1 = &usbotg; 19*724ba675SRob Herring }; 20*724ba675SRob Herring 21*724ba675SRob Herring chosen { 22*724ba675SRob Herring bootargs = "console=ttymxc1,115200"; 23*724ba675SRob Herring }; 24*724ba675SRob Herring 25*724ba675SRob Herring gpio-keys { 26*724ba675SRob Herring compatible = "gpio-keys"; 27*724ba675SRob Herring 28*724ba675SRob Herring user-pb { 29*724ba675SRob Herring label = "user_pb"; 30*724ba675SRob Herring gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>; 31*724ba675SRob Herring linux,code = <BTN_0>; 32*724ba675SRob Herring }; 33*724ba675SRob Herring 34*724ba675SRob Herring user-pb1x { 35*724ba675SRob Herring label = "user_pb1x"; 36*724ba675SRob Herring linux,code = <BTN_1>; 37*724ba675SRob Herring interrupt-parent = <&gsc>; 38*724ba675SRob Herring interrupts = <0>; 39*724ba675SRob Herring }; 40*724ba675SRob Herring 41*724ba675SRob Herring key-erased { 42*724ba675SRob Herring label = "key-erased"; 43*724ba675SRob Herring linux,code = <BTN_2>; 44*724ba675SRob Herring interrupt-parent = <&gsc>; 45*724ba675SRob Herring interrupts = <1>; 46*724ba675SRob Herring }; 47*724ba675SRob Herring 48*724ba675SRob Herring eeprom-wp { 49*724ba675SRob Herring label = "eeprom_wp"; 50*724ba675SRob Herring linux,code = <BTN_3>; 51*724ba675SRob Herring interrupt-parent = <&gsc>; 52*724ba675SRob Herring interrupts = <2>; 53*724ba675SRob Herring }; 54*724ba675SRob Herring 55*724ba675SRob Herring tamper { 56*724ba675SRob Herring label = "tamper"; 57*724ba675SRob Herring linux,code = <BTN_4>; 58*724ba675SRob Herring interrupt-parent = <&gsc>; 59*724ba675SRob Herring interrupts = <5>; 60*724ba675SRob Herring }; 61*724ba675SRob Herring 62*724ba675SRob Herring switch-hold { 63*724ba675SRob Herring label = "switch_hold"; 64*724ba675SRob Herring linux,code = <BTN_5>; 65*724ba675SRob Herring interrupt-parent = <&gsc>; 66*724ba675SRob Herring interrupts = <7>; 67*724ba675SRob Herring }; 68*724ba675SRob Herring }; 69*724ba675SRob Herring 70*724ba675SRob Herring leds { 71*724ba675SRob Herring compatible = "gpio-leds"; 72*724ba675SRob Herring pinctrl-names = "default"; 73*724ba675SRob Herring pinctrl-0 = <&pinctrl_gpio_leds>; 74*724ba675SRob Herring 75*724ba675SRob Herring led0: led-user1 { 76*724ba675SRob Herring label = "user1"; 77*724ba675SRob Herring gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ 78*724ba675SRob Herring default-state = "on"; 79*724ba675SRob Herring linux,default-trigger = "heartbeat"; 80*724ba675SRob Herring }; 81*724ba675SRob Herring 82*724ba675SRob Herring led1: led-user2 { 83*724ba675SRob Herring label = "user2"; 84*724ba675SRob Herring gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ 85*724ba675SRob Herring default-state = "off"; 86*724ba675SRob Herring }; 87*724ba675SRob Herring 88*724ba675SRob Herring led2: led-user3 { 89*724ba675SRob Herring label = "user3"; 90*724ba675SRob Herring gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ 91*724ba675SRob Herring default-state = "off"; 92*724ba675SRob Herring }; 93*724ba675SRob Herring }; 94*724ba675SRob Herring 95*724ba675SRob Herring memory@10000000 { 96*724ba675SRob Herring device_type = "memory"; 97*724ba675SRob Herring reg = <0x10000000 0x20000000>; 98*724ba675SRob Herring }; 99*724ba675SRob Herring 100*724ba675SRob Herring reg_1p0v: regulator-1p0v { 101*724ba675SRob Herring compatible = "regulator-fixed"; 102*724ba675SRob Herring regulator-name = "1P0V"; 103*724ba675SRob Herring regulator-min-microvolt = <1000000>; 104*724ba675SRob Herring regulator-max-microvolt = <1000000>; 105*724ba675SRob Herring regulator-always-on; 106*724ba675SRob Herring }; 107*724ba675SRob Herring 108*724ba675SRob Herring reg_3p3v: regulator-3p3v { 109*724ba675SRob Herring compatible = "regulator-fixed"; 110*724ba675SRob Herring regulator-name = "3P3V"; 111*724ba675SRob Herring regulator-min-microvolt = <3300000>; 112*724ba675SRob Herring regulator-max-microvolt = <3300000>; 113*724ba675SRob Herring regulator-always-on; 114*724ba675SRob Herring }; 115*724ba675SRob Herring 116*724ba675SRob Herring reg_5p0v: regulator-5p0v { 117*724ba675SRob Herring compatible = "regulator-fixed"; 118*724ba675SRob Herring regulator-name = "5P0V"; 119*724ba675SRob Herring regulator-min-microvolt = <5000000>; 120*724ba675SRob Herring regulator-max-microvolt = <5000000>; 121*724ba675SRob Herring regulator-always-on; 122*724ba675SRob Herring }; 123*724ba675SRob Herring}; 124*724ba675SRob Herring 125*724ba675SRob Herring&gpmi { 126*724ba675SRob Herring pinctrl-names = "default"; 127*724ba675SRob Herring pinctrl-0 = <&pinctrl_gpmi_nand>; 128*724ba675SRob Herring status = "okay"; 129*724ba675SRob Herring}; 130*724ba675SRob Herring 131*724ba675SRob Herring&hdmi { 132*724ba675SRob Herring ddc-i2c-bus = <&i2c3>; 133*724ba675SRob Herring status = "okay"; 134*724ba675SRob Herring}; 135*724ba675SRob Herring 136*724ba675SRob Herring&i2c1 { 137*724ba675SRob Herring clock-frequency = <100000>; 138*724ba675SRob Herring pinctrl-names = "default"; 139*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 140*724ba675SRob Herring status = "okay"; 141*724ba675SRob Herring 142*724ba675SRob Herring gsc: gsc@20 { 143*724ba675SRob Herring compatible = "gw,gsc"; 144*724ba675SRob Herring reg = <0x20>; 145*724ba675SRob Herring interrupt-parent = <&gpio1>; 146*724ba675SRob Herring interrupts = <4 IRQ_TYPE_LEVEL_LOW>; 147*724ba675SRob Herring interrupt-controller; 148*724ba675SRob Herring #interrupt-cells = <1>; 149*724ba675SRob Herring #size-cells = <0>; 150*724ba675SRob Herring 151*724ba675SRob Herring adc { 152*724ba675SRob Herring compatible = "gw,gsc-adc"; 153*724ba675SRob Herring #address-cells = <1>; 154*724ba675SRob Herring #size-cells = <0>; 155*724ba675SRob Herring 156*724ba675SRob Herring channel@0 { 157*724ba675SRob Herring gw,mode = <0>; 158*724ba675SRob Herring reg = <0x00>; 159*724ba675SRob Herring label = "temp"; 160*724ba675SRob Herring }; 161*724ba675SRob Herring 162*724ba675SRob Herring channel@2 { 163*724ba675SRob Herring gw,mode = <1>; 164*724ba675SRob Herring reg = <0x02>; 165*724ba675SRob Herring label = "vdd_vin"; 166*724ba675SRob Herring }; 167*724ba675SRob Herring 168*724ba675SRob Herring channel@5 { 169*724ba675SRob Herring gw,mode = <1>; 170*724ba675SRob Herring reg = <0x05>; 171*724ba675SRob Herring label = "vdd_3p3"; 172*724ba675SRob Herring }; 173*724ba675SRob Herring 174*724ba675SRob Herring channel@8 { 175*724ba675SRob Herring gw,mode = <1>; 176*724ba675SRob Herring reg = <0x08>; 177*724ba675SRob Herring label = "vdd_bat"; 178*724ba675SRob Herring }; 179*724ba675SRob Herring 180*724ba675SRob Herring channel@b { 181*724ba675SRob Herring gw,mode = <1>; 182*724ba675SRob Herring reg = <0x0b>; 183*724ba675SRob Herring label = "vdd_5p0"; 184*724ba675SRob Herring }; 185*724ba675SRob Herring 186*724ba675SRob Herring channel@e { 187*724ba675SRob Herring gw,mode = <1>; 188*724ba675SRob Herring reg = <0xe>; 189*724ba675SRob Herring label = "vdd_arm"; 190*724ba675SRob Herring }; 191*724ba675SRob Herring 192*724ba675SRob Herring channel@11 { 193*724ba675SRob Herring gw,mode = <1>; 194*724ba675SRob Herring reg = <0x11>; 195*724ba675SRob Herring label = "vdd_soc"; 196*724ba675SRob Herring }; 197*724ba675SRob Herring 198*724ba675SRob Herring channel@14 { 199*724ba675SRob Herring gw,mode = <1>; 200*724ba675SRob Herring reg = <0x14>; 201*724ba675SRob Herring label = "vdd_3p0"; 202*724ba675SRob Herring }; 203*724ba675SRob Herring 204*724ba675SRob Herring channel@17 { 205*724ba675SRob Herring gw,mode = <1>; 206*724ba675SRob Herring reg = <0x17>; 207*724ba675SRob Herring label = "vdd_1p5"; 208*724ba675SRob Herring }; 209*724ba675SRob Herring 210*724ba675SRob Herring channel@1d { 211*724ba675SRob Herring gw,mode = <1>; 212*724ba675SRob Herring reg = <0x1d>; 213*724ba675SRob Herring label = "vdd_1p8"; 214*724ba675SRob Herring }; 215*724ba675SRob Herring 216*724ba675SRob Herring channel@20 { 217*724ba675SRob Herring gw,mode = <1>; 218*724ba675SRob Herring reg = <0x20>; 219*724ba675SRob Herring label = "vdd_1p0"; 220*724ba675SRob Herring }; 221*724ba675SRob Herring 222*724ba675SRob Herring channel@23 { 223*724ba675SRob Herring gw,mode = <1>; 224*724ba675SRob Herring reg = <0x23>; 225*724ba675SRob Herring label = "vdd_2p5"; 226*724ba675SRob Herring }; 227*724ba675SRob Herring }; 228*724ba675SRob Herring }; 229*724ba675SRob Herring 230*724ba675SRob Herring gsc_gpio: gpio@23 { 231*724ba675SRob Herring compatible = "nxp,pca9555"; 232*724ba675SRob Herring reg = <0x23>; 233*724ba675SRob Herring gpio-controller; 234*724ba675SRob Herring #gpio-cells = <2>; 235*724ba675SRob Herring interrupt-parent = <&gsc>; 236*724ba675SRob Herring interrupts = <4>; 237*724ba675SRob Herring }; 238*724ba675SRob Herring 239*724ba675SRob Herring eeprom1: eeprom@50 { 240*724ba675SRob Herring compatible = "atmel,24c02"; 241*724ba675SRob Herring reg = <0x50>; 242*724ba675SRob Herring pagesize = <16>; 243*724ba675SRob Herring }; 244*724ba675SRob Herring 245*724ba675SRob Herring eeprom2: eeprom@51 { 246*724ba675SRob Herring compatible = "atmel,24c02"; 247*724ba675SRob Herring reg = <0x51>; 248*724ba675SRob Herring pagesize = <16>; 249*724ba675SRob Herring }; 250*724ba675SRob Herring 251*724ba675SRob Herring eeprom3: eeprom@52 { 252*724ba675SRob Herring compatible = "atmel,24c02"; 253*724ba675SRob Herring reg = <0x52>; 254*724ba675SRob Herring pagesize = <16>; 255*724ba675SRob Herring }; 256*724ba675SRob Herring 257*724ba675SRob Herring eeprom4: eeprom@53 { 258*724ba675SRob Herring compatible = "atmel,24c02"; 259*724ba675SRob Herring reg = <0x53>; 260*724ba675SRob Herring pagesize = <16>; 261*724ba675SRob Herring }; 262*724ba675SRob Herring 263*724ba675SRob Herring rtc: ds1672@68 { 264*724ba675SRob Herring compatible = "dallas,ds1672"; 265*724ba675SRob Herring reg = <0x68>; 266*724ba675SRob Herring }; 267*724ba675SRob Herring}; 268*724ba675SRob Herring 269*724ba675SRob Herring&i2c2 { 270*724ba675SRob Herring clock-frequency = <100000>; 271*724ba675SRob Herring pinctrl-names = "default"; 272*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 273*724ba675SRob Herring status = "okay"; 274*724ba675SRob Herring 275*724ba675SRob Herring ltc3676: pmic@3c { 276*724ba675SRob Herring compatible = "lltc,ltc3676"; 277*724ba675SRob Herring reg = <0x3c>; 278*724ba675SRob Herring pinctrl-names = "default"; 279*724ba675SRob Herring pinctrl-0 = <&pinctrl_pmic>; 280*724ba675SRob Herring interrupt-parent = <&gpio1>; 281*724ba675SRob Herring interrupts = <8 IRQ_TYPE_EDGE_FALLING>; 282*724ba675SRob Herring 283*724ba675SRob Herring regulators { 284*724ba675SRob Herring /* VDD_SOC (1+R1/R2 = 1.635) */ 285*724ba675SRob Herring reg_vdd_soc: sw1 { 286*724ba675SRob Herring regulator-name = "vddsoc"; 287*724ba675SRob Herring regulator-min-microvolt = <674400>; 288*724ba675SRob Herring regulator-max-microvolt = <1308000>; 289*724ba675SRob Herring lltc,fb-voltage-divider = <127000 200000>; 290*724ba675SRob Herring regulator-ramp-delay = <7000>; 291*724ba675SRob Herring regulator-boot-on; 292*724ba675SRob Herring regulator-always-on; 293*724ba675SRob Herring }; 294*724ba675SRob Herring 295*724ba675SRob Herring /* VDD_1P8 (1+R1/R2 = 2.505): ENET-PHY */ 296*724ba675SRob Herring reg_1p8v: sw2 { 297*724ba675SRob Herring regulator-name = "vdd1p8"; 298*724ba675SRob Herring regulator-min-microvolt = <1033310>; 299*724ba675SRob Herring regulator-max-microvolt = <2004000>; 300*724ba675SRob Herring lltc,fb-voltage-divider = <301000 200000>; 301*724ba675SRob Herring regulator-ramp-delay = <7000>; 302*724ba675SRob Herring regulator-boot-on; 303*724ba675SRob Herring regulator-always-on; 304*724ba675SRob Herring }; 305*724ba675SRob Herring 306*724ba675SRob Herring /* VDD_ARM (1+R1/R2 = 1.635) */ 307*724ba675SRob Herring reg_vdd_arm: sw3 { 308*724ba675SRob Herring regulator-name = "vddarm"; 309*724ba675SRob Herring regulator-min-microvolt = <674400>; 310*724ba675SRob Herring regulator-max-microvolt = <1308000>; 311*724ba675SRob Herring lltc,fb-voltage-divider = <127000 200000>; 312*724ba675SRob Herring regulator-ramp-delay = <7000>; 313*724ba675SRob Herring regulator-boot-on; 314*724ba675SRob Herring regulator-always-on; 315*724ba675SRob Herring }; 316*724ba675SRob Herring 317*724ba675SRob Herring /* VDD_DDR (1+R1/R2 = 2.105) */ 318*724ba675SRob Herring reg_vdd_ddr: sw4 { 319*724ba675SRob Herring regulator-name = "vddddr"; 320*724ba675SRob Herring regulator-min-microvolt = <868310>; 321*724ba675SRob Herring regulator-max-microvolt = <1684000>; 322*724ba675SRob Herring lltc,fb-voltage-divider = <221000 200000>; 323*724ba675SRob Herring regulator-ramp-delay = <7000>; 324*724ba675SRob Herring regulator-boot-on; 325*724ba675SRob Herring regulator-always-on; 326*724ba675SRob Herring }; 327*724ba675SRob Herring 328*724ba675SRob Herring /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */ 329*724ba675SRob Herring reg_2p5v: ldo2 { 330*724ba675SRob Herring regulator-name = "vdd2p5"; 331*724ba675SRob Herring regulator-min-microvolt = <2490375>; 332*724ba675SRob Herring regulator-max-microvolt = <2490375>; 333*724ba675SRob Herring lltc,fb-voltage-divider = <487000 200000>; 334*724ba675SRob Herring regulator-boot-on; 335*724ba675SRob Herring regulator-always-on; 336*724ba675SRob Herring }; 337*724ba675SRob Herring 338*724ba675SRob Herring /* VDD_HIGH (1+R1/R2 = 4.17) */ 339*724ba675SRob Herring reg_3p0v: ldo4 { 340*724ba675SRob Herring regulator-name = "vdd3p0"; 341*724ba675SRob Herring regulator-min-microvolt = <3023250>; 342*724ba675SRob Herring regulator-max-microvolt = <3023250>; 343*724ba675SRob Herring lltc,fb-voltage-divider = <634000 200000>; 344*724ba675SRob Herring regulator-boot-on; 345*724ba675SRob Herring regulator-always-on; 346*724ba675SRob Herring }; 347*724ba675SRob Herring }; 348*724ba675SRob Herring }; 349*724ba675SRob Herring}; 350*724ba675SRob Herring 351*724ba675SRob Herring&i2c3 { 352*724ba675SRob Herring clock-frequency = <100000>; 353*724ba675SRob Herring pinctrl-names = "default"; 354*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c3>; 355*724ba675SRob Herring status = "okay"; 356*724ba675SRob Herring}; 357*724ba675SRob Herring 358*724ba675SRob Herring&pcie { 359*724ba675SRob Herring pinctrl-names = "default"; 360*724ba675SRob Herring pinctrl-0 = <&pinctrl_pcie>; 361*724ba675SRob Herring reset-gpio = <&gpio1 29 GPIO_ACTIVE_LOW>; 362*724ba675SRob Herring status = "okay"; 363*724ba675SRob Herring}; 364*724ba675SRob Herring 365*724ba675SRob Herring&pwm2 { 366*724ba675SRob Herring pinctrl-names = "default"; 367*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ 368*724ba675SRob Herring status = "disabled"; 369*724ba675SRob Herring}; 370*724ba675SRob Herring 371*724ba675SRob Herring&pwm3 { 372*724ba675SRob Herring pinctrl-names = "default"; 373*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ 374*724ba675SRob Herring status = "disabled"; 375*724ba675SRob Herring}; 376*724ba675SRob Herring 377*724ba675SRob Herring&uart2 { 378*724ba675SRob Herring pinctrl-names = "default"; 379*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart2>; 380*724ba675SRob Herring status = "okay"; 381*724ba675SRob Herring}; 382*724ba675SRob Herring 383*724ba675SRob Herring&uart3 { 384*724ba675SRob Herring pinctrl-names = "default"; 385*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart3>; 386*724ba675SRob Herring status = "okay"; 387*724ba675SRob Herring}; 388*724ba675SRob Herring 389*724ba675SRob Herring&uart5 { 390*724ba675SRob Herring pinctrl-names = "default"; 391*724ba675SRob Herring pinctrl-0 = <&pinctrl_uart5>; 392*724ba675SRob Herring status = "okay"; }; 393*724ba675SRob Herring 394*724ba675SRob Herring&usbh1 { 395*724ba675SRob Herring status = "okay"; 396*724ba675SRob Herring}; 397*724ba675SRob Herring 398*724ba675SRob Herring&usbotg { 399*724ba675SRob Herring vbus-supply = <®_5p0v>; 400*724ba675SRob Herring pinctrl-names = "default"; 401*724ba675SRob Herring pinctrl-0 = <&pinctrl_usbotg>; 402*724ba675SRob Herring disable-over-current; 403*724ba675SRob Herring status = "okay"; 404*724ba675SRob Herring}; 405*724ba675SRob Herring 406*724ba675SRob Herring&wdog1 { 407*724ba675SRob Herring pinctrl-names = "default"; 408*724ba675SRob Herring pinctrl-0 = <&pinctrl_wdog>; 409*724ba675SRob Herring fsl,ext-reset-output; 410*724ba675SRob Herring}; 411*724ba675SRob Herring 412*724ba675SRob Herring&iomuxc { 413*724ba675SRob Herring pinctrl_gpio_leds: gpioledsgrp { 414*724ba675SRob Herring fsl,pins = < 415*724ba675SRob Herring MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 416*724ba675SRob Herring MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 417*724ba675SRob Herring MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 418*724ba675SRob Herring >; 419*724ba675SRob Herring }; 420*724ba675SRob Herring 421*724ba675SRob Herring pinctrl_gpmi_nand: gpminandgrp { 422*724ba675SRob Herring fsl,pins = < 423*724ba675SRob Herring MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 424*724ba675SRob Herring MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 425*724ba675SRob Herring MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 426*724ba675SRob Herring MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 427*724ba675SRob Herring MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 428*724ba675SRob Herring MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 429*724ba675SRob Herring MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 430*724ba675SRob Herring MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 431*724ba675SRob Herring MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 432*724ba675SRob Herring MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 433*724ba675SRob Herring MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 434*724ba675SRob Herring MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 435*724ba675SRob Herring MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 436*724ba675SRob Herring MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 437*724ba675SRob Herring MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 438*724ba675SRob Herring >; 439*724ba675SRob Herring }; 440*724ba675SRob Herring 441*724ba675SRob Herring pinctrl_i2c1: i2c1grp { 442*724ba675SRob Herring fsl,pins = < 443*724ba675SRob Herring MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 444*724ba675SRob Herring MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 445*724ba675SRob Herring MX6QDL_PAD_GPIO_4__GPIO1_IO04 0xb0b1 446*724ba675SRob Herring >; 447*724ba675SRob Herring }; 448*724ba675SRob Herring 449*724ba675SRob Herring pinctrl_i2c2: i2c2grp { 450*724ba675SRob Herring fsl,pins = < 451*724ba675SRob Herring MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 452*724ba675SRob Herring MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 453*724ba675SRob Herring >; 454*724ba675SRob Herring }; 455*724ba675SRob Herring 456*724ba675SRob Herring pinctrl_i2c3: i2c3grp { 457*724ba675SRob Herring fsl,pins = < 458*724ba675SRob Herring MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 459*724ba675SRob Herring MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 460*724ba675SRob Herring >; 461*724ba675SRob Herring }; 462*724ba675SRob Herring 463*724ba675SRob Herring pinctrl_pcie: pciegrp { 464*724ba675SRob Herring fsl,pins = < 465*724ba675SRob Herring MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x1b0b0 466*724ba675SRob Herring >; 467*724ba675SRob Herring }; 468*724ba675SRob Herring 469*724ba675SRob Herring pinctrl_pmic: pmicgrp { 470*724ba675SRob Herring fsl,pins = < 471*724ba675SRob Herring MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x0001b0b0 /* PMIC_IRQ# */ 472*724ba675SRob Herring >; 473*724ba675SRob Herring }; 474*724ba675SRob Herring 475*724ba675SRob Herring pinctrl_pwm2: pwm2grp { 476*724ba675SRob Herring fsl,pins = < 477*724ba675SRob Herring MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 478*724ba675SRob Herring >; 479*724ba675SRob Herring }; 480*724ba675SRob Herring 481*724ba675SRob Herring pinctrl_pwm3: pwm3grp { 482*724ba675SRob Herring fsl,pins = < 483*724ba675SRob Herring MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 484*724ba675SRob Herring >; 485*724ba675SRob Herring }; 486*724ba675SRob Herring 487*724ba675SRob Herring pinctrl_uart2: uart2grp { 488*724ba675SRob Herring fsl,pins = < 489*724ba675SRob Herring MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 490*724ba675SRob Herring MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 491*724ba675SRob Herring >; 492*724ba675SRob Herring }; 493*724ba675SRob Herring 494*724ba675SRob Herring pinctrl_uart3: uart3grp { 495*724ba675SRob Herring fsl,pins = < 496*724ba675SRob Herring MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 497*724ba675SRob Herring MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 498*724ba675SRob Herring >; 499*724ba675SRob Herring }; 500*724ba675SRob Herring 501*724ba675SRob Herring pinctrl_uart5: uart5grp { 502*724ba675SRob Herring fsl,pins = < 503*724ba675SRob Herring MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 504*724ba675SRob Herring MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 505*724ba675SRob Herring >; 506*724ba675SRob Herring }; 507*724ba675SRob Herring 508*724ba675SRob Herring pinctrl_usbotg: usbotggrp { 509*724ba675SRob Herring fsl,pins = < 510*724ba675SRob Herring MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x13059 511*724ba675SRob Herring >; 512*724ba675SRob Herring }; 513*724ba675SRob Herring 514*724ba675SRob Herring pinctrl_wdog: wdoggrp { 515*724ba675SRob Herring fsl,pins = < 516*724ba675SRob Herring MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 517*724ba675SRob Herring >; 518*724ba675SRob Herring }; 519*724ba675SRob Herring}; 520