xref: /linux/scripts/dtc/include-prefixes/arm/nxp/imx/imx6qdl-gw551x.dtsi (revision 115e74a29b530d121891238e9551c4bcdf7b04b5)
1*b23de67dSBence Csókás// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
2724ba675SRob Herring/*
3724ba675SRob Herring * Copyright 2014 Gateworks Corporation
4724ba675SRob Herring */
5724ba675SRob Herring
6724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
7724ba675SRob Herring#include <dt-bindings/media/tda1997x.h>
8724ba675SRob Herring#include <dt-bindings/input/linux-event-codes.h>
9724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h>
10724ba675SRob Herring#include <dt-bindings/sound/fsl-imx-audmux.h>
11724ba675SRob Herring
12724ba675SRob Herring/ {
13724ba675SRob Herring	/* these are used by bootloader for disabling nodes */
14724ba675SRob Herring	aliases {
15724ba675SRob Herring		led0 = &led0;
16724ba675SRob Herring		nand = &gpmi;
17724ba675SRob Herring		ssi0 = &ssi1;
18724ba675SRob Herring		usb0 = &usbh1;
19724ba675SRob Herring		usb1 = &usbotg;
20724ba675SRob Herring	};
21724ba675SRob Herring
22724ba675SRob Herring	chosen {
23724ba675SRob Herring		bootargs = "console=ttymxc1,115200";
24724ba675SRob Herring	};
25724ba675SRob Herring
26724ba675SRob Herring	gpio-keys {
27724ba675SRob Herring		compatible = "gpio-keys";
28724ba675SRob Herring
29724ba675SRob Herring		user-pb {
30724ba675SRob Herring			label = "user_pb";
31724ba675SRob Herring			gpios = <&gsc_gpio 0 GPIO_ACTIVE_LOW>;
32724ba675SRob Herring			linux,code = <BTN_0>;
33724ba675SRob Herring		};
34724ba675SRob Herring
35724ba675SRob Herring		user-pb1x {
36724ba675SRob Herring			label = "user_pb1x";
37724ba675SRob Herring			linux,code = <BTN_1>;
38724ba675SRob Herring			interrupt-parent = <&gsc>;
39724ba675SRob Herring			interrupts = <0>;
40724ba675SRob Herring		};
41724ba675SRob Herring
42724ba675SRob Herring		key-erased {
43724ba675SRob Herring			label = "key-erased";
44724ba675SRob Herring			linux,code = <BTN_2>;
45724ba675SRob Herring			interrupt-parent = <&gsc>;
46724ba675SRob Herring			interrupts = <1>;
47724ba675SRob Herring		};
48724ba675SRob Herring
49724ba675SRob Herring		eeprom-wp {
50724ba675SRob Herring			label = "eeprom_wp";
51724ba675SRob Herring			linux,code = <BTN_3>;
52724ba675SRob Herring			interrupt-parent = <&gsc>;
53724ba675SRob Herring			interrupts = <2>;
54724ba675SRob Herring		};
55724ba675SRob Herring
56724ba675SRob Herring		tamper {
57724ba675SRob Herring			label = "tamper";
58724ba675SRob Herring			linux,code = <BTN_4>;
59724ba675SRob Herring			interrupt-parent = <&gsc>;
60724ba675SRob Herring			interrupts = <5>;
61724ba675SRob Herring		};
62724ba675SRob Herring
63724ba675SRob Herring		switch-hold {
64724ba675SRob Herring			label = "switch_hold";
65724ba675SRob Herring			linux,code = <BTN_5>;
66724ba675SRob Herring			interrupt-parent = <&gsc>;
67724ba675SRob Herring			interrupts = <7>;
68724ba675SRob Herring		};
69724ba675SRob Herring	};
70724ba675SRob Herring
71724ba675SRob Herring	leds {
72724ba675SRob Herring		compatible = "gpio-leds";
73724ba675SRob Herring		pinctrl-names = "default";
74724ba675SRob Herring		pinctrl-0 = <&pinctrl_gpio_leds>;
75724ba675SRob Herring
76724ba675SRob Herring		led0: led-user1 {
77724ba675SRob Herring			label = "user1";
78724ba675SRob Herring			gpios = <&gpio4 7 GPIO_ACTIVE_LOW>;
79724ba675SRob Herring			default-state = "on";
80724ba675SRob Herring			linux,default-trigger = "heartbeat";
81724ba675SRob Herring		};
82724ba675SRob Herring	};
83724ba675SRob Herring
84724ba675SRob Herring	memory@10000000 {
85724ba675SRob Herring		device_type = "memory";
86724ba675SRob Herring		reg = <0x10000000 0x20000000>;
87724ba675SRob Herring	};
88724ba675SRob Herring
89724ba675SRob Herring	reg_5p0v: regulator-5p0v {
90724ba675SRob Herring		compatible = "regulator-fixed";
91724ba675SRob Herring		regulator-name = "5P0V";
92724ba675SRob Herring		regulator-min-microvolt = <5000000>;
93724ba675SRob Herring		regulator-max-microvolt = <5000000>;
94724ba675SRob Herring	};
95724ba675SRob Herring
96724ba675SRob Herring	reg_usb_h1_vbus: regulator-usb-h1-vbus {
97724ba675SRob Herring		compatible = "regulator-fixed";
98724ba675SRob Herring		regulator-name = "usb_h1_vbus";
99724ba675SRob Herring		regulator-min-microvolt = <5000000>;
100724ba675SRob Herring		regulator-max-microvolt = <5000000>;
101724ba675SRob Herring	};
102724ba675SRob Herring
103724ba675SRob Herring	reg_usb_otg_vbus: regulator-usb-otg-vbus {
104724ba675SRob Herring		compatible = "regulator-fixed";
105724ba675SRob Herring		regulator-name = "usb_otg_vbus";
106724ba675SRob Herring		regulator-min-microvolt = <5000000>;
107724ba675SRob Herring		regulator-max-microvolt = <5000000>;
108724ba675SRob Herring	};
109724ba675SRob Herring
110724ba675SRob Herring	sound-digital {
111724ba675SRob Herring		compatible = "simple-audio-card";
112724ba675SRob Herring		simple-audio-card,name = "tda1997x-audio";
113724ba675SRob Herring		simple-audio-card,format = "i2s";
114724ba675SRob Herring		simple-audio-card,bitclock-master = <&sound_codec>;
115724ba675SRob Herring		simple-audio-card,frame-master = <&sound_codec>;
116724ba675SRob Herring
117724ba675SRob Herring		sound_cpu: simple-audio-card,cpu {
118724ba675SRob Herring			sound-dai = <&ssi1>;
119724ba675SRob Herring		};
120724ba675SRob Herring
121724ba675SRob Herring		sound_codec: simple-audio-card,codec {
122724ba675SRob Herring			sound-dai = <&hdmi_receiver>;
123724ba675SRob Herring		};
124724ba675SRob Herring	};
125724ba675SRob Herring};
126724ba675SRob Herring
127724ba675SRob Herring&audmux {
128724ba675SRob Herring	pinctrl-names = "default";
129724ba675SRob Herring	pinctrl-0 = <&pinctrl_audmux>; /* AUD5<->tda1997x */
130724ba675SRob Herring	status = "okay";
131724ba675SRob Herring
132724ba675SRob Herring	mux-ssi1 {
133724ba675SRob Herring		fsl,audmux-port = <0>;
134724ba675SRob Herring		fsl,port-config = <
135724ba675SRob Herring			(IMX_AUDMUX_V2_PTCR_TFSDIR |
136724ba675SRob Herring			IMX_AUDMUX_V2_PTCR_TFSEL(4+8) | /* RXFS */
137724ba675SRob Herring			IMX_AUDMUX_V2_PTCR_TCLKDIR |
138724ba675SRob Herring			IMX_AUDMUX_V2_PTCR_TCSEL(4+8) | /* RXC */
139724ba675SRob Herring			IMX_AUDMUX_V2_PTCR_SYN)
140724ba675SRob Herring			IMX_AUDMUX_V2_PDCR_RXDSEL(4)
141724ba675SRob Herring		>;
142724ba675SRob Herring	};
143724ba675SRob Herring
144724ba675SRob Herring	mux-aud5 {
145724ba675SRob Herring		fsl,audmux-port = <4>;
146724ba675SRob Herring		fsl,port-config = <
147724ba675SRob Herring			IMX_AUDMUX_V2_PTCR_SYN
148724ba675SRob Herring			IMX_AUDMUX_V2_PDCR_RXDSEL(0)>;
149724ba675SRob Herring	};
150724ba675SRob Herring};
151724ba675SRob Herring
152724ba675SRob Herring&can1 {
153724ba675SRob Herring	pinctrl-names = "default";
154724ba675SRob Herring	pinctrl-0 = <&pinctrl_flexcan1>;
155724ba675SRob Herring	status = "okay";
156724ba675SRob Herring};
157724ba675SRob Herring
158724ba675SRob Herring&gpmi {
159724ba675SRob Herring	pinctrl-names = "default";
160724ba675SRob Herring	pinctrl-0 = <&pinctrl_gpmi_nand>;
161724ba675SRob Herring	status = "okay";
162724ba675SRob Herring};
163724ba675SRob Herring
164724ba675SRob Herring&hdmi {
165724ba675SRob Herring	ddc-i2c-bus = <&i2c3>;
166724ba675SRob Herring	status = "okay";
167724ba675SRob Herring};
168724ba675SRob Herring
169724ba675SRob Herring&i2c1 {
170724ba675SRob Herring	clock-frequency = <100000>;
171724ba675SRob Herring	pinctrl-names = "default";
172724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c1>;
173724ba675SRob Herring	status = "okay";
174724ba675SRob Herring
175724ba675SRob Herring	gsc: gsc@20 {
176724ba675SRob Herring		compatible = "gw,gsc";
177724ba675SRob Herring		reg = <0x20>;
178724ba675SRob Herring		interrupt-parent = <&gpio1>;
179724ba675SRob Herring		interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
180724ba675SRob Herring		interrupt-controller;
181724ba675SRob Herring		#interrupt-cells = <1>;
182724ba675SRob Herring		#size-cells = <0>;
183724ba675SRob Herring
184724ba675SRob Herring		adc {
185724ba675SRob Herring			compatible = "gw,gsc-adc";
186724ba675SRob Herring			#address-cells = <1>;
187724ba675SRob Herring			#size-cells = <0>;
188724ba675SRob Herring
189724ba675SRob Herring			channel@0 {
190724ba675SRob Herring				gw,mode = <0>;
191724ba675SRob Herring				reg = <0x00>;
192724ba675SRob Herring				label = "temp";
193724ba675SRob Herring			};
194724ba675SRob Herring
195724ba675SRob Herring			channel@2 {
196724ba675SRob Herring				gw,mode = <1>;
197724ba675SRob Herring				reg = <0x02>;
198724ba675SRob Herring				label = "vdd_vin";
199724ba675SRob Herring			};
200724ba675SRob Herring
201724ba675SRob Herring			channel@5 {
202724ba675SRob Herring				gw,mode = <1>;
203724ba675SRob Herring				reg = <0x05>;
204724ba675SRob Herring				label = "vdd_3p3";
205724ba675SRob Herring			};
206724ba675SRob Herring
207724ba675SRob Herring			channel@8 {
208724ba675SRob Herring				gw,mode = <1>;
209724ba675SRob Herring				reg = <0x08>;
210724ba675SRob Herring				label = "vdd_bat";
211724ba675SRob Herring			};
212724ba675SRob Herring
213724ba675SRob Herring			channel@b {
214724ba675SRob Herring				gw,mode = <1>;
215724ba675SRob Herring				reg = <0x0b>;
216724ba675SRob Herring				label = "vdd_5p0";
217724ba675SRob Herring			};
218724ba675SRob Herring
219724ba675SRob Herring			channel@e {
220724ba675SRob Herring				gw,mode = <1>;
221724ba675SRob Herring				reg = <0xe>;
222724ba675SRob Herring				label = "vdd_arm";
223724ba675SRob Herring			};
224724ba675SRob Herring
225724ba675SRob Herring			channel@11 {
226724ba675SRob Herring				gw,mode = <1>;
227724ba675SRob Herring				reg = <0x11>;
228724ba675SRob Herring				label = "vdd_soc";
229724ba675SRob Herring			};
230724ba675SRob Herring
231724ba675SRob Herring			channel@14 {
232724ba675SRob Herring				gw,mode = <1>;
233724ba675SRob Herring				reg = <0x14>;
234724ba675SRob Herring				label = "vdd_3p0";
235724ba675SRob Herring			};
236724ba675SRob Herring
237724ba675SRob Herring			channel@17 {
238724ba675SRob Herring				gw,mode = <1>;
239724ba675SRob Herring				reg = <0x17>;
240724ba675SRob Herring				label = "vdd_1p5";
241724ba675SRob Herring			};
242724ba675SRob Herring
243724ba675SRob Herring			channel@1d {
244724ba675SRob Herring				gw,mode = <1>;
245724ba675SRob Herring				reg = <0x1d>;
246724ba675SRob Herring				label = "vdd_1p8a";
247724ba675SRob Herring			};
248724ba675SRob Herring
249724ba675SRob Herring			channel@20 {
250724ba675SRob Herring				gw,mode = <1>;
251724ba675SRob Herring				reg = <0x20>;
252724ba675SRob Herring				label = "vdd_1p0b";
253724ba675SRob Herring			};
254724ba675SRob Herring		};
255724ba675SRob Herring	};
256724ba675SRob Herring
257724ba675SRob Herring	gsc_gpio: gpio@23 {
258724ba675SRob Herring		compatible = "nxp,pca9555";
259724ba675SRob Herring		reg = <0x23>;
260724ba675SRob Herring		gpio-controller;
261724ba675SRob Herring		#gpio-cells = <2>;
262724ba675SRob Herring		interrupt-parent = <&gsc>;
263724ba675SRob Herring		interrupts = <4>;
264724ba675SRob Herring	};
265724ba675SRob Herring
266724ba675SRob Herring	eeprom1: eeprom@50 {
267724ba675SRob Herring		compatible = "atmel,24c02";
268724ba675SRob Herring		reg = <0x50>;
269724ba675SRob Herring		pagesize = <16>;
270724ba675SRob Herring	};
271724ba675SRob Herring
272724ba675SRob Herring	eeprom2: eeprom@51 {
273724ba675SRob Herring		compatible = "atmel,24c02";
274724ba675SRob Herring		reg = <0x51>;
275724ba675SRob Herring		pagesize = <16>;
276724ba675SRob Herring	};
277724ba675SRob Herring
278724ba675SRob Herring	eeprom3: eeprom@52 {
279724ba675SRob Herring		compatible = "atmel,24c02";
280724ba675SRob Herring		reg = <0x52>;
281724ba675SRob Herring		pagesize = <16>;
282724ba675SRob Herring	};
283724ba675SRob Herring
284724ba675SRob Herring	eeprom4: eeprom@53 {
285724ba675SRob Herring		compatible = "atmel,24c02";
286724ba675SRob Herring		reg = <0x53>;
287724ba675SRob Herring		pagesize = <16>;
288724ba675SRob Herring	};
289724ba675SRob Herring
290724ba675SRob Herring	rtc: ds1672@68 {
291724ba675SRob Herring		compatible = "dallas,ds1672";
292724ba675SRob Herring		reg = <0x68>;
293724ba675SRob Herring	};
294724ba675SRob Herring};
295724ba675SRob Herring
296724ba675SRob Herring&i2c2 {
297724ba675SRob Herring	clock-frequency = <100000>;
298724ba675SRob Herring	pinctrl-names = "default";
299724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c2>;
300724ba675SRob Herring	status = "okay";
301724ba675SRob Herring
302724ba675SRob Herring	ltc3676: pmic@3c {
303724ba675SRob Herring		compatible = "lltc,ltc3676";
304724ba675SRob Herring		reg = <0x3c>;
305724ba675SRob Herring		pinctrl-names = "default";
306724ba675SRob Herring		pinctrl-0 = <&pinctrl_pmic>;
307724ba675SRob Herring		interrupt-parent = <&gpio1>;
308724ba675SRob Herring		interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
309724ba675SRob Herring
310724ba675SRob Herring		regulators {
311724ba675SRob Herring			/* VDD_SOC (1+R1/R2 = 1.635) */
312724ba675SRob Herring			reg_vdd_soc: sw1 {
313724ba675SRob Herring				regulator-name = "vddsoc";
314724ba675SRob Herring				regulator-min-microvolt = <674400>;
315724ba675SRob Herring				regulator-max-microvolt = <1308000>;
316724ba675SRob Herring				lltc,fb-voltage-divider = <127000 200000>;
317724ba675SRob Herring				regulator-ramp-delay = <7000>;
318724ba675SRob Herring				regulator-boot-on;
319724ba675SRob Herring				regulator-always-on;
320724ba675SRob Herring			};
321724ba675SRob Herring
322724ba675SRob Herring			/* VDD_DDR (1+R1/R2 = 2.105) */
323724ba675SRob Herring			reg_vdd_ddr: sw2 {
324724ba675SRob Herring				regulator-name = "vddddr";
325724ba675SRob Herring				regulator-min-microvolt = <868310>;
326724ba675SRob Herring				regulator-max-microvolt = <1684000>;
327724ba675SRob Herring				lltc,fb-voltage-divider = <221000 200000>;
328724ba675SRob Herring				regulator-ramp-delay = <7000>;
329724ba675SRob Herring				regulator-boot-on;
330724ba675SRob Herring				regulator-always-on;
331724ba675SRob Herring			};
332724ba675SRob Herring
333724ba675SRob Herring			/* VDD_ARM (1+R1/R2 = 1.635) */
334724ba675SRob Herring			reg_vdd_arm: sw3 {
335724ba675SRob Herring				regulator-name = "vddarm";
336724ba675SRob Herring				regulator-min-microvolt = <674400>;
337724ba675SRob Herring				regulator-max-microvolt = <1308000>;
338724ba675SRob Herring				lltc,fb-voltage-divider = <127000 200000>;
339724ba675SRob Herring				regulator-ramp-delay = <7000>;
340724ba675SRob Herring				regulator-boot-on;
341724ba675SRob Herring				regulator-always-on;
342724ba675SRob Herring			};
343724ba675SRob Herring
344724ba675SRob Herring			/* VDD_3P3 (1+R1/R2 = 1.281) */
345724ba675SRob Herring			reg_3p3: sw4 {
346724ba675SRob Herring				regulator-name = "vdd3p3";
347724ba675SRob Herring				regulator-min-microvolt = <1880000>;
348724ba675SRob Herring				regulator-max-microvolt = <3647000>;
349724ba675SRob Herring				lltc,fb-voltage-divider = <200000 56200>;
350724ba675SRob Herring				regulator-ramp-delay = <7000>;
351724ba675SRob Herring				regulator-boot-on;
352724ba675SRob Herring				regulator-always-on;
353724ba675SRob Herring			};
354724ba675SRob Herring
355724ba675SRob Herring			/* VDD_1P8a (1+R1/R2 = 2.505): HDMI In core */
356724ba675SRob Herring			reg_1p8a: ldo2 {
357724ba675SRob Herring				regulator-name = "vdd1p8a";
358724ba675SRob Herring				regulator-min-microvolt = <1816125>;
359724ba675SRob Herring				regulator-max-microvolt = <1816125>;
360724ba675SRob Herring				lltc,fb-voltage-divider = <301000 200000>;
361724ba675SRob Herring				regulator-boot-on;
362724ba675SRob Herring				regulator-always-on;
363724ba675SRob Herring			};
364724ba675SRob Herring
365724ba675SRob Herring			/* VDD_1P8b: HDMI In analog */
366724ba675SRob Herring			reg_1p8b: ldo3 {
367724ba675SRob Herring				regulator-name = "vdd1p8b";
368724ba675SRob Herring				regulator-min-microvolt = <1800000>;
369724ba675SRob Herring				regulator-max-microvolt = <1800000>;
370724ba675SRob Herring				regulator-boot-on;
371724ba675SRob Herring			};
372724ba675SRob Herring
373724ba675SRob Herring			/* VDD_HIGH (1+R1/R2 = 4.17) */
374724ba675SRob Herring			reg_3p0: ldo4 {
375724ba675SRob Herring				regulator-name = "vdd3p0";
376724ba675SRob Herring				regulator-min-microvolt = <3023250>;
377724ba675SRob Herring				regulator-max-microvolt = <3023250>;
378724ba675SRob Herring				lltc,fb-voltage-divider = <634000 200000>;
379724ba675SRob Herring				regulator-boot-on;
380724ba675SRob Herring				regulator-always-on;
381724ba675SRob Herring			};
382724ba675SRob Herring		};
383724ba675SRob Herring	};
384724ba675SRob Herring};
385724ba675SRob Herring
386724ba675SRob Herring&i2c3 {
387724ba675SRob Herring	clock-frequency = <100000>;
388724ba675SRob Herring	pinctrl-names = "default";
389724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c3>;
390724ba675SRob Herring	status = "okay";
391724ba675SRob Herring
392724ba675SRob Herring	gpio_exp: pca9555@24 {
393724ba675SRob Herring		compatible = "nxp,pca9555";
394724ba675SRob Herring		reg = <0x24>;
395724ba675SRob Herring		gpio-controller;
396724ba675SRob Herring		#gpio-cells = <2>;
397724ba675SRob Herring	};
398724ba675SRob Herring
399724ba675SRob Herring	hdmi_receiver: hdmi-receiver@48 {
400724ba675SRob Herring		compatible = "nxp,tda19971";
401724ba675SRob Herring		pinctrl-names = "default";
402724ba675SRob Herring		pinctrl-0 = <&pinctrl_tda1997x>;
403724ba675SRob Herring		reg = <0x48>;
404724ba675SRob Herring		interrupt-parent = <&gpio1>;
405724ba675SRob Herring		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
406724ba675SRob Herring		DOVDD-supply = <&reg_3p3>;
407724ba675SRob Herring		AVDD-supply = <&reg_1p8b>;
408724ba675SRob Herring		DVDD-supply = <&reg_1p8a>;
409724ba675SRob Herring		#sound-dai-cells = <0>;
410724ba675SRob Herring		nxp,audout-format = "i2s";
411724ba675SRob Herring		nxp,audout-layout = <0>;
412724ba675SRob Herring		nxp,audout-width = <16>;
413724ba675SRob Herring		nxp,audout-mclk-fs = <128>;
414724ba675SRob Herring		/*
415724ba675SRob Herring		 * The 8bpp YUV422 semi-planar mode outputs CbCr[11:4]
416724ba675SRob Herring		 * and Y[11:4] across 16bits in the same cycle
417724ba675SRob Herring		 * which we map to VP[15:08]<->CSI_DATA[19:12]
418724ba675SRob Herring		 */
419724ba675SRob Herring		nxp,vidout-portcfg =
420724ba675SRob Herring			/*G_Y_11_8<->VP[15:12]<->CSI_DATA[19:16]*/
421724ba675SRob Herring			< TDA1997X_VP24_V15_12 TDA1997X_G_Y_11_8 >,
422724ba675SRob Herring			/*G_Y_7_4<->VP[11:08]<->CSI_DATA[15:12]*/
423724ba675SRob Herring			< TDA1997X_VP24_V11_08 TDA1997X_G_Y_7_4 >,
424724ba675SRob Herring			/*R_CR_CBCR_11_8<->VP[07:04]<->CSI_DATA[11:08]*/
425724ba675SRob Herring			< TDA1997X_VP24_V07_04 TDA1997X_R_CR_CBCR_11_8 >,
426724ba675SRob Herring			/*R_CR_CBCR_7_4<->VP[03:00]<->CSI_DATA[07:04]*/
427724ba675SRob Herring			< TDA1997X_VP24_V03_00 TDA1997X_R_CR_CBCR_7_4 >;
428724ba675SRob Herring
429724ba675SRob Herring		port {
430724ba675SRob Herring			tda1997x_to_ipu1_csi0_mux: endpoint {
431724ba675SRob Herring				remote-endpoint = <&ipu1_csi0_mux_from_parallel_sensor>;
432724ba675SRob Herring				bus-width = <16>;
433724ba675SRob Herring				hsync-active = <1>;
434724ba675SRob Herring				vsync-active = <1>;
435724ba675SRob Herring				data-active = <1>;
436724ba675SRob Herring			};
437724ba675SRob Herring		};
438724ba675SRob Herring	};
439724ba675SRob Herring};
440724ba675SRob Herring
441724ba675SRob Herring&ipu1_csi0_from_ipu1_csi0_mux {
442724ba675SRob Herring	bus-width = <16>;
443724ba675SRob Herring};
444724ba675SRob Herring
445724ba675SRob Herring&ipu1_csi0_mux_from_parallel_sensor {
446724ba675SRob Herring	remote-endpoint = <&tda1997x_to_ipu1_csi0_mux>;
447724ba675SRob Herring	bus-width = <16>;
448724ba675SRob Herring};
449724ba675SRob Herring
450724ba675SRob Herring&ipu1_csi0 {
451724ba675SRob Herring	pinctrl-names = "default";
452724ba675SRob Herring	pinctrl-0 = <&pinctrl_ipu1_csi0>;
453724ba675SRob Herring};
454724ba675SRob Herring
455724ba675SRob Herring&pcie {
456724ba675SRob Herring	pinctrl-names = "default";
457724ba675SRob Herring	pinctrl-0 = <&pinctrl_pcie>;
458724ba675SRob Herring	reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
459724ba675SRob Herring	status = "okay";
460724ba675SRob Herring};
461724ba675SRob Herring
462724ba675SRob Herring&pwm2 {
463724ba675SRob Herring	pinctrl-names = "default";
464724ba675SRob Herring	pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
465724ba675SRob Herring	status = "disabled";
466724ba675SRob Herring};
467724ba675SRob Herring
468724ba675SRob Herring&pwm3 {
469724ba675SRob Herring	pinctrl-names = "default";
470724ba675SRob Herring	pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
471724ba675SRob Herring	status = "disabled";
472724ba675SRob Herring};
473724ba675SRob Herring
474724ba675SRob Herring&ssi1 {
475724ba675SRob Herring	status = "okay";
476724ba675SRob Herring};
477724ba675SRob Herring
478724ba675SRob Herring&uart2 {
479724ba675SRob Herring	pinctrl-names = "default";
480724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart2>;
481724ba675SRob Herring	status = "okay";
482724ba675SRob Herring};
483724ba675SRob Herring
484724ba675SRob Herring&uart3 {
485724ba675SRob Herring	pinctrl-names = "default";
486724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart3>;
487724ba675SRob Herring	status = "okay";
488724ba675SRob Herring};
489724ba675SRob Herring
490724ba675SRob Herring&usbotg {
491724ba675SRob Herring	vbus-supply = <&reg_usb_otg_vbus>;
492724ba675SRob Herring	pinctrl-names = "default";
493724ba675SRob Herring	pinctrl-0 = <&pinctrl_usbotg>;
494724ba675SRob Herring	disable-over-current;
495724ba675SRob Herring	status = "okay";
496724ba675SRob Herring};
497724ba675SRob Herring
498724ba675SRob Herring&usbh1 {
499724ba675SRob Herring	vbus-supply = <&reg_usb_h1_vbus>;
500724ba675SRob Herring	status = "okay";
501724ba675SRob Herring};
502724ba675SRob Herring
503724ba675SRob Herring&wdog1 {
504724ba675SRob Herring	pinctrl-names = "default";
505724ba675SRob Herring	pinctrl-0 = <&pinctrl_wdog>;
506724ba675SRob Herring	fsl,ext-reset-output;
507724ba675SRob Herring};
508724ba675SRob Herring
509724ba675SRob Herring&iomuxc {
510724ba675SRob Herring	pinctrl_audmux: audmuxgrp {
511724ba675SRob Herring		fsl,pins = <
512724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT19__AUD5_RXD	0x130b0
513724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT14__AUD5_RXC	0x130b0
514724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT13__AUD5_RXFS	0x130b0
515724ba675SRob Herring		>;
516724ba675SRob Herring	};
517724ba675SRob Herring
518724ba675SRob Herring	pinctrl_flexcan1: flexcan1grp {
519724ba675SRob Herring		fsl,pins = <
520724ba675SRob Herring			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX	0x1b0b1
521724ba675SRob Herring			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX	0x1b0b1
522724ba675SRob Herring			MX6QDL_PAD_GPIO_9__GPIO1_IO09		0x4001b0b0 /* CAN_STBY */
523724ba675SRob Herring		>;
524724ba675SRob Herring	};
525724ba675SRob Herring
526724ba675SRob Herring	pinctrl_gpio_leds: gpioledsgrp {
527724ba675SRob Herring		fsl,pins = <
528724ba675SRob Herring			MX6QDL_PAD_KEY_ROW0__GPIO4_IO07   0x1b0b0
529724ba675SRob Herring		>;
530724ba675SRob Herring	};
531724ba675SRob Herring
532724ba675SRob Herring	pinctrl_gpmi_nand: gpminandgrp {
533724ba675SRob Herring		fsl,pins = <
534724ba675SRob Herring			MX6QDL_PAD_NANDF_CLE__NAND_CLE		0xb0b1
535724ba675SRob Herring			MX6QDL_PAD_NANDF_ALE__NAND_ALE		0xb0b1
536724ba675SRob Herring			MX6QDL_PAD_NANDF_WP_B__NAND_WP_B	0xb0b1
537724ba675SRob Herring			MX6QDL_PAD_NANDF_RB0__NAND_READY_B	0xb000
538724ba675SRob Herring			MX6QDL_PAD_NANDF_CS0__NAND_CE0_B	0xb0b1
539724ba675SRob Herring			MX6QDL_PAD_SD4_CMD__NAND_RE_B		0xb0b1
540724ba675SRob Herring			MX6QDL_PAD_SD4_CLK__NAND_WE_B		0xb0b1
541724ba675SRob Herring			MX6QDL_PAD_NANDF_D0__NAND_DATA00	0xb0b1
542724ba675SRob Herring			MX6QDL_PAD_NANDF_D1__NAND_DATA01	0xb0b1
543724ba675SRob Herring			MX6QDL_PAD_NANDF_D2__NAND_DATA02	0xb0b1
544724ba675SRob Herring			MX6QDL_PAD_NANDF_D3__NAND_DATA03	0xb0b1
545724ba675SRob Herring			MX6QDL_PAD_NANDF_D4__NAND_DATA04	0xb0b1
546724ba675SRob Herring			MX6QDL_PAD_NANDF_D5__NAND_DATA05	0xb0b1
547724ba675SRob Herring			MX6QDL_PAD_NANDF_D6__NAND_DATA06	0xb0b1
548724ba675SRob Herring			MX6QDL_PAD_NANDF_D7__NAND_DATA07	0xb0b1
549724ba675SRob Herring		>;
550724ba675SRob Herring	};
551724ba675SRob Herring
552724ba675SRob Herring	pinctrl_i2c1: i2c1grp {
553724ba675SRob Herring		fsl,pins = <
554724ba675SRob Herring			MX6QDL_PAD_EIM_D21__I2C1_SCL		0x4001b8b1
555724ba675SRob Herring			MX6QDL_PAD_EIM_D28__I2C1_SDA		0x4001b8b1
556724ba675SRob Herring			MX6QDL_PAD_GPIO_4__GPIO1_IO04		0xb0b1
557724ba675SRob Herring		>;
558724ba675SRob Herring	};
559724ba675SRob Herring
560724ba675SRob Herring	pinctrl_i2c2: i2c2grp {
561724ba675SRob Herring		fsl,pins = <
562724ba675SRob Herring			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
563724ba675SRob Herring			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
564724ba675SRob Herring		>;
565724ba675SRob Herring	};
566724ba675SRob Herring
567724ba675SRob Herring	pinctrl_i2c3: i2c3grp {
568724ba675SRob Herring		fsl,pins = <
569724ba675SRob Herring			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4001b8b1
570724ba675SRob Herring			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b8b1
571724ba675SRob Herring		>;
572724ba675SRob Herring	};
573724ba675SRob Herring
574724ba675SRob Herring	pinctrl_ipu1_csi0: ipu1_csi0grp {
575724ba675SRob Herring		fsl,pins = <
576724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04		0x1b0b0
577724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05		0x1b0b0
578724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06		0x1b0b0
579724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07		0x1b0b0
580724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08		0x1b0b0
581724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09		0x1b0b0
582724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10		0x1b0b0
583724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11		0x1b0b0
584724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12		0x1b0b0
585724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13		0x1b0b0
586724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14		0x1b0b0
587724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15		0x1b0b0
588724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16		0x1b0b0
589724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17		0x1b0b0
590724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18		0x1b0b0
591724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19		0x1b0b0
592724ba675SRob Herring			MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC		0x1b0b0
593724ba675SRob Herring			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK	0x1b0b0
594724ba675SRob Herring			MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC		0x1b0b0
595724ba675SRob Herring		>;
596724ba675SRob Herring	};
597724ba675SRob Herring
598724ba675SRob Herring	pinctrl_pcie: pciegrp {
599724ba675SRob Herring		fsl,pins = <
600724ba675SRob Herring			MX6QDL_PAD_GPIO_0__GPIO1_IO00		0x1b0b0 /* PCIE RST */
601724ba675SRob Herring		>;
602724ba675SRob Herring	};
603724ba675SRob Herring
604724ba675SRob Herring	pinctrl_pmic: pmicgrp {
605724ba675SRob Herring		fsl,pins = <
606724ba675SRob Herring			MX6QDL_PAD_GPIO_8__GPIO1_IO08		0x0001b0b0 /* PMIC_IRQ# */
607724ba675SRob Herring		>;
608724ba675SRob Herring	};
609724ba675SRob Herring
610724ba675SRob Herring	pinctrl_pwm2: pwm2grp {
611724ba675SRob Herring		fsl,pins = <
612724ba675SRob Herring			MX6QDL_PAD_SD1_DAT2__PWM2_OUT		0x1b0b1
613724ba675SRob Herring		>;
614724ba675SRob Herring	};
615724ba675SRob Herring
616724ba675SRob Herring	pinctrl_pwm3: pwm3grp {
617724ba675SRob Herring		fsl,pins = <
618724ba675SRob Herring			MX6QDL_PAD_SD1_DAT1__PWM3_OUT		0x1b0b1
619724ba675SRob Herring		>;
620724ba675SRob Herring	};
621724ba675SRob Herring
622724ba675SRob Herring	pinctrl_tda1997x: tda1997xgrp {
623724ba675SRob Herring		fsl,pins = <
624724ba675SRob Herring			MX6QDL_PAD_GPIO_7__GPIO1_IO07		0x1b0b0
625724ba675SRob Herring		>;
626724ba675SRob Herring	};
627724ba675SRob Herring
628724ba675SRob Herring	pinctrl_uart2: uart2grp {
629724ba675SRob Herring		fsl,pins = <
630724ba675SRob Herring			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA	0x1b0b1
631724ba675SRob Herring			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA	0x1b0b1
632724ba675SRob Herring		>;
633724ba675SRob Herring	};
634724ba675SRob Herring
635724ba675SRob Herring	pinctrl_uart3: uart3grp {
636724ba675SRob Herring		fsl,pins = <
637724ba675SRob Herring			MX6QDL_PAD_EIM_D24__UART3_TX_DATA	0x1b0b1
638724ba675SRob Herring			MX6QDL_PAD_EIM_D25__UART3_RX_DATA	0x1b0b1
639724ba675SRob Herring		>;
640724ba675SRob Herring	};
641724ba675SRob Herring
642724ba675SRob Herring	pinctrl_usbotg: usbotggrp {
643724ba675SRob Herring		fsl,pins = <
644724ba675SRob Herring			MX6QDL_PAD_GPIO_1__USB_OTG_ID		0x17059
645724ba675SRob Herring		>;
646724ba675SRob Herring	};
647724ba675SRob Herring
648724ba675SRob Herring	pinctrl_wdog: wdoggrp {
649724ba675SRob Herring		fsl,pins = <
650724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT8__WDOG1_B		0x1b0b0
651724ba675SRob Herring		>;
652724ba675SRob Herring	};
653724ba675SRob Herring};
654