xref: /linux/scripts/dtc/include-prefixes/arm/nxp/imx/imx6qdl-emcon.dtsi (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0 or MIT)
2*724ba675SRob Herring//
3*724ba675SRob Herring// Copyright (C) 2018 emtrion GmbH
4*724ba675SRob Herring//
5*724ba675SRob Herring
6*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
7*724ba675SRob Herring#include <dt-bindings/pwm/pwm.h>
8*724ba675SRob Herring#include <dt-bindings/input/input.h>
9*724ba675SRob Herring
10*724ba675SRob Herring/ {
11*724ba675SRob Herring
12*724ba675SRob Herring	model = "emtrion SoM emCON-MX6";
13*724ba675SRob Herring	compatible = "emtrion,emcon-mx6";
14*724ba675SRob Herring
15*724ba675SRob Herring	aliases {
16*724ba675SRob Herring		mmc0 = &usdhc3;
17*724ba675SRob Herring		mmc1 = &usdhc2;
18*724ba675SRob Herring		mmc2 = &usdhc1;
19*724ba675SRob Herring		rtc0 = &ds1307;
20*724ba675SRob Herring	};
21*724ba675SRob Herring
22*724ba675SRob Herring	chosen {
23*724ba675SRob Herring		stdout-path = &uart1;
24*724ba675SRob Herring	};
25*724ba675SRob Herring
26*724ba675SRob Herring	memory@10000000 {
27*724ba675SRob Herring		device_type = "memory";
28*724ba675SRob Herring		reg = <0x10000000 0x40000000>;
29*724ba675SRob Herring	};
30*724ba675SRob Herring
31*724ba675SRob Herring	gpio-keys {
32*724ba675SRob Herring		compatible = "gpio-keys";
33*724ba675SRob Herring		pinctrl-names = "default";
34*724ba675SRob Herring		pinctrl-0 = <&pinctrl_emcon_wake>;
35*724ba675SRob Herring
36*724ba675SRob Herring		wake {
37*724ba675SRob Herring			label = "Wake";
38*724ba675SRob Herring			linux,code = <KEY_WAKEUP>;
39*724ba675SRob Herring			gpios = <&gpio3 2 GPIO_ACTIVE_LOW>;
40*724ba675SRob Herring			wakeup-source;
41*724ba675SRob Herring		};
42*724ba675SRob Herring	};
43*724ba675SRob Herring
44*724ba675SRob Herring	som_leds: leds {
45*724ba675SRob Herring		compatible = "gpio-leds";
46*724ba675SRob Herring		pinctrl-names = "default";
47*724ba675SRob Herring		pinctrl-0 = <&pinctrl_som_leds>;
48*724ba675SRob Herring
49*724ba675SRob Herring		led-green {
50*724ba675SRob Herring			label = "som:green";
51*724ba675SRob Herring			gpios = <&gpio3 0 GPIO_ACTIVE_HIGH>;
52*724ba675SRob Herring			linux,default-trigger = "heartbeat";
53*724ba675SRob Herring			default-state = "on";
54*724ba675SRob Herring		};
55*724ba675SRob Herring
56*724ba675SRob Herring		led-red {
57*724ba675SRob Herring			label = "som:red";
58*724ba675SRob Herring			gpios = <&gpio3 1 GPIO_ACTIVE_LOW>;
59*724ba675SRob Herring			default-state = "keep";
60*724ba675SRob Herring		};
61*724ba675SRob Herring
62*724ba675SRob Herring	};
63*724ba675SRob Herring
64*724ba675SRob Herring	lvds_backlight: lvds-backlight {
65*724ba675SRob Herring		compatible = "pwm-backlight";
66*724ba675SRob Herring		pinctrl-names = "default";
67*724ba675SRob Herring		pinctrl-0 = <&pinctrl_lvds_bl>;
68*724ba675SRob Herring		enable-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>;
69*724ba675SRob Herring		pwms = <&pwm1 0 50000>;
70*724ba675SRob Herring		brightness-levels = <
71*724ba675SRob Herring			0 4 8 16 32 64 80 96 112
72*724ba675SRob Herring			128 144 160 176 250
73*724ba675SRob Herring		>;
74*724ba675SRob Herring		default-brightness-level = <13>;
75*724ba675SRob Herring		status = "okay";
76*724ba675SRob Herring	};
77*724ba675SRob Herring
78*724ba675SRob Herring	pwm_fan: pwm-fan {
79*724ba675SRob Herring		compatible = "pwm-fan";
80*724ba675SRob Herring		#cooling-cells = <2>;
81*724ba675SRob Herring		pwms = <&pwm4 0 50000>;
82*724ba675SRob Herring		cooling-levels = <0 64 127 191 255>;
83*724ba675SRob Herring		status = "disabled";
84*724ba675SRob Herring	};
85*724ba675SRob Herring
86*724ba675SRob Herring
87*724ba675SRob Herring	rgb_encoder: display {
88*724ba675SRob Herring		compatible = "fsl,imx-parallel-display";
89*724ba675SRob Herring		#address-cells = <1>;
90*724ba675SRob Herring		#size-cells = <0>;
91*724ba675SRob Herring		pinctrl-names = "default";
92*724ba675SRob Herring		pinctrl-0 = <&pinctrl_rgb24_display>;
93*724ba675SRob Herring		status = "disabled";
94*724ba675SRob Herring
95*724ba675SRob Herring		port@0 {
96*724ba675SRob Herring			reg = <0>;
97*724ba675SRob Herring
98*724ba675SRob Herring			rgb_encoder_in: endpoint {
99*724ba675SRob Herring				remote-endpoint = <&ipu1_di0_disp0>;
100*724ba675SRob Herring			};
101*724ba675SRob Herring		};
102*724ba675SRob Herring
103*724ba675SRob Herring		port@1 {
104*724ba675SRob Herring			reg = <1>;
105*724ba675SRob Herring
106*724ba675SRob Herring			rgb_encoder_out: endpoint {
107*724ba675SRob Herring				remote-endpoint = <&rgb_panel_in>;
108*724ba675SRob Herring			};
109*724ba675SRob Herring		};
110*724ba675SRob Herring	};
111*724ba675SRob Herring
112*724ba675SRob Herring	rgb_panel: lcd {
113*724ba675SRob Herring		backlight = <&rgb_backlight>;
114*724ba675SRob Herring		power-supply = <&reg_parallel_disp>;
115*724ba675SRob Herring
116*724ba675SRob Herring		port {
117*724ba675SRob Herring			rgb_panel_in: endpoint {
118*724ba675SRob Herring				remote-endpoint = <&rgb_encoder_out>;
119*724ba675SRob Herring			};
120*724ba675SRob Herring		};
121*724ba675SRob Herring	};
122*724ba675SRob Herring
123*724ba675SRob Herring	reg_parallel_disp: reg-parallel-display {
124*724ba675SRob Herring		compatible = "regulator-fixed";
125*724ba675SRob Herring		pinctrl-names = "default";
126*724ba675SRob Herring		pinctrl-0 = <&pinctrl_rgb_bl_en>;
127*724ba675SRob Herring		regulator-name = "LCD-Supply";
128*724ba675SRob Herring		regulator-min-microvolt = <5000000>;
129*724ba675SRob Herring		regulator-max-microvolt = <5000000>;
130*724ba675SRob Herring		gpio = <&gpio7 9 GPIO_ACTIVE_HIGH>;
131*724ba675SRob Herring		enable-active-high;
132*724ba675SRob Herring	};
133*724ba675SRob Herring
134*724ba675SRob Herring	reg_lvds_disp: reg-lvds-display {
135*724ba675SRob Herring		compatible = "regulator-fixed";
136*724ba675SRob Herring		regulator-name = "LVDS-Supply";
137*724ba675SRob Herring		regulator-min-microvolt = <5000000>;
138*724ba675SRob Herring		regulator-max-microvolt = <5000000>;
139*724ba675SRob Herring		gpio = <&gpio7 10 GPIO_ACTIVE_HIGH>;
140*724ba675SRob Herring		enable-active-high;
141*724ba675SRob Herring	};
142*724ba675SRob Herring
143*724ba675SRob Herring	rgb_backlight: rgb-backlight {
144*724ba675SRob Herring		compatible = "pwm-backlight";
145*724ba675SRob Herring		pinctrl-names = "default";
146*724ba675SRob Herring		pinctrl-0 = <&pinctrl_rgb_bl>;
147*724ba675SRob Herring		enable-gpios = <&gpio6 8 GPIO_ACTIVE_HIGH>;
148*724ba675SRob Herring		pwms = <&pwm3 0 5000000>;
149*724ba675SRob Herring		brightness-levels = <
150*724ba675SRob Herring			250 176 160 144 128 112
151*724ba675SRob Herring			96 80 64 48 32 16 8 1
152*724ba675SRob Herring		>;
153*724ba675SRob Herring		default-brightness-level = <13>;
154*724ba675SRob Herring		status = "okay";
155*724ba675SRob Herring	};
156*724ba675SRob Herring};
157*724ba675SRob Herring
158*724ba675SRob Herring&can1 {
159*724ba675SRob Herring	pinctrl-names = "default";
160*724ba675SRob Herring	pinctrl-0 = <&pinctrl_can1>;
161*724ba675SRob Herring};
162*724ba675SRob Herring
163*724ba675SRob Herring&can2 {
164*724ba675SRob Herring	pinctrl-names = "default";
165*724ba675SRob Herring	pinctrl-0 = <&pinctrl_can2>;
166*724ba675SRob Herring};
167*724ba675SRob Herring
168*724ba675SRob Herring&ecspi2 {
169*724ba675SRob Herring	pinctrl-names = "default";
170*724ba675SRob Herring	pinctrl-0 = <&pinctrl_ecspi2>;
171*724ba675SRob Herring	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>,
172*724ba675SRob Herring		<&gpio2 27 GPIO_ACTIVE_LOW>;
173*724ba675SRob Herring};
174*724ba675SRob Herring
175*724ba675SRob Herring&ecspi4 {
176*724ba675SRob Herring	pinctrl-names = "default";
177*724ba675SRob Herring	pinctrl-0 = <&pinctrl_nor_flash>;
178*724ba675SRob Herring};
179*724ba675SRob Herring
180*724ba675SRob Herring&fec {
181*724ba675SRob Herring	pinctrl-names = "default";
182*724ba675SRob Herring	pinctrl-0 = <&pinctrl_enet>;
183*724ba675SRob Herring	phy-mode = "rgmii";
184*724ba675SRob Herring	phy-reset-gpios = <&gpio5 20 GPIO_ACTIVE_LOW>;
185*724ba675SRob Herring	phy-reset-duration = <50>;
186*724ba675SRob Herring	phy-supply = <&vdd_1V8_reg>;
187*724ba675SRob Herring	phy-handle = <&ksz9031>;
188*724ba675SRob Herring	status = "okay";
189*724ba675SRob Herring
190*724ba675SRob Herring	mdio {
191*724ba675SRob Herring		#address-cells = <1>;
192*724ba675SRob Herring		#size-cells = <0>;
193*724ba675SRob Herring
194*724ba675SRob Herring		ksz9031: phy@0 {
195*724ba675SRob Herring			compatible = "ethernet-phy-ieee802.3-c22";
196*724ba675SRob Herring			reg = <0>;
197*724ba675SRob Herring			interrupt-parent = <&gpio1>;
198*724ba675SRob Herring			interrupts = <30 IRQ_TYPE_EDGE_FALLING>;
199*724ba675SRob Herring			rxdv-skew-ps = <480>;
200*724ba675SRob Herring			txen-skew-ps = <480>;
201*724ba675SRob Herring			rxd0-skew-ps = <480>;
202*724ba675SRob Herring			rxd1-skew-ps = <480>;
203*724ba675SRob Herring			rxd2-skew-ps = <480>;
204*724ba675SRob Herring			rxd3-skew-ps = <480>;
205*724ba675SRob Herring			txd0-skew-ps = <420>;
206*724ba675SRob Herring			txd1-skew-ps = <420>;
207*724ba675SRob Herring			txd2-skew-ps = <360>;
208*724ba675SRob Herring			txd3-skew-ps = <360>;
209*724ba675SRob Herring			txc-skew-ps = <1020>;
210*724ba675SRob Herring			rxc-skew-ps = <960>;
211*724ba675SRob Herring		};
212*724ba675SRob Herring	};
213*724ba675SRob Herring};
214*724ba675SRob Herring
215*724ba675SRob Herring&i2c1 {
216*724ba675SRob Herring	clock-frequency = <100000>;
217*724ba675SRob Herring	pinctrl-names = "default";
218*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c1>;
219*724ba675SRob Herring	status = "okay";
220*724ba675SRob Herring
221*724ba675SRob Herring	da9063: pmic@58 {
222*724ba675SRob Herring		compatible = "dlg,da9063";
223*724ba675SRob Herring		reg = <0x58>;
224*724ba675SRob Herring		pinctrl-names = "default";
225*724ba675SRob Herring		pinctrl-0 = <&pinctrl_pmic>;
226*724ba675SRob Herring		interrupt-parent = <&gpio2>;
227*724ba675SRob Herring		interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
228*724ba675SRob Herring		interrupt-controller;
229*724ba675SRob Herring
230*724ba675SRob Herring		onkey {
231*724ba675SRob Herring			compatible = "dlg,da9063-onkey";
232*724ba675SRob Herring			wakeup-source;
233*724ba675SRob Herring		};
234*724ba675SRob Herring
235*724ba675SRob Herring		watchdog {
236*724ba675SRob Herring			compatible = "dlg,da9063-watchdog";
237*724ba675SRob Herring			timeout-sec = <0>;
238*724ba675SRob Herring		};
239*724ba675SRob Herring
240*724ba675SRob Herring		regulators {
241*724ba675SRob Herring			vddcore_reg: bcore1 {
242*724ba675SRob Herring				regulator-min-microvolt = <1100000>;
243*724ba675SRob Herring				regulator-max-microvolt = <1450000>;
244*724ba675SRob Herring				regulator-ramp-delay = <2>;
245*724ba675SRob Herring				regulator-name = "DA9063_CORE";
246*724ba675SRob Herring				regulator-always-on;
247*724ba675SRob Herring			};
248*724ba675SRob Herring
249*724ba675SRob Herring			vddsoc_reg: bcore2 {
250*724ba675SRob Herring				regulator-min-microvolt = <1100000>;
251*724ba675SRob Herring				regulator-max-microvolt = <1450000>;
252*724ba675SRob Herring				regulator-ramp-delay = <2>;
253*724ba675SRob Herring				regulator-name = "DA9063_SOC";
254*724ba675SRob Herring				regulator-always-on;
255*724ba675SRob Herring			};
256*724ba675SRob Herring
257*724ba675SRob Herring			vdd_ddr3_reg: bpro {
258*724ba675SRob Herring				regulator-min-microvolt = <1500000>;
259*724ba675SRob Herring				regulator-max-microvolt = <1500000>;
260*724ba675SRob Herring				regulator-ramp-delay = <2>;
261*724ba675SRob Herring				regulator-always-on;
262*724ba675SRob Herring			};
263*724ba675SRob Herring
264*724ba675SRob Herring			vdd_3v3_reg: bperi {
265*724ba675SRob Herring				regulator-min-microvolt = <3300000>;
266*724ba675SRob Herring				regulator-max-microvolt = <3300000>;
267*724ba675SRob Herring				regulator-ramp-delay = <2>;
268*724ba675SRob Herring				regulator-always-on;
269*724ba675SRob Herring			};
270*724ba675SRob Herring
271*724ba675SRob Herring			vdd_sata_reg: ldo3 {
272*724ba675SRob Herring				regulator-min-microvolt = <2500000>;
273*724ba675SRob Herring				regulator-max-microvolt = <2500000>;
274*724ba675SRob Herring				regulator-always-on;
275*724ba675SRob Herring			};
276*724ba675SRob Herring			vdd_mipi_reg: ldo4 {
277*724ba675SRob Herring				regulator-min-microvolt = <2500000>;
278*724ba675SRob Herring				regulator-max-microvolt = <2500000>;
279*724ba675SRob Herring				regulator-always-on;
280*724ba675SRob Herring			};
281*724ba675SRob Herring
282*724ba675SRob Herring			vdd_mx6_snvs_reg: ldo5 {
283*724ba675SRob Herring				regulator-min-microvolt = <3300000>;
284*724ba675SRob Herring				regulator-max-microvolt = <3300000>;
285*724ba675SRob Herring				regulator-always-on;
286*724ba675SRob Herring			};
287*724ba675SRob Herring
288*724ba675SRob Herring			vdd_hdmi_reg: ldo6 {
289*724ba675SRob Herring				regulator-min-microvolt = <2500000>;
290*724ba675SRob Herring				regulator-max-microvolt = <2500000>;
291*724ba675SRob Herring				regulator-always-on;
292*724ba675SRob Herring				regulator-boot-on;
293*724ba675SRob Herring			};
294*724ba675SRob Herring
295*724ba675SRob Herring			vdd_pcie_reg: ldo7 {
296*724ba675SRob Herring				regulator-min-microvolt = <2500000>;
297*724ba675SRob Herring				regulator-max-microvolt = <2500000>;
298*724ba675SRob Herring				regulator-always-on;
299*724ba675SRob Herring			};
300*724ba675SRob Herring
301*724ba675SRob Herring			vdd_1V8_reg: ldo8 {
302*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
303*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
304*724ba675SRob Herring				regulator-always-on;
305*724ba675SRob Herring			};
306*724ba675SRob Herring
307*724ba675SRob Herring			vdd_3V3_sdc_reg: ldo9 {
308*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
309*724ba675SRob Herring				regulator-max-microvolt = <3300000>;
310*724ba675SRob Herring				regulator-always-on;
311*724ba675SRob Herring			};
312*724ba675SRob Herring
313*724ba675SRob Herring			vdd_1V2_reg: ldo10 {
314*724ba675SRob Herring				regulator-min-microvolt = <1200000>;
315*724ba675SRob Herring				regulator-max-microvolt = <1200000>;
316*724ba675SRob Herring				regulator-always-on;
317*724ba675SRob Herring			};
318*724ba675SRob Herring		};
319*724ba675SRob Herring	};
320*724ba675SRob Herring
321*724ba675SRob Herring	ds1307: rtc@68 {
322*724ba675SRob Herring		compatible = "dallas,ds1307";
323*724ba675SRob Herring		reg = <0x68>;
324*724ba675SRob Herring	};
325*724ba675SRob Herring};
326*724ba675SRob Herring
327*724ba675SRob Herring&i2c2 {
328*724ba675SRob Herring	clock-frequency = <100000>;
329*724ba675SRob Herring	pinctrl-names = "default";
330*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c2>;
331*724ba675SRob Herring};
332*724ba675SRob Herring
333*724ba675SRob Herring&iomuxc {
334*724ba675SRob Herring
335*724ba675SRob Herring	pinctrl_audmux: audmuxgrp {
336*724ba675SRob Herring		fsl,pins = <
337*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT7__AUD3_RXD			0x130b0
338*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT4__AUD3_TXC			0x1b060
339*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT5__AUD3_TXD			0x130B0
340*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS			0x1b060
341*724ba675SRob Herring		>;
342*724ba675SRob Herring	};
343*724ba675SRob Herring
344*724ba675SRob Herring	pinctrl_can1: can1grp {
345*724ba675SRob Herring		fsl,pins = <
346*724ba675SRob Herring			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX		0x1b0b1
347*724ba675SRob Herring			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX		0x1b0b1
348*724ba675SRob Herring		>;
349*724ba675SRob Herring	};
350*724ba675SRob Herring
351*724ba675SRob Herring	pinctrl_can2: can2grp {
352*724ba675SRob Herring		fsl,pins = <
353*724ba675SRob Herring			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX		0x1b0b1
354*724ba675SRob Herring			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX		0x1b0b1
355*724ba675SRob Herring		>;
356*724ba675SRob Herring	};
357*724ba675SRob Herring
358*724ba675SRob Herring	pinctrl_cpi1: csi0grp {
359*724ba675SRob Herring		fsl,pins = <
360*724ba675SRob Herring			MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0xb0b1
361*724ba675SRob Herring			MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC	0x1b0b1
362*724ba675SRob Herring			MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC	0x1b0b1
363*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x1b0b1
364*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x1b0b1
365*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x1b0b1
366*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x1b0b1
367*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x1b0b1
368*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x1b0b1
369*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x1b0b1
370*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x1b0b1
371*724ba675SRob Herring		>;
372*724ba675SRob Herring	};
373*724ba675SRob Herring
374*724ba675SRob Herring	/*camera2-pinctrl is in imx6q-emcon.dtsi or imx6dl-emcon.dtsi*/
375*724ba675SRob Herring
376*724ba675SRob Herring	pinctrl_ecspi2: ecspi2grp {
377*724ba675SRob Herring		fsl,pins = <
378*724ba675SRob Herring			MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK			0x100b1
379*724ba675SRob Herring			MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI			0x100b1
380*724ba675SRob Herring			MX6QDL_PAD_EIM_OE__ECSPI2_MISO			0x100b1
381*724ba675SRob Herring			MX6QDL_PAD_EIM_LBA__GPIO2_IO27			0x100b1
382*724ba675SRob Herring			MX6QDL_PAD_EIM_RW__GPIO2_IO26			0x100b1
383*724ba675SRob Herring		>;
384*724ba675SRob Herring	};
385*724ba675SRob Herring
386*724ba675SRob Herring	pinctrl_emcon_gpio1: emcongpio1 {
387*724ba675SRob Herring		fsl,pins = <
388*724ba675SRob Herring			MX6QDL_PAD_NANDF_D0__GPIO2_IO00			0x0b0b1
389*724ba675SRob Herring		>;
390*724ba675SRob Herring	};
391*724ba675SRob Herring
392*724ba675SRob Herring	pinctrl_emcon_gpio2: emcongpio2 {
393*724ba675SRob Herring		fsl,pins = <
394*724ba675SRob Herring			MX6QDL_PAD_NANDF_D1__GPIO2_IO01			0x0b0b1
395*724ba675SRob Herring		>;
396*724ba675SRob Herring	};
397*724ba675SRob Herring
398*724ba675SRob Herring	pinctrl_emcon_gpio3: emcongpio3 {
399*724ba675SRob Herring		fsl,pins = <
400*724ba675SRob Herring			MX6QDL_PAD_NANDF_D2__GPIO2_IO02			0x0b0b1
401*724ba675SRob Herring		>;
402*724ba675SRob Herring	};
403*724ba675SRob Herring
404*724ba675SRob Herring	pinctrl_emcon_gpio4: emcongpio4 {
405*724ba675SRob Herring		fsl,pins = <
406*724ba675SRob Herring			MX6QDL_PAD_NANDF_D3__GPIO2_IO03			0x0b0b1
407*724ba675SRob Herring		>;
408*724ba675SRob Herring	};
409*724ba675SRob Herring
410*724ba675SRob Herring	pinctrl_emcon_gpio5: emcongpio5 {
411*724ba675SRob Herring		fsl,pins = <
412*724ba675SRob Herring			MX6QDL_PAD_NANDF_D4__GPIO2_IO04			0x0b0b1
413*724ba675SRob Herring		>;
414*724ba675SRob Herring	};
415*724ba675SRob Herring
416*724ba675SRob Herring	pinctrl_emcon_gpio6: emcongpio6 {
417*724ba675SRob Herring		fsl,pins = <
418*724ba675SRob Herring			MX6QDL_PAD_NANDF_D5__GPIO2_IO05			0x0b0b1
419*724ba675SRob Herring		>;
420*724ba675SRob Herring	};
421*724ba675SRob Herring
422*724ba675SRob Herring	pinctrl_emcon_gpio7: emcongpio7 {
423*724ba675SRob Herring		fsl,pins = <
424*724ba675SRob Herring			MX6QDL_PAD_NANDF_D6__GPIO2_IO06			0x0b0b1
425*724ba675SRob Herring		>;
426*724ba675SRob Herring	};
427*724ba675SRob Herring
428*724ba675SRob Herring	pinctrl_emcon_gpio8: emcongpio8 {
429*724ba675SRob Herring		fsl,pins = <
430*724ba675SRob Herring			MX6QDL_PAD_NANDF_D7__GPIO2_IO07			0x0b0b1
431*724ba675SRob Herring		>;
432*724ba675SRob Herring	};
433*724ba675SRob Herring
434*724ba675SRob Herring	pinctrl_emcon_irq_a: emconirqa {
435*724ba675SRob Herring		fsl,pins = <
436*724ba675SRob Herring			MX6QDL_PAD_NANDF_CLE__GPIO6_IO07		0x0b0b1
437*724ba675SRob Herring		>;
438*724ba675SRob Herring	};
439*724ba675SRob Herring
440*724ba675SRob Herring	pinctrl_emcon_irq_b: emconirqb {
441*724ba675SRob Herring		fsl,pins = <
442*724ba675SRob Herring			MX6QDL_PAD_NANDF_CS2__GPIO6_IO15		0x0b0b1
443*724ba675SRob Herring		>;
444*724ba675SRob Herring	};
445*724ba675SRob Herring
446*724ba675SRob Herring	pinctrl_emcon_irq_c: emconirqc {
447*724ba675SRob Herring		fsl,pins = <
448*724ba675SRob Herring			MX6QDL_PAD_NANDF_CS3__GPIO6_IO16		0x0b0b1
449*724ba675SRob Herring		>;
450*724ba675SRob Herring	};
451*724ba675SRob Herring
452*724ba675SRob Herring	pinctrl_emcon_irq_pwr: emconirqpwr {
453*724ba675SRob Herring		fsl,pins = <
454*724ba675SRob Herring			MX6QDL_PAD_EIM_D23__GPIO3_IO23			0x0b0b1
455*724ba675SRob Herring		>;
456*724ba675SRob Herring	};
457*724ba675SRob Herring
458*724ba675SRob Herring	pinctrl_emcon_wake: emconwake {
459*724ba675SRob Herring		fsl,pins = <
460*724ba675SRob Herring			MX6QDL_PAD_EIM_DA2__GPIO3_IO02			0x1b0b1
461*724ba675SRob Herring		>;
462*724ba675SRob Herring	};
463*724ba675SRob Herring
464*724ba675SRob Herring	pinctrl_enet: enetgrp {
465*724ba675SRob Herring		fsl,pins = <
466*724ba675SRob Herring			MX6QDL_PAD_ENET_MDIO__ENET_MDIO			0x1b030
467*724ba675SRob Herring			MX6QDL_PAD_ENET_MDC__ENET_MDC			0x1b030
468*724ba675SRob Herring			MX6QDL_PAD_RGMII_TXC__RGMII_TXC			0x1b030
469*724ba675SRob Herring			MX6QDL_PAD_RGMII_TD0__RGMII_TD0			0x1b030
470*724ba675SRob Herring			MX6QDL_PAD_RGMII_TD1__RGMII_TD1			0x1b030
471*724ba675SRob Herring			MX6QDL_PAD_RGMII_TD2__RGMII_TD2			0x1b030
472*724ba675SRob Herring			MX6QDL_PAD_RGMII_TD3__RGMII_TD3			0x1b030
473*724ba675SRob Herring			MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL	0x1b030
474*724ba675SRob Herring			MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK	0x4001a0b1
475*724ba675SRob Herring			MX6QDL_PAD_RGMII_RXC__RGMII_RXC			0x1b030
476*724ba675SRob Herring			MX6QDL_PAD_RGMII_RD0__RGMII_RD0			0x1b030
477*724ba675SRob Herring			MX6QDL_PAD_RGMII_RD1__RGMII_RD1			0x1b030
478*724ba675SRob Herring			MX6QDL_PAD_RGMII_RD2__RGMII_RD2			0x1b030
479*724ba675SRob Herring			MX6QDL_PAD_RGMII_RD3__RGMII_RD3			0x1b030
480*724ba675SRob Herring			MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL	0x1b0b0
481*724ba675SRob Herring			MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20		0x1b058
482*724ba675SRob Herring			MX6QDL_PAD_ENET_TXD0__GPIO1_IO30		0x1b0b0
483*724ba675SRob Herring		 >;
484*724ba675SRob Herring	};
485*724ba675SRob Herring
486*724ba675SRob Herring	pinctrl_i2c1: i2c1grp {
487*724ba675SRob Herring		fsl,pins = <
488*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA		0x4001b8b1
489*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL		0x4001b8b1
490*724ba675SRob Herring		>;
491*724ba675SRob Herring	};
492*724ba675SRob Herring
493*724ba675SRob Herring	pinctrl_i2c2: i2c2grp {
494*724ba675SRob Herring		fsl,pins = <
495*724ba675SRob Herring			MX6QDL_PAD_KEY_COL3__I2C2_SCL		0x4001b8b1
496*724ba675SRob Herring			MX6QDL_PAD_KEY_ROW3__I2C2_SDA		0x4001b8b1
497*724ba675SRob Herring		>;
498*724ba675SRob Herring	};
499*724ba675SRob Herring
500*724ba675SRob Herring	pinctrl_i2c3: i2c3grp {
501*724ba675SRob Herring		fsl,pins = <
502*724ba675SRob Herring			MX6QDL_PAD_GPIO_3__I2C3_SCL		0x4000b070
503*724ba675SRob Herring			MX6QDL_PAD_GPIO_6__I2C3_SDA		0x4001b870
504*724ba675SRob Herring		>;
505*724ba675SRob Herring	};
506*724ba675SRob Herring
507*724ba675SRob Herring	pinctrl_irq_touch1: irqtouch1 {
508*724ba675SRob Herring		fsl,pins = <
509*724ba675SRob Herring			MX6QDL_PAD_GPIO_5__GPIO1_IO05			0x0b0b1
510*724ba675SRob Herring		>;
511*724ba675SRob Herring	};
512*724ba675SRob Herring
513*724ba675SRob Herring	pinctrl_irq_touch2: irqtouch2 {
514*724ba675SRob Herring		fsl,pins = <
515*724ba675SRob Herring			MX6QDL_PAD_EIM_BCLK__GPIO6_IO31			0x0b0b1
516*724ba675SRob Herring		>;
517*724ba675SRob Herring	};
518*724ba675SRob Herring
519*724ba675SRob Herring	pinctrl_lvds_bl: lvdsbacklightgrp {
520*724ba675SRob Herring		fsl,pins = <
521*724ba675SRob Herring			MX6QDL_PAD_GPIO_9__PWM1_OUT			0x0b0b1
522*724ba675SRob Herring			MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09		0x0b0b1
523*724ba675SRob Herring		>;
524*724ba675SRob Herring	};
525*724ba675SRob Herring
526*724ba675SRob Herring	pinctrl_lvds_reg: lvdsreggrp {
527*724ba675SRob Herring		fsl,pins = <
528*724ba675SRob Herring			MX6QDL_PAD_SD4_CLK__GPIO7_IO10			0x0b0b1
529*724ba675SRob Herring		>;
530*724ba675SRob Herring	};
531*724ba675SRob Herring
532*724ba675SRob Herring
533*724ba675SRob Herring	pinctrl_nor_flash: norflashgrp {
534*724ba675SRob Herring		fsl,pins = <
535*724ba675SRob Herring			MX6QDL_PAD_NANDF_CS0__GPIO6_IO11		0x1b0b1
536*724ba675SRob Herring			MX6QDL_PAD_EIM_D21__ECSPI4_SCLK			0x100b1
537*724ba675SRob Herring			MX6QDL_PAD_EIM_D28__ECSPI4_MOSI			0x100b1
538*724ba675SRob Herring			MX6QDL_PAD_EIM_D22__ECSPI4_MISO			0x100b1
539*724ba675SRob Herring			MX6QDL_PAD_EIM_A25__GPIO5_IO02			0x100b1
540*724ba675SRob Herring		>;
541*724ba675SRob Herring	};
542*724ba675SRob Herring
543*724ba675SRob Herring	pinctrl_pcie_ctrl: pciegrp {
544*724ba675SRob Herring		fsl,pins = <
545*724ba675SRob Herring			MX6QDL_PAD_EIM_A16__GPIO2_IO22			0x1b0b1
546*724ba675SRob Herring			MX6QDL_PAD_GPIO_17__GPIO7_IO12			0x1b0b1
547*724ba675SRob Herring		>;
548*724ba675SRob Herring	};
549*724ba675SRob Herring
550*724ba675SRob Herring	pinctrl_pmic: pmicgrp {
551*724ba675SRob Herring		fsl,pins = <
552*724ba675SRob Herring			MX6QDL_PAD_SD4_DAT0__GPIO2_IO08			0x0b0b1
553*724ba675SRob Herring		>;
554*724ba675SRob Herring	};
555*724ba675SRob Herring
556*724ba675SRob Herring	pinctrl_pwm_fan: pwmfan {
557*724ba675SRob Herring		fsl,pins = <
558*724ba675SRob Herring			MX6QDL_PAD_SD4_DAT2__PWM4_OUT			0x0b0b1
559*724ba675SRob Herring		>;
560*724ba675SRob Herring	};
561*724ba675SRob Herring
562*724ba675SRob Herring	pinctrl_rgb_bl: rgbbacklightgrp {
563*724ba675SRob Herring		fsl,pins = <
564*724ba675SRob Herring			MX6QDL_PAD_SD4_DAT1__PWM3_OUT			0x0b0b1
565*724ba675SRob Herring			MX6QDL_PAD_NANDF_ALE__GPIO6_IO08		0x0b0b1
566*724ba675SRob Herring		>;
567*724ba675SRob Herring	};
568*724ba675SRob Herring
569*724ba675SRob Herring	pinctrl_rgb_bl_en: rgbenable {
570*724ba675SRob Herring		fsl,pins = <
571*724ba675SRob Herring			MX6QDL_PAD_SD4_CMD__GPIO7_IO09			0x0b0b1
572*724ba675SRob Herring		>;
573*724ba675SRob Herring	};
574*724ba675SRob Herring
575*724ba675SRob Herring	pinctrl_rgb24_display: rgbgrp {
576*724ba675SRob Herring		fsl,pins = <
577*724ba675SRob Herring			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
578*724ba675SRob Herring			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
579*724ba675SRob Herring			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
580*724ba675SRob Herring			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
581*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
582*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
583*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
584*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
585*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
586*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
587*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
588*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
589*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
590*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
591*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
592*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
593*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
594*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
595*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
596*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
597*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
598*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
599*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18  0x10
600*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19  0x10
601*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20  0x10
602*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21  0x10
603*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22  0x10
604*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23  0x10
605*724ba675SRob Herring		>;
606*724ba675SRob Herring	};
607*724ba675SRob Herring
608*724ba675SRob Herring	pinctrl_secure: securegrp {
609*724ba675SRob Herring		fsl,pins = <
610*724ba675SRob Herring			MX6QDL_PAD_GPIO_18__GPIO7_IO13			0x1b0b1
611*724ba675SRob Herring		>;
612*724ba675SRob Herring	};
613*724ba675SRob Herring
614*724ba675SRob Herring	pinctrl_som_leds: somledgrp {
615*724ba675SRob Herring		fsl,pins = <
616*724ba675SRob Herring			MX6QDL_PAD_EIM_DA0__GPIO3_IO00			0x0b0b1
617*724ba675SRob Herring			MX6QDL_PAD_EIM_DA1__GPIO3_IO01			0x0b0b1
618*724ba675SRob Herring		>;
619*724ba675SRob Herring	};
620*724ba675SRob Herring
621*724ba675SRob Herring	pinctrl_spdif_in: spdifin {
622*724ba675SRob Herring		fsl,pins = <
623*724ba675SRob Herring			MX6QDL_PAD_GPIO_16__SPDIF_IN			0x1b0b0
624*724ba675SRob Herring		>;
625*724ba675SRob Herring	};
626*724ba675SRob Herring
627*724ba675SRob Herring	pinctrl_spdif_out: spdifout {
628*724ba675SRob Herring		fsl,pins = <
629*724ba675SRob Herring			MX6QDL_PAD_GPIO_19__SPDIF_OUT			0x13091
630*724ba675SRob Herring		>;
631*724ba675SRob Herring	};
632*724ba675SRob Herring
633*724ba675SRob Herring	pinctrl_uart1: uart1grp {
634*724ba675SRob Herring		fsl,pins = <
635*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA	0x1b0b1
636*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA	0x1b0b1
637*724ba675SRob Herring		>;
638*724ba675SRob Herring	};
639*724ba675SRob Herring
640*724ba675SRob Herring	pinctrl_uart2: uart2grp {
641*724ba675SRob Herring		fsl,pins = <
642*724ba675SRob Herring			MX6QDL_PAD_SD4_DAT5__UART2_RTS_B		0x1b0b1
643*724ba675SRob Herring			MX6QDL_PAD_SD4_DAT6__UART2_CTS_B		0x1b0b1
644*724ba675SRob Herring			MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA		0x1b0b1
645*724ba675SRob Herring			MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA		0x1b0b1
646*724ba675SRob Herring		>;
647*724ba675SRob Herring	};
648*724ba675SRob Herring
649*724ba675SRob Herring	pinctrl_uart3: uart3grp {
650*724ba675SRob Herring		fsl,pins = <
651*724ba675SRob Herring			MX6QDL_PAD_EIM_D24__UART3_TX_DATA		0x1b0b1
652*724ba675SRob Herring			MX6QDL_PAD_EIM_D25__UART3_RX_DATA		0x1b0b1
653*724ba675SRob Herring		>;
654*724ba675SRob Herring	};
655*724ba675SRob Herring
656*724ba675SRob Herring	pinctrl_uart4: uart4grp {
657*724ba675SRob Herring		fsl,pins = <
658*724ba675SRob Herring			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA		0x1b0b1
659*724ba675SRob Herring			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA		0x1b0b1
660*724ba675SRob Herring		>;
661*724ba675SRob Herring	};
662*724ba675SRob Herring
663*724ba675SRob Herring	pinctrl_uart5: uart5grp {
664*724ba675SRob Herring		fsl,pins = <
665*724ba675SRob Herring			MX6QDL_PAD_KEY_COL1__UART5_TX_DATA		0x1b0b1
666*724ba675SRob Herring			MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA		0x1b0b1
667*724ba675SRob Herring		>;
668*724ba675SRob Herring	};
669*724ba675SRob Herring
670*724ba675SRob Herring	pinctrl_usb_host1: usbhgrp {
671*724ba675SRob Herring		fsl,pins = <
672*724ba675SRob Herring			MX6QDL_PAD_EIM_D31__USB_H1_PWR			0x1B058
673*724ba675SRob Herring			MX6QDL_PAD_EIM_D30__USB_H1_OC			0x1B058
674*724ba675SRob Herring		>;
675*724ba675SRob Herring	};
676*724ba675SRob Herring
677*724ba675SRob Herring	pinctrl_usb_otg: usbotggrp {
678*724ba675SRob Herring		fsl,pins = <
679*724ba675SRob Herring			MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID		0x17059
680*724ba675SRob Herring			MX6QDL_PAD_GPIO_7__GPIO1_IO07			0x17059
681*724ba675SRob Herring			MX6QDL_PAD_GPIO_8__GPIO1_IO08			0x17059
682*724ba675SRob Herring		>;
683*724ba675SRob Herring	};
684*724ba675SRob Herring
685*724ba675SRob Herring	pinctrl_usdhc1: usdhc1grp {
686*724ba675SRob Herring		fsl,pins = <
687*724ba675SRob Herring			MX6QDL_PAD_SD1_CMD__SD1_CMD			0x17059
688*724ba675SRob Herring			MX6QDL_PAD_SD1_CLK__SD1_CLK			0x10059
689*724ba675SRob Herring			MX6QDL_PAD_SD1_DAT0__SD1_DATA0			0x17059
690*724ba675SRob Herring			MX6QDL_PAD_SD1_DAT1__SD1_DATA1			0x17059
691*724ba675SRob Herring			MX6QDL_PAD_SD1_DAT2__SD1_DATA2			0x17059
692*724ba675SRob Herring			MX6QDL_PAD_SD1_DAT3__SD1_DATA3			0x17059
693*724ba675SRob Herring			MX6QDL_PAD_GPIO_1__SD1_CD_B			0x1b0b1
694*724ba675SRob Herring			MX6QDL_PAD_DI0_PIN4__SD1_WP			0x1b0b1
695*724ba675SRob Herring		>;
696*724ba675SRob Herring	};
697*724ba675SRob Herring
698*724ba675SRob Herring	pinctrl_usdhc2: usdhc2grp {
699*724ba675SRob Herring		fsl,pins = <
700*724ba675SRob Herring			MX6QDL_PAD_SD2_CMD__SD2_CMD			0x17059
701*724ba675SRob Herring			MX6QDL_PAD_SD2_CLK__SD2_CLK			0x10059
702*724ba675SRob Herring			MX6QDL_PAD_SD2_DAT0__SD2_DATA0			0x17059
703*724ba675SRob Herring			MX6QDL_PAD_SD2_DAT1__SD2_DATA1			0x17059
704*724ba675SRob Herring			MX6QDL_PAD_SD2_DAT2__SD2_DATA2			0x17059
705*724ba675SRob Herring			MX6QDL_PAD_SD2_DAT3__SD2_DATA3			0x17059
706*724ba675SRob Herring			MX6QDL_PAD_GPIO_4__SD2_CD_B			0x1b0b1
707*724ba675SRob Herring			MX6QDL_PAD_GPIO_2__SD2_WP			0x1b0b1
708*724ba675SRob Herring		>;
709*724ba675SRob Herring	};
710*724ba675SRob Herring
711*724ba675SRob Herring	pinctrl_usdhc3: usdhc3grp {
712*724ba675SRob Herring		fsl,pins = <
713*724ba675SRob Herring			MX6QDL_PAD_SD3_CMD__SD3_CMD			0x17059
714*724ba675SRob Herring			MX6QDL_PAD_SD3_CLK__SD3_CLK			0x10059
715*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT0__SD3_DATA0			0x17059
716*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT1__SD3_DATA1			0x17059
717*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT2__SD3_DATA2			0x17059
718*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT3__SD3_DATA3			0x17059
719*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT4__SD3_DATA4			0x17059
720*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT5__SD3_DATA5			0x17059
721*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT6__SD3_DATA6			0x17059
722*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT7__SD3_DATA7			0x17059
723*724ba675SRob Herring			MX6QDL_PAD_SD3_RST__SD3_RESET			0x1b0b1
724*724ba675SRob Herring		>;
725*724ba675SRob Herring	};
726*724ba675SRob Herring};
727*724ba675SRob Herring
728*724ba675SRob Herring&ipu1_di0_disp0 {
729*724ba675SRob Herring	remote-endpoint = <&rgb_encoder_in>;
730*724ba675SRob Herring};
731*724ba675SRob Herring
732*724ba675SRob Herring&pcie {
733*724ba675SRob Herring	pinctrl-names = "default";
734*724ba675SRob Herring	pinctrl-0 = <&pinctrl_pcie_ctrl>;
735*724ba675SRob Herring	reset-gpio = <&gpio7 12 GPIO_ACTIVE_LOW>;
736*724ba675SRob Herring	disable-gpio = <&gpio2 22 GPIO_ACTIVE_LOW>;
737*724ba675SRob Herring};
738*724ba675SRob Herring
739*724ba675SRob Herring&pwm1 {
740*724ba675SRob Herring	#pwm-cells = <2>;
741*724ba675SRob Herring	status = "okay";
742*724ba675SRob Herring};
743*724ba675SRob Herring
744*724ba675SRob Herring&pwm3 {
745*724ba675SRob Herring	#pwm-cells = <2>;
746*724ba675SRob Herring	status = "okay";
747*724ba675SRob Herring};
748*724ba675SRob Herring
749*724ba675SRob Herring&pwm4 {
750*724ba675SRob Herring	#pwm-cells = <2>;
751*724ba675SRob Herring	status = "okay";
752*724ba675SRob Herring};
753*724ba675SRob Herring
754*724ba675SRob Herring&uart1 {
755*724ba675SRob Herring	pinctrl-names = "default";
756*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart1>;
757*724ba675SRob Herring	status = "okay";
758*724ba675SRob Herring};
759*724ba675SRob Herring
760*724ba675SRob Herring&uart2 {
761*724ba675SRob Herring	pinctrl-names = "default";
762*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart2>;
763*724ba675SRob Herring};
764*724ba675SRob Herring
765*724ba675SRob Herring&uart3 {
766*724ba675SRob Herring	pinctrl-names = "default";
767*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart3>;
768*724ba675SRob Herring};
769*724ba675SRob Herring
770*724ba675SRob Herring&uart4 {
771*724ba675SRob Herring	pinctrl-names = "default";
772*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart4>;
773*724ba675SRob Herring};
774*724ba675SRob Herring
775*724ba675SRob Herring&uart5 {
776*724ba675SRob Herring	pinctrl-names = "default";
777*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart5>;
778*724ba675SRob Herring};
779*724ba675SRob Herring
780*724ba675SRob Herring&usbh1 {
781*724ba675SRob Herring	pinctrl-names = "default";
782*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usb_host1>;
783*724ba675SRob Herring};
784*724ba675SRob Herring
785*724ba675SRob Herring&usbotg {
786*724ba675SRob Herring	pinctrl-names = "default";
787*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usb_otg>;
788*724ba675SRob Herring	vbus-supply = <&reg_usb_otg>;
789*724ba675SRob Herring	dr_mode = "peripheral";
790*724ba675SRob Herring};
791*724ba675SRob Herring
792*724ba675SRob Herring&usdhc1 {
793*724ba675SRob Herring	pinctrl-names = "default";
794*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usdhc1>;
795*724ba675SRob Herring	fsl,wp-controller;
796*724ba675SRob Herring};
797*724ba675SRob Herring
798*724ba675SRob Herring&usdhc2 {
799*724ba675SRob Herring	pinctrl-names = "default";
800*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usdhc2>;
801*724ba675SRob Herring	fsl,wp-controller;
802*724ba675SRob Herring};
803*724ba675SRob Herring
804*724ba675SRob Herring&usdhc3 {
805*724ba675SRob Herring	pinctrl-names = "default";
806*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usdhc3>;
807*724ba675SRob Herring	non-removable;
808*724ba675SRob Herring	bus-width = <8>;
809*724ba675SRob Herring	status = "okay";
810*724ba675SRob Herring};
811*724ba675SRob Herring
812*724ba675SRob Herring/******device power Management*********/
813*724ba675SRob Herring
814*724ba675SRob Herring&cpu0 {
815*724ba675SRob Herring	voltage-tolerance = <2>;
816*724ba675SRob Herring};
817*724ba675SRob Herring
818*724ba675SRob Herring&reg_arm {
819*724ba675SRob Herring	vin-supply = <&vddcore_reg>;
820*724ba675SRob Herring};
821*724ba675SRob Herring
822*724ba675SRob Herring&reg_soc {
823*724ba675SRob Herring	vin-supply = <&vddsoc_reg>;
824*724ba675SRob Herring};
825*724ba675SRob Herring
826*724ba675SRob Herring&reg_pu {
827*724ba675SRob Herring	vin-supply = <&vddsoc_reg>;
828*724ba675SRob Herring};
829*724ba675SRob Herring
830*724ba675SRob Herring/*******Disabled HW following***********/
831*724ba675SRob Herring
832*724ba675SRob Herring&snvs_rtc {
833*724ba675SRob Herring	status = "disabled";
834*724ba675SRob Herring};
835