1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright (c) 2014 Protonic Holland 4724ba675SRob Herring */ 5724ba675SRob Herring 6724ba675SRob Herring/dts-v1/; 7724ba675SRob Herring#include "imx6q.dtsi" 8724ba675SRob Herring#include "imx6qdl-prti6q.dtsi" 9724ba675SRob Herring#include <dt-bindings/leds/common.h> 10724ba675SRob Herring#include <dt-bindings/sound/fsl-imx-audmux.h> 11724ba675SRob Herring 12724ba675SRob Herring/ { 13724ba675SRob Herring model = "Protonic PRTI6Q board"; 14724ba675SRob Herring compatible = "prt,prti6q", "fsl,imx6q"; 15724ba675SRob Herring 16724ba675SRob Herring memory@10000000 { 17724ba675SRob Herring device_type = "memory"; 18724ba675SRob Herring reg = <0x10000000 0xf0000000>; 19724ba675SRob Herring }; 20724ba675SRob Herring 21724ba675SRob Herring backlight_lcd: backlight-lcd { 22724ba675SRob Herring compatible = "pwm-backlight"; 23724ba675SRob Herring pinctrl-names = "default"; 24724ba675SRob Herring pinctrl-0 = <&pinctrl_backlight>; 25600c98d0SUwe Kleine-König pwms = <&pwm1 0 5000000 0>; 26724ba675SRob Herring brightness-levels = <0 16 64 255>; 27724ba675SRob Herring num-interpolated-steps = <16>; 28724ba675SRob Herring default-brightness-level = <1>; 29724ba675SRob Herring power-supply = <®_3v3>; 30724ba675SRob Herring enable-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; 31724ba675SRob Herring }; 32724ba675SRob Herring 33724ba675SRob Herring can_osc: can-osc { 34724ba675SRob Herring compatible = "fixed-clock"; 35724ba675SRob Herring #clock-cells = <0>; 36724ba675SRob Herring clock-frequency = <25000000>; 37724ba675SRob Herring }; 38724ba675SRob Herring 39724ba675SRob Herring leds { 40724ba675SRob Herring compatible = "gpio-leds"; 41724ba675SRob Herring pinctrl-names = "default"; 42724ba675SRob Herring pinctrl-0 = <&pinctrl_leds>; 43724ba675SRob Herring 44724ba675SRob Herring led-debug0 { 45724ba675SRob Herring function = LED_FUNCTION_STATUS; 46724ba675SRob Herring gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 47724ba675SRob Herring linux,default-trigger = "heartbeat"; 48724ba675SRob Herring }; 49724ba675SRob Herring 50724ba675SRob Herring led-debug1 { 51724ba675SRob Herring function = LED_FUNCTION_SD; 52724ba675SRob Herring gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>; 53724ba675SRob Herring linux,default-trigger = "disk-activity"; 54724ba675SRob Herring }; 55724ba675SRob Herring }; 56724ba675SRob Herring 57724ba675SRob Herring panel { 58724ba675SRob Herring compatible = "kyo,tcg121xglp"; 59724ba675SRob Herring backlight = <&backlight_lcd>; 60724ba675SRob Herring 61724ba675SRob Herring port { 62724ba675SRob Herring panel_in: endpoint { 63724ba675SRob Herring remote-endpoint = <&lvds0_out>; 64724ba675SRob Herring }; 65724ba675SRob Herring }; 66724ba675SRob Herring }; 67724ba675SRob Herring 68724ba675SRob Herring reg_1v8: regulator-1v8 { 69724ba675SRob Herring compatible = "regulator-fixed"; 70724ba675SRob Herring regulator-name = "1v8"; 71724ba675SRob Herring regulator-min-microvolt = <1800000>; 72724ba675SRob Herring regulator-max-microvolt = <1800000>; 73724ba675SRob Herring }; 74724ba675SRob Herring 75724ba675SRob Herring reg_wifi: regulator-wifi { 76724ba675SRob Herring compatible = "regulator-fixed"; 77724ba675SRob Herring pinctrl-names = "default"; 78724ba675SRob Herring pinctrl-0 = <&pinctrl_wifi_npd>; 79724ba675SRob Herring enable-active-high; 80724ba675SRob Herring gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>; 81724ba675SRob Herring regulator-max-microvolt = <1800000>; 82724ba675SRob Herring regulator-min-microvolt = <1800000>; 83724ba675SRob Herring regulator-name = "regulator-WL12xx"; 84724ba675SRob Herring startup-delay-us = <70000>; 85724ba675SRob Herring }; 86724ba675SRob Herring 87724ba675SRob Herring sound { 88724ba675SRob Herring compatible = "simple-audio-card"; 89724ba675SRob Herring simple-audio-card,name = "prti6q-sgtl5000"; 90724ba675SRob Herring simple-audio-card,format = "i2s"; 91724ba675SRob Herring simple-audio-card,widgets = 92724ba675SRob Herring "Microphone", "Microphone Jack", 93724ba675SRob Herring "Line", "Line In Jack", 94724ba675SRob Herring "Headphone", "Headphone Jack", 95724ba675SRob Herring "Speaker", "External Speaker"; 96724ba675SRob Herring simple-audio-card,routing = 97724ba675SRob Herring "MIC_IN", "Microphone Jack", 98724ba675SRob Herring "LINE_IN", "Line In Jack", 99724ba675SRob Herring "Headphone Jack", "HP_OUT", 100724ba675SRob Herring "External Speaker", "LINE_OUT"; 101724ba675SRob Herring 102724ba675SRob Herring simple-audio-card,cpu { 103724ba675SRob Herring sound-dai = <&ssi1>; 104724ba675SRob Herring system-clock-frequency = <0>; 105724ba675SRob Herring }; 106724ba675SRob Herring 107724ba675SRob Herring simple-audio-card,codec { 108724ba675SRob Herring sound-dai = <&sgtl5000>; 109724ba675SRob Herring bitclock-master; 110724ba675SRob Herring frame-master; 111724ba675SRob Herring }; 112724ba675SRob Herring }; 113724ba675SRob Herring 114*d469b771SElinor Montmasson spdif_out: spdif-out { 115*d469b771SElinor Montmasson compatible = "linux,spdif-dit"; 116*d469b771SElinor Montmasson #sound-dai-cells = <0>; 117*d469b771SElinor Montmasson }; 118*d469b771SElinor Montmasson 119*d469b771SElinor Montmasson spdif_in: spdif-in { 120*d469b771SElinor Montmasson compatible = "linux,spdif-dir"; 121*d469b771SElinor Montmasson #sound-dai-cells = <0>; 122*d469b771SElinor Montmasson }; 123*d469b771SElinor Montmasson 124724ba675SRob Herring sound-spdif { 125724ba675SRob Herring compatible = "fsl,imx-audio-spdif"; 126724ba675SRob Herring model = "imx-spdif"; 127*d469b771SElinor Montmasson audio-cpu = <&spdif>; 128*d469b771SElinor Montmasson audio-codec = <&spdif_out>, <&spdif_in>; 129724ba675SRob Herring }; 130724ba675SRob Herring}; 131724ba675SRob Herring 132724ba675SRob Herring&audmux { 133724ba675SRob Herring pinctrl-names = "default"; 134724ba675SRob Herring pinctrl-0 = <&pinctrl_audmux>; 135724ba675SRob Herring status = "okay"; 136724ba675SRob Herring 137724ba675SRob Herring mux-ssi1 { 138724ba675SRob Herring fsl,audmux-port = <0>; 139724ba675SRob Herring fsl,port-config = < 140724ba675SRob Herring IMX_AUDMUX_V2_PTCR_SYN 0 141724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TFSEL(2) 0 142724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TCSEL(2) 0 143724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TFSDIR 0 144724ba675SRob Herring IMX_AUDMUX_V2_PTCR_TCLKDIR IMX_AUDMUX_V2_PDCR_RXDSEL(2) 145724ba675SRob Herring >; 146724ba675SRob Herring }; 147724ba675SRob Herring 148724ba675SRob Herring mux-pins3 { 149724ba675SRob Herring fsl,audmux-port = <2>; 150724ba675SRob Herring fsl,port-config = < 151724ba675SRob Herring IMX_AUDMUX_V2_PTCR_SYN IMX_AUDMUX_V2_PDCR_RXDSEL(0) 152724ba675SRob Herring 0 IMX_AUDMUX_V2_PDCR_TXRXEN 153724ba675SRob Herring >; 154724ba675SRob Herring }; 155724ba675SRob Herring}; 156724ba675SRob Herring 157724ba675SRob Herring&can1 { 158724ba675SRob Herring pinctrl-names = "default"; 159724ba675SRob Herring pinctrl-0 = <&pinctrl_can1>; 160724ba675SRob Herring status = "okay"; 161724ba675SRob Herring}; 162724ba675SRob Herring 163724ba675SRob Herring&can2 { 164724ba675SRob Herring pinctrl-names = "default"; 165724ba675SRob Herring pinctrl-0 = <&pinctrl_can2>; 166724ba675SRob Herring status = "okay"; 167724ba675SRob Herring}; 168724ba675SRob Herring 169724ba675SRob Herring&ecspi1 { 170724ba675SRob Herring cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; 171724ba675SRob Herring pinctrl-names = "default"; 172724ba675SRob Herring pinctrl-0 = <&pinctrl_ecspi1>; 173724ba675SRob Herring status = "okay"; 174724ba675SRob Herring 175724ba675SRob Herring flash@0 { 176724ba675SRob Herring compatible = "jedec,spi-nor"; 177724ba675SRob Herring reg = <0>; 178724ba675SRob Herring spi-max-frequency = <20000000>; 179724ba675SRob Herring }; 180724ba675SRob Herring}; 181724ba675SRob Herring 182724ba675SRob Herring&ecspi2 { 183724ba675SRob Herring cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>, <&gpio4 25 GPIO_ACTIVE_LOW>; 184724ba675SRob Herring pinctrl-names = "default"; 185724ba675SRob Herring pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs>; 186724ba675SRob Herring status = "okay"; 187724ba675SRob Herring 188724ba675SRob Herring can@0 { 189724ba675SRob Herring compatible = "microchip,mcp2515"; 190724ba675SRob Herring reg = <0>; 191724ba675SRob Herring pinctrl-names = "default"; 192724ba675SRob Herring pinctrl-0 = <&pinctrl_can3>; 193724ba675SRob Herring clocks = <&can_osc>; 194724ba675SRob Herring interrupts-extended = <&gpio3 20 IRQ_TYPE_LEVEL_LOW>; 195724ba675SRob Herring spi-max-frequency = <5000000>; 196724ba675SRob Herring }; 197724ba675SRob Herring 198724ba675SRob Herring adc@1 { 199724ba675SRob Herring compatible = "ti,adc128s052"; 200724ba675SRob Herring reg = <1>; 201724ba675SRob Herring spi-max-frequency = <2000000>; 202724ba675SRob Herring vref-supply = <®_3v3>; 203724ba675SRob Herring }; 204724ba675SRob Herring}; 205724ba675SRob Herring 206724ba675SRob Herring&ecspi3 { 207724ba675SRob Herring cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; 208724ba675SRob Herring pinctrl-names = "default"; 209724ba675SRob Herring pinctrl-0 = <&pinctrl_ecspi3>; 210724ba675SRob Herring status = "okay"; 211724ba675SRob Herring}; 212724ba675SRob Herring 213724ba675SRob Herring&fec { 214724ba675SRob Herring pinctrl-names = "default"; 215724ba675SRob Herring pinctrl-0 = <&pinctrl_enet>; 216724ba675SRob Herring phy-mode = "rgmii-id"; 217724ba675SRob Herring phy-handle = <&rgmii_phy>; 218724ba675SRob Herring status = "okay"; 219724ba675SRob Herring 220724ba675SRob Herring mdio { 221724ba675SRob Herring #address-cells = <1>; 222724ba675SRob Herring #size-cells = <0>; 223724ba675SRob Herring 224724ba675SRob Herring /* Microchip KSZ9031RNX PHY */ 225724ba675SRob Herring rgmii_phy: ethernet-phy@0 { 226724ba675SRob Herring reg = <0>; 227724ba675SRob Herring interrupts-extended = <&gpio1 28 IRQ_TYPE_LEVEL_LOW>; 228724ba675SRob Herring reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 229724ba675SRob Herring reset-assert-us = <10000>; 230724ba675SRob Herring reset-deassert-us = <300>; 231724ba675SRob Herring }; 232724ba675SRob Herring }; 233724ba675SRob Herring}; 234724ba675SRob Herring 235724ba675SRob Herring&hdmi { 236724ba675SRob Herring pinctrl-names = "default"; 237724ba675SRob Herring pinctrl-0 = <&pinctrl_hdmi>; 238724ba675SRob Herring ddc-i2c-bus = <&i2c2>; 239724ba675SRob Herring status = "okay"; 240724ba675SRob Herring}; 241724ba675SRob Herring 242724ba675SRob Herring&i2c1 { 243724ba675SRob Herring sgtl5000: audio-codec@a { 244724ba675SRob Herring compatible = "fsl,sgtl5000"; 245724ba675SRob Herring reg = <0xa>; 246724ba675SRob Herring #sound-dai-cells = <0>; 247724ba675SRob Herring clocks = <&clks 201>; 248724ba675SRob Herring VDDA-supply = <®_3v3>; 249724ba675SRob Herring VDDIO-supply = <®_3v3>; 250724ba675SRob Herring VDDD-supply = <®_1v8>; 251724ba675SRob Herring }; 252724ba675SRob Herring}; 253724ba675SRob Herring 254724ba675SRob Herring/* DDC */ 255724ba675SRob Herring&i2c2 { 256724ba675SRob Herring clock-frequency = <100000>; 257724ba675SRob Herring pinctrl-names = "default"; 258724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 259724ba675SRob Herring status = "okay"; 260724ba675SRob Herring}; 261724ba675SRob Herring 262724ba675SRob Herring&i2c3 { 263724ba675SRob Herring adc@49 { 264724ba675SRob Herring compatible = "ti,ads1015"; 265724ba675SRob Herring reg = <0x49>; 266724ba675SRob Herring #address-cells = <1>; 267724ba675SRob Herring #size-cells = <0>; 268724ba675SRob Herring 269724ba675SRob Herring /* can2_l */ 270724ba675SRob Herring channel@4 { 271724ba675SRob Herring reg = <4>; 272724ba675SRob Herring ti,gain = <3>; 273724ba675SRob Herring ti,datarate = <3>; 274724ba675SRob Herring }; 275724ba675SRob Herring 276724ba675SRob Herring /* can2_h */ 277724ba675SRob Herring channel@5 { 278724ba675SRob Herring reg = <5>; 279724ba675SRob Herring ti,gain = <3>; 280724ba675SRob Herring ti,datarate = <3>; 281724ba675SRob Herring }; 282724ba675SRob Herring 283724ba675SRob Herring /* can1_l */ 284724ba675SRob Herring channel@6 { 285724ba675SRob Herring reg = <6>; 286724ba675SRob Herring ti,gain = <3>; 287724ba675SRob Herring ti,datarate = <3>; 288724ba675SRob Herring }; 289724ba675SRob Herring 290724ba675SRob Herring /* can1_h */ 291724ba675SRob Herring channel@7 { 292724ba675SRob Herring reg = <7>; 293724ba675SRob Herring ti,gain = <3>; 294724ba675SRob Herring ti,datarate = <3>; 295724ba675SRob Herring }; 296724ba675SRob Herring }; 297724ba675SRob Herring}; 298724ba675SRob Herring 299724ba675SRob Herring&pcie { 300724ba675SRob Herring status = "okay"; 301724ba675SRob Herring}; 302724ba675SRob Herring 303724ba675SRob Herring&pwm1 { 304724ba675SRob Herring pinctrl-names = "default"; 305724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm1>; 306724ba675SRob Herring status = "okay"; 307724ba675SRob Herring}; 308724ba675SRob Herring 309724ba675SRob Herring&ldb { 310724ba675SRob Herring status = "okay"; 311724ba675SRob Herring 312724ba675SRob Herring lvds-channel@0 { 313724ba675SRob Herring status = "okay"; 314724ba675SRob Herring 315724ba675SRob Herring port@4 { 316724ba675SRob Herring reg = <4>; 317724ba675SRob Herring 318724ba675SRob Herring lvds0_out: endpoint { 319724ba675SRob Herring remote-endpoint = <&panel_in>; 320724ba675SRob Herring }; 321724ba675SRob Herring }; 322724ba675SRob Herring }; 323724ba675SRob Herring}; 324724ba675SRob Herring 325724ba675SRob Herring&sata { 326724ba675SRob Herring status = "okay"; 327724ba675SRob Herring}; 328724ba675SRob Herring 329724ba675SRob Herring&snvs_poweroff { 330724ba675SRob Herring status = "okay"; 331724ba675SRob Herring}; 332724ba675SRob Herring 333724ba675SRob Herring&spdif { 334724ba675SRob Herring pinctrl-names = "default"; 335724ba675SRob Herring pinctrl-0 = <&pinctrl_spdif>; 336724ba675SRob Herring status = "okay"; 337724ba675SRob Herring}; 338724ba675SRob Herring 339724ba675SRob Herring&ssi1 { 340724ba675SRob Herring #sound-dai-cells = <0>; 341724ba675SRob Herring fsl,mode = "ac97-slave"; 342724ba675SRob Herring status = "okay"; 343724ba675SRob Herring}; 344724ba675SRob Herring 345724ba675SRob Herring&uart2 { 346724ba675SRob Herring pinctrl-names = "default"; 347724ba675SRob Herring pinctrl-0 = <&pinctrl_uart2>; 348724ba675SRob Herring status = "okay"; 349724ba675SRob Herring}; 350724ba675SRob Herring 351724ba675SRob Herring&uart5 { 352724ba675SRob Herring pinctrl-names = "default"; 353724ba675SRob Herring pinctrl-0 = <&pinctrl_uart5>; 354724ba675SRob Herring status = "okay"; 355724ba675SRob Herring}; 356724ba675SRob Herring 357724ba675SRob Herring&usbotg { 358724ba675SRob Herring pinctrl-0 = <&pinctrl_usbotg &pinctrl_usbotg_id>; 359724ba675SRob Herring}; 360724ba675SRob Herring 361724ba675SRob Herring&usdhc2 { 362724ba675SRob Herring pinctrl-names = "default"; 363724ba675SRob Herring pinctrl-0 = <&pinctrl_usdhc2>; 364724ba675SRob Herring non-removable; 365724ba675SRob Herring vmmc-supply = <®_wifi>; 366724ba675SRob Herring cap-power-off-card; 367724ba675SRob Herring keep-power-in-suspend; 368724ba675SRob Herring status = "okay"; 369724ba675SRob Herring 370dad2a2fbSFabio Estevam #address-cells = <1>; 371dad2a2fbSFabio Estevam #size-cells = <0>; 372dad2a2fbSFabio Estevam wifi@2 { 373724ba675SRob Herring compatible = "ti,wl1271"; 374dad2a2fbSFabio Estevam reg = <2>; 375724ba675SRob Herring pinctrl-names = "default"; 376724ba675SRob Herring pinctrl-0 = <&pinctrl_wifi>; 377724ba675SRob Herring interrupts-extended = <&gpio1 30 IRQ_TYPE_LEVEL_HIGH>; 378724ba675SRob Herring ref-clock-frequency = <38400000>; 379724ba675SRob Herring tcxo-clock-frequency = <19200000>; 380724ba675SRob Herring }; 381724ba675SRob Herring}; 382724ba675SRob Herring 383724ba675SRob Herring&iomuxc { 384724ba675SRob Herring pinctrl_audmux: audmuxgrp { 385724ba675SRob Herring fsl,pins = < 386724ba675SRob Herring MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x030b0 387724ba675SRob Herring MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0 388724ba675SRob Herring MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0 389724ba675SRob Herring MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0 390724ba675SRob Herring MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0 391724ba675SRob Herring >; 392724ba675SRob Herring }; 393724ba675SRob Herring 394724ba675SRob Herring pinctrl_backlight: backlightgrp { 395724ba675SRob Herring fsl,pins = < 396724ba675SRob Herring MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x1b0b0 397724ba675SRob Herring >; 398724ba675SRob Herring }; 399724ba675SRob Herring 400724ba675SRob Herring pinctrl_can2: can2grp { 401724ba675SRob Herring fsl,pins = < 402724ba675SRob Herring MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b008 403724ba675SRob Herring MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b008 404724ba675SRob Herring >; 405724ba675SRob Herring }; 406724ba675SRob Herring 407724ba675SRob Herring pinctrl_can3: can3grp { 408724ba675SRob Herring fsl,pins = < 409724ba675SRob Herring MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x1b0b1 410724ba675SRob Herring >; 411724ba675SRob Herring }; 412724ba675SRob Herring 413724ba675SRob Herring pinctrl_ecspi1: ecspi1grp { 414724ba675SRob Herring fsl,pins = < 415724ba675SRob Herring MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 416724ba675SRob Herring MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 417724ba675SRob Herring MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 418724ba675SRob Herring /* CS */ 419724ba675SRob Herring MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 420724ba675SRob Herring >; 421724ba675SRob Herring }; 422724ba675SRob Herring 423724ba675SRob Herring pinctrl_ecspi2: ecspi2grp { 424724ba675SRob Herring fsl,pins = < 425724ba675SRob Herring MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1 426724ba675SRob Herring MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1 427724ba675SRob Herring MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1 428724ba675SRob Herring MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x000b1 429724ba675SRob Herring >; 430724ba675SRob Herring }; 431724ba675SRob Herring 432724ba675SRob Herring pinctrl_ecspi2_cs: ecspi2csgrp { 433724ba675SRob Herring fsl,pins = < 434724ba675SRob Herring /* ADC128S022 CS */ 435724ba675SRob Herring MX6QDL_PAD_DISP0_DAT4__GPIO4_IO25 0x1b0b1 436724ba675SRob Herring >; 437724ba675SRob Herring }; 438724ba675SRob Herring 439724ba675SRob Herring pinctrl_ecspi3: ecspi3grp { 440724ba675SRob Herring fsl,pins = < 441724ba675SRob Herring MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 442724ba675SRob Herring MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 443724ba675SRob Herring MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 444724ba675SRob Herring MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1 445724ba675SRob Herring >; 446724ba675SRob Herring }; 447724ba675SRob Herring 448724ba675SRob Herring pinctrl_enet: enetgrp { 449724ba675SRob Herring fsl,pins = < 450724ba675SRob Herring MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 451724ba675SRob Herring MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 452724ba675SRob Herring MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 453724ba675SRob Herring MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 454724ba675SRob Herring MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 455724ba675SRob Herring MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 456724ba675SRob Herring MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 457724ba675SRob Herring MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 458724ba675SRob Herring MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 459724ba675SRob Herring MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 460724ba675SRob Herring MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 461724ba675SRob Herring MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 462724ba675SRob Herring MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x10030 463724ba675SRob Herring MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x10030 464724ba675SRob Herring MX6QDL_PAD_ENET_MDC__ENET_MDC 0x10030 465724ba675SRob Herring 466724ba675SRob Herring /* Phy reset */ 467724ba675SRob Herring MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 468724ba675SRob Herring MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b1 469724ba675SRob Herring >; 470724ba675SRob Herring }; 471724ba675SRob Herring 472724ba675SRob Herring pinctrl_hdmi: hdmigrp { 473724ba675SRob Herring fsl,pins = < 474724ba675SRob Herring /* NOTE: DDC is done via I2C2, so DON'T 475724ba675SRob Herring * configure DDC pins for HDMI! 476724ba675SRob Herring */ 477724ba675SRob Herring MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0 478724ba675SRob Herring >; 479724ba675SRob Herring }; 480724ba675SRob Herring 481724ba675SRob Herring /* DDC */ 482724ba675SRob Herring pinctrl_i2c2: i2c2grp { 483724ba675SRob Herring fsl,pins = < 484724ba675SRob Herring MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 485724ba675SRob Herring MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 486724ba675SRob Herring >; 487724ba675SRob Herring }; 488724ba675SRob Herring 489724ba675SRob Herring pinctrl_leds: ledsgrp { 490724ba675SRob Herring fsl,pins = < 491724ba675SRob Herring MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 492724ba675SRob Herring MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0 493724ba675SRob Herring >; 494724ba675SRob Herring }; 495724ba675SRob Herring 496724ba675SRob Herring pinctrl_pwm1: pwm1grp { 497724ba675SRob Herring fsl,pins = < 498724ba675SRob Herring MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0 499724ba675SRob Herring >; 500724ba675SRob Herring }; 501724ba675SRob Herring 502724ba675SRob Herring pinctrl_spdif: spdifgrp { 503724ba675SRob Herring fsl,pins = < 504724ba675SRob Herring MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 505724ba675SRob Herring MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 506724ba675SRob Herring >; 507724ba675SRob Herring }; 508724ba675SRob Herring 509724ba675SRob Herring pinctrl_uart2: uart2grp { 510724ba675SRob Herring fsl,pins = < 511724ba675SRob Herring MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1 512724ba675SRob Herring MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1 513724ba675SRob Herring MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1 514724ba675SRob Herring MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1 515724ba675SRob Herring >; 516724ba675SRob Herring }; 517724ba675SRob Herring 518724ba675SRob Herring pinctrl_uart5: uart5grp { 519724ba675SRob Herring fsl,pins = < 520724ba675SRob Herring MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 521724ba675SRob Herring MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 522724ba675SRob Herring >; 523724ba675SRob Herring }; 524724ba675SRob Herring 525724ba675SRob Herring pinctrl_usbotg_id: usbotgidgrp { 526724ba675SRob Herring fsl,pins = < 527724ba675SRob Herring MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x1f058 528724ba675SRob Herring >; 529724ba675SRob Herring }; 530724ba675SRob Herring 531724ba675SRob Herring pinctrl_usdhc2: usdhc2grp { 532724ba675SRob Herring fsl,pins = < 533724ba675SRob Herring MX6QDL_PAD_SD2_CMD__SD2_CMD 0x170b9 534724ba675SRob Herring MX6QDL_PAD_SD2_CLK__SD2_CLK 0x100b9 535724ba675SRob Herring MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x170b9 536724ba675SRob Herring MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x170b9 537724ba675SRob Herring MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x170b9 538724ba675SRob Herring MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x170b9 539724ba675SRob Herring >; 540724ba675SRob Herring }; 541724ba675SRob Herring 542724ba675SRob Herring pinctrl_wifi: wifigrp { 543724ba675SRob Herring fsl,pins = < 544724ba675SRob Herring /* WL12xx IRQ */ 545724ba675SRob Herring MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x10880 546724ba675SRob Herring >; 547724ba675SRob Herring }; 548724ba675SRob Herring 549724ba675SRob Herring pinctrl_wifi_npd: wifinpdgrp { 550724ba675SRob Herring fsl,pins = < 551724ba675SRob Herring MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b8b0 552724ba675SRob Herring >; 553724ba675SRob Herring }; 554724ba675SRob Herring}; 555