xref: /linux/scripts/dtc/include-prefixes/arm/nxp/imx/imx6q-b850v3.dts (revision 79790b6818e96c58fe2bffee1b418c16e64e7b80)
1*724ba675SRob Herring/*
2*724ba675SRob Herring * Copyright 2015 Timesys Corporation.
3*724ba675SRob Herring * Copyright 2015 General Electric Company
4*724ba675SRob Herring *
5*724ba675SRob Herring * This file is dual-licensed: you can use it either under the terms
6*724ba675SRob Herring * of the GPL or the X11 license, at your option. Note that this dual
7*724ba675SRob Herring * licensing only applies to this file, and not this project as a
8*724ba675SRob Herring * whole.
9*724ba675SRob Herring *
10*724ba675SRob Herring *  a) This file is free software; you can redistribute it and/or
11*724ba675SRob Herring *     modify it under the terms of the GNU General Public License
12*724ba675SRob Herring *     version 2 as published by the Free Software Foundation.
13*724ba675SRob Herring *
14*724ba675SRob Herring *     This file is distributed in the hope that it will be useful,
15*724ba675SRob Herring *     but WITHOUT ANY WARRANTY; without even the implied warranty of
16*724ba675SRob Herring *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17*724ba675SRob Herring *     GNU General Public License for more details.
18*724ba675SRob Herring *
19*724ba675SRob Herring * Or, alternatively,
20*724ba675SRob Herring *
21*724ba675SRob Herring *  b) Permission is hereby granted, free of charge, to any person
22*724ba675SRob Herring *     obtaining a copy of this software and associated documentation
23*724ba675SRob Herring *     files (the "Software"), to deal in the Software without
24*724ba675SRob Herring *     restriction, including without limitation the rights to use,
25*724ba675SRob Herring *     copy, modify, merge, publish, distribute, sublicense, and/or
26*724ba675SRob Herring *     sell copies of the Software, and to permit persons to whom the
27*724ba675SRob Herring *     Software is furnished to do so, subject to the following
28*724ba675SRob Herring *     conditions:
29*724ba675SRob Herring *
30*724ba675SRob Herring *     The above copyright notice and this permission notice shall be
31*724ba675SRob Herring *     included in all copies or substantial portions of the Software.
32*724ba675SRob Herring *
33*724ba675SRob Herring *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34*724ba675SRob Herring *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35*724ba675SRob Herring *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36*724ba675SRob Herring *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37*724ba675SRob Herring *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38*724ba675SRob Herring *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39*724ba675SRob Herring *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40*724ba675SRob Herring *     OTHER DEALINGS IN THE SOFTWARE.
41*724ba675SRob Herring */
42*724ba675SRob Herring
43*724ba675SRob Herring/dts-v1/;
44*724ba675SRob Herring
45*724ba675SRob Herring#include "imx6q-bx50v3.dtsi"
46*724ba675SRob Herring
47*724ba675SRob Herring/ {
48*724ba675SRob Herring	model = "General Electric B850v3";
49*724ba675SRob Herring	compatible = "ge,imx6q-b850v3", "advantech,imx6q-ba16", "fsl,imx6q";
50*724ba675SRob Herring
51*724ba675SRob Herring	chosen {
52*724ba675SRob Herring		stdout-path = &uart3;
53*724ba675SRob Herring	};
54*724ba675SRob Herring};
55*724ba675SRob Herring
56*724ba675SRob Herring&ldb {
57*724ba675SRob Herring	fsl,dual-channel;
58*724ba675SRob Herring	status = "okay";
59*724ba675SRob Herring
60*724ba675SRob Herring	lvds0: lvds-channel@0 {
61*724ba675SRob Herring		fsl,data-mapping = "spwg";
62*724ba675SRob Herring		fsl,data-width = <24>;
63*724ba675SRob Herring		status = "okay";
64*724ba675SRob Herring
65*724ba675SRob Herring		port@4 {
66*724ba675SRob Herring			reg = <4>;
67*724ba675SRob Herring
68*724ba675SRob Herring			lvds0_out: endpoint {
69*724ba675SRob Herring				remote-endpoint = <&stdp4028_in>;
70*724ba675SRob Herring			};
71*724ba675SRob Herring		};
72*724ba675SRob Herring	};
73*724ba675SRob Herring};
74*724ba675SRob Herring
75*724ba675SRob Herring&i2c2 {
76*724ba675SRob Herring	pca9547_ddc: mux@70 {
77*724ba675SRob Herring		compatible = "nxp,pca9547";
78*724ba675SRob Herring		reg = <0x70>;
79*724ba675SRob Herring		#address-cells = <1>;
80*724ba675SRob Herring		#size-cells = <0>;
81*724ba675SRob Herring
82*724ba675SRob Herring		mux2_i2c1: i2c@0 {
83*724ba675SRob Herring			#address-cells = <1>;
84*724ba675SRob Herring			#size-cells = <0>;
85*724ba675SRob Herring			reg = <0x0>;
86*724ba675SRob Herring		};
87*724ba675SRob Herring
88*724ba675SRob Herring		mux2_i2c2: i2c@1 {
89*724ba675SRob Herring			#address-cells = <1>;
90*724ba675SRob Herring			#size-cells = <0>;
91*724ba675SRob Herring			reg = <0x1>;
92*724ba675SRob Herring		};
93*724ba675SRob Herring
94*724ba675SRob Herring		mux2_i2c3: i2c@2 {
95*724ba675SRob Herring			#address-cells = <1>;
96*724ba675SRob Herring			#size-cells = <0>;
97*724ba675SRob Herring			reg = <0x2>;
98*724ba675SRob Herring		};
99*724ba675SRob Herring
100*724ba675SRob Herring		mux2_i2c4: i2c@3 {
101*724ba675SRob Herring			#address-cells = <1>;
102*724ba675SRob Herring			#size-cells = <0>;
103*724ba675SRob Herring			reg = <0x3>;
104*724ba675SRob Herring		};
105*724ba675SRob Herring
106*724ba675SRob Herring		mux2_i2c5: i2c@4 {
107*724ba675SRob Herring			#address-cells = <1>;
108*724ba675SRob Herring			#size-cells = <0>;
109*724ba675SRob Herring			reg = <0x4>;
110*724ba675SRob Herring		};
111*724ba675SRob Herring
112*724ba675SRob Herring		mux2_i2c6: i2c@5 {
113*724ba675SRob Herring			#address-cells = <1>;
114*724ba675SRob Herring			#size-cells = <0>;
115*724ba675SRob Herring			reg = <0x5>;
116*724ba675SRob Herring		};
117*724ba675SRob Herring
118*724ba675SRob Herring		mux2_i2c7: i2c@6 {
119*724ba675SRob Herring			#address-cells = <1>;
120*724ba675SRob Herring			#size-cells = <0>;
121*724ba675SRob Herring			reg = <0x6>;
122*724ba675SRob Herring		};
123*724ba675SRob Herring
124*724ba675SRob Herring		mux2_i2c8: i2c@7 {
125*724ba675SRob Herring			#address-cells = <1>;
126*724ba675SRob Herring			#size-cells = <0>;
127*724ba675SRob Herring			reg = <0x7>;
128*724ba675SRob Herring		};
129*724ba675SRob Herring	};
130*724ba675SRob Herring};
131*724ba675SRob Herring
132*724ba675SRob Herring&hdmi {
133*724ba675SRob Herring	ddc-i2c-bus = <&mux2_i2c1>;
134*724ba675SRob Herring};
135*724ba675SRob Herring
136*724ba675SRob Herring&mux1_i2c1 {
137*724ba675SRob Herring	ads7830@4a {
138*724ba675SRob Herring		compatible = "ti,ads7830";
139*724ba675SRob Herring		reg = <0x4a>;
140*724ba675SRob Herring	};
141*724ba675SRob Herring};
142*724ba675SRob Herring
143*724ba675SRob Herring&mux2_i2c2 {
144*724ba675SRob Herring	clock-frequency = <100000>;
145*724ba675SRob Herring
146*724ba675SRob Herring	stdp2690@72 {
147*724ba675SRob Herring		compatible = "megachips,stdp2690-ge-b850v3-fw";
148*724ba675SRob Herring		reg = <0x72>;
149*724ba675SRob Herring
150*724ba675SRob Herring		ports {
151*724ba675SRob Herring			#address-cells = <1>;
152*724ba675SRob Herring			#size-cells = <0>;
153*724ba675SRob Herring
154*724ba675SRob Herring			port@0 {
155*724ba675SRob Herring				reg = <0>;
156*724ba675SRob Herring
157*724ba675SRob Herring				stdp2690_in: endpoint {
158*724ba675SRob Herring					remote-endpoint = <&stdp4028_out>;
159*724ba675SRob Herring				};
160*724ba675SRob Herring			};
161*724ba675SRob Herring
162*724ba675SRob Herring			port@1 {
163*724ba675SRob Herring				reg = <1>;
164*724ba675SRob Herring
165*724ba675SRob Herring				stdp2690_out: endpoint {
166*724ba675SRob Herring					/* Connector for external display */
167*724ba675SRob Herring				};
168*724ba675SRob Herring			};
169*724ba675SRob Herring		};
170*724ba675SRob Herring	};
171*724ba675SRob Herring
172*724ba675SRob Herring	stdp4028@73 {
173*724ba675SRob Herring		compatible = "megachips,stdp4028-ge-b850v3-fw";
174*724ba675SRob Herring		reg = <0x73>;
175*724ba675SRob Herring		interrupt-parent = <&gpio2>;
176*724ba675SRob Herring		interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
177*724ba675SRob Herring
178*724ba675SRob Herring		ports {
179*724ba675SRob Herring			#address-cells = <1>;
180*724ba675SRob Herring			#size-cells = <0>;
181*724ba675SRob Herring
182*724ba675SRob Herring			port@0 {
183*724ba675SRob Herring				reg = <0>;
184*724ba675SRob Herring
185*724ba675SRob Herring				stdp4028_in: endpoint {
186*724ba675SRob Herring					remote-endpoint = <&lvds0_out>;
187*724ba675SRob Herring				};
188*724ba675SRob Herring			};
189*724ba675SRob Herring
190*724ba675SRob Herring			port@1 {
191*724ba675SRob Herring				reg = <1>;
192*724ba675SRob Herring
193*724ba675SRob Herring				stdp4028_out: endpoint {
194*724ba675SRob Herring					remote-endpoint = <&stdp2690_in>;
195*724ba675SRob Herring				};
196*724ba675SRob Herring			};
197*724ba675SRob Herring		};
198*724ba675SRob Herring	};
199*724ba675SRob Herring};
200*724ba675SRob Herring
201*724ba675SRob Herring&pca9539 {
202*724ba675SRob Herring	gpio-line-names = "AMB_P_INT1#", "AMB_P_INT2#", "BT_EN", "WLAN_EN",
203*724ba675SRob Herring			  "REMOTE_ON_PML#", "SM_D_ACT", "DP1_RST#", "DP2_RST#",
204*724ba675SRob Herring			  "", "", "", "",
205*724ba675SRob Herring			  "", "", "", "";
206*724ba675SRob Herring
207*724ba675SRob Herring	P10-hog {
208*724ba675SRob Herring		gpio-hog;
209*724ba675SRob Herring		gpios = <8 0>;
210*724ba675SRob Herring		output-low;
211*724ba675SRob Herring		line-name = "PCA9539-P10";
212*724ba675SRob Herring	};
213*724ba675SRob Herring
214*724ba675SRob Herring	P11-hog {
215*724ba675SRob Herring		gpio-hog;
216*724ba675SRob Herring		gpios = <9 0>;
217*724ba675SRob Herring		output-low;
218*724ba675SRob Herring		line-name = "PCA9539-P11";
219*724ba675SRob Herring	};
220*724ba675SRob Herring};
221*724ba675SRob Herring
222*724ba675SRob Herring&pci_root {
223*724ba675SRob Herring	/* PLX Technology, Inc. PEX 8605 PCI Express 4-port Gen2 Switch */
224*724ba675SRob Herring	bridge@1,0 {
225*724ba675SRob Herring		compatible = "pci10b5,8605";
226*724ba675SRob Herring		reg = <0x00010000 0 0 0 0>;
227*724ba675SRob Herring
228*724ba675SRob Herring		#address-cells = <3>;
229*724ba675SRob Herring		#size-cells = <2>;
230*724ba675SRob Herring
231*724ba675SRob Herring		bridge@2,1 {
232*724ba675SRob Herring			compatible = "pci10b5,8605";
233*724ba675SRob Herring			reg = <0x00020800 0 0 0 0>;
234*724ba675SRob Herring
235*724ba675SRob Herring			#address-cells = <3>;
236*724ba675SRob Herring			#size-cells = <2>;
237*724ba675SRob Herring
238*724ba675SRob Herring			/* Intel Corporation I210 Gigabit Network Connection */
239*724ba675SRob Herring			ethernet@3,0 {
240*724ba675SRob Herring				compatible = "pci8086,1533";
241*724ba675SRob Herring				reg = <0x00030000 0 0 0 0>;
242*724ba675SRob Herring			};
243*724ba675SRob Herring		};
244*724ba675SRob Herring
245*724ba675SRob Herring		bridge@2,2 {
246*724ba675SRob Herring			compatible = "pci10b5,8605";
247*724ba675SRob Herring			reg = <0x00021000 0 0 0 0>;
248*724ba675SRob Herring
249*724ba675SRob Herring			#address-cells = <3>;
250*724ba675SRob Herring			#size-cells = <2>;
251*724ba675SRob Herring
252*724ba675SRob Herring			/* Intel Corporation I210 Gigabit Network Connection */
253*724ba675SRob Herring			switch_nic: ethernet@4,0 {
254*724ba675SRob Herring				compatible = "pci8086,1533";
255*724ba675SRob Herring				reg = <0x00040000 0 0 0 0>;
256*724ba675SRob Herring			};
257*724ba675SRob Herring		};
258*724ba675SRob Herring	};
259*724ba675SRob Herring};
260*724ba675SRob Herring
261*724ba675SRob Herring&switch_ports {
262*724ba675SRob Herring	port@0 {
263*724ba675SRob Herring		reg = <0>;
264*724ba675SRob Herring		label = "eneport1";
265*724ba675SRob Herring		phy-handle = <&switchphy0>;
266*724ba675SRob Herring	};
267*724ba675SRob Herring
268*724ba675SRob Herring	port@1 {
269*724ba675SRob Herring		reg = <1>;
270*724ba675SRob Herring		label = "eneport2";
271*724ba675SRob Herring		phy-handle = <&switchphy1>;
272*724ba675SRob Herring	};
273*724ba675SRob Herring
274*724ba675SRob Herring	port@2 {
275*724ba675SRob Herring		reg = <2>;
276*724ba675SRob Herring		label = "enix";
277*724ba675SRob Herring		phy-handle = <&switchphy2>;
278*724ba675SRob Herring	};
279*724ba675SRob Herring
280*724ba675SRob Herring	port@3 {
281*724ba675SRob Herring		reg = <3>;
282*724ba675SRob Herring		label = "enid";
283*724ba675SRob Herring		phy-handle = <&switchphy3>;
284*724ba675SRob Herring	};
285*724ba675SRob Herring
286*724ba675SRob Herring	port@4 {
287*724ba675SRob Herring		reg = <4>;
288*724ba675SRob Herring		label = "cpu";
289*724ba675SRob Herring		ethernet = <&switch_nic>;
290*724ba675SRob Herring		phy-handle = <&switchphy4>;
291*724ba675SRob Herring	};
292*724ba675SRob Herring};
293