xref: /linux/scripts/dtc/include-prefixes/arm/nxp/imx/imx6q-apalis-eval-v1.2.dts (revision 79790b6818e96c58fe2bffee1b418c16e64e7b80)
1*5ec35a64SHiago De Franco// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2*5ec35a64SHiago De Franco/*
3*5ec35a64SHiago De Franco * Copyright 2024 Toradex
4*5ec35a64SHiago De Franco */
5*5ec35a64SHiago De Franco
6*5ec35a64SHiago De Franco/dts-v1/;
7*5ec35a64SHiago De Franco
8*5ec35a64SHiago De Franco#include "imx6q-apalis-eval.dtsi"
9*5ec35a64SHiago De Franco
10*5ec35a64SHiago De Franco/ {
11*5ec35a64SHiago De Franco	model = "Toradex Apalis iMX6Q/D Module on Apalis Evaluation Board v1.2";
12*5ec35a64SHiago De Franco	compatible = "toradex,apalis_imx6q-eval-v1.2", "toradex,apalis_imx6q",
13*5ec35a64SHiago De Franco		     "fsl,imx6q";
14*5ec35a64SHiago De Franco
15*5ec35a64SHiago De Franco	reg_3v3_mmc: regulator-3v3-mmc {
16*5ec35a64SHiago De Franco		compatible = "regulator-fixed";
17*5ec35a64SHiago De Franco		enable-active-high;
18*5ec35a64SHiago De Franco		gpio = <&gpio2 0 GPIO_ACTIVE_HIGH>;
19*5ec35a64SHiago De Franco		off-on-delay-us = <100000>;
20*5ec35a64SHiago De Franco		pinctrl-names = "default";
21*5ec35a64SHiago De Franco		pinctrl-0 = <&pinctrl_enable_3v3_mmc>;
22*5ec35a64SHiago De Franco		regulator-max-microvolt = <3300000>;
23*5ec35a64SHiago De Franco		regulator-min-microvolt = <3300000>;
24*5ec35a64SHiago De Franco		regulator-name = "3.3V_MMC";
25*5ec35a64SHiago De Franco		startup-delay-us = <10000>;
26*5ec35a64SHiago De Franco	};
27*5ec35a64SHiago De Franco
28*5ec35a64SHiago De Franco	reg_3v3_sd: regulator-3v3-sd {
29*5ec35a64SHiago De Franco		compatible = "regulator-fixed";
30*5ec35a64SHiago De Franco		enable-active-high;
31*5ec35a64SHiago De Franco		gpio = <&gpio2 1 GPIO_ACTIVE_HIGH>;
32*5ec35a64SHiago De Franco		off-on-delay-us = <100000>;
33*5ec35a64SHiago De Franco		pinctrl-names = "default";
34*5ec35a64SHiago De Franco		pinctrl-0 = <&pinctrl_enable_3v3_sd>;
35*5ec35a64SHiago De Franco		regulator-max-microvolt = <3300000>;
36*5ec35a64SHiago De Franco		regulator-min-microvolt = <3300000>;
37*5ec35a64SHiago De Franco		regulator-name = "3.3V_SD";
38*5ec35a64SHiago De Franco		startup-delay-us = <10000>;
39*5ec35a64SHiago De Franco	};
40*5ec35a64SHiago De Franco
41*5ec35a64SHiago De Franco	reg_can1: regulator-can1 {
42*5ec35a64SHiago De Franco		compatible = "regulator-fixed";
43*5ec35a64SHiago De Franco		enable-active-high;
44*5ec35a64SHiago De Franco		gpio = <&gpio2 3 GPIO_ACTIVE_HIGH>;
45*5ec35a64SHiago De Franco		pinctrl-names = "default";
46*5ec35a64SHiago De Franco		pinctrl-0 = <&pinctrl_enable_can1_power>;
47*5ec35a64SHiago De Franco		regulator-name = "5V_SW_CAN1";
48*5ec35a64SHiago De Franco		startup-delay-us = <10000>;
49*5ec35a64SHiago De Franco	};
50*5ec35a64SHiago De Franco
51*5ec35a64SHiago De Franco	reg_can2: regulator-can2 {
52*5ec35a64SHiago De Franco		compatible = "regulator-fixed";
53*5ec35a64SHiago De Franco		enable-active-high;
54*5ec35a64SHiago De Franco		gpio = <&gpio2 2 GPIO_ACTIVE_HIGH>;
55*5ec35a64SHiago De Franco		pinctrl-names = "default";
56*5ec35a64SHiago De Franco		pinctrl-0 = <&pinctrl_enable_can2_power>;
57*5ec35a64SHiago De Franco		regulator-name = "5V_SW_CAN2";
58*5ec35a64SHiago De Franco		startup-delay-us = <10000>;
59*5ec35a64SHiago De Franco	};
60*5ec35a64SHiago De Franco
61*5ec35a64SHiago De Franco	sound-carrier {
62*5ec35a64SHiago De Franco		compatible = "simple-audio-card";
63*5ec35a64SHiago De Franco		simple-audio-card,bitclock-master = <&codec_dai>;
64*5ec35a64SHiago De Franco		simple-audio-card,format = "i2s";
65*5ec35a64SHiago De Franco		simple-audio-card,frame-master = <&codec_dai>;
66*5ec35a64SHiago De Franco		simple-audio-card,name = "apalis-nau8822";
67*5ec35a64SHiago De Franco		simple-audio-card,routing =
68*5ec35a64SHiago De Franco			"Headphones", "LHP",
69*5ec35a64SHiago De Franco			"Headphones", "RHP",
70*5ec35a64SHiago De Franco			"Speaker", "LSPK",
71*5ec35a64SHiago De Franco			"Speaker", "RSPK",
72*5ec35a64SHiago De Franco			"Line Out", "AUXOUT1",
73*5ec35a64SHiago De Franco			"Line Out", "AUXOUT2",
74*5ec35a64SHiago De Franco			"LAUX", "Line In",
75*5ec35a64SHiago De Franco			"RAUX", "Line In",
76*5ec35a64SHiago De Franco			"LMICP", "Mic In",
77*5ec35a64SHiago De Franco			"RMICP", "Mic In";
78*5ec35a64SHiago De Franco		simple-audio-card,widgets =
79*5ec35a64SHiago De Franco			"Headphones", "Headphones",
80*5ec35a64SHiago De Franco			"Line Out", "Line Out",
81*5ec35a64SHiago De Franco			"Speaker", "Speaker",
82*5ec35a64SHiago De Franco			"Microphone", "Mic In",
83*5ec35a64SHiago De Franco			"Line", "Line In";
84*5ec35a64SHiago De Franco
85*5ec35a64SHiago De Franco		codec_dai: simple-audio-card,codec {
86*5ec35a64SHiago De Franco			sound-dai = <&nau8822_1a>;
87*5ec35a64SHiago De Franco			system-clock-frequency = <12288000>;
88*5ec35a64SHiago De Franco		};
89*5ec35a64SHiago De Franco
90*5ec35a64SHiago De Franco		simple-audio-card,cpu {
91*5ec35a64SHiago De Franco			sound-dai = <&ssi2>;
92*5ec35a64SHiago De Franco		};
93*5ec35a64SHiago De Franco	};
94*5ec35a64SHiago De Franco};
95*5ec35a64SHiago De Franco
96*5ec35a64SHiago De Franco&can1 {
97*5ec35a64SHiago De Franco	xceiver-supply = <&reg_can1>;
98*5ec35a64SHiago De Franco	status = "okay";
99*5ec35a64SHiago De Franco};
100*5ec35a64SHiago De Franco
101*5ec35a64SHiago De Franco&can2 {
102*5ec35a64SHiago De Franco	xceiver-supply = <&reg_can2>;
103*5ec35a64SHiago De Franco	status = "okay";
104*5ec35a64SHiago De Franco};
105*5ec35a64SHiago De Franco
106*5ec35a64SHiago De Franco/* I2C1_SDA/SCL on MXM3 209/211 */
107*5ec35a64SHiago De Franco&i2c1 {
108*5ec35a64SHiago De Franco	/* Audio Codec */
109*5ec35a64SHiago De Franco	nau8822_1a: audio-codec@1a {
110*5ec35a64SHiago De Franco		compatible = "nuvoton,nau8822";
111*5ec35a64SHiago De Franco		reg = <0x1a>;
112*5ec35a64SHiago De Franco		pinctrl-names = "default";
113*5ec35a64SHiago De Franco		pinctrl-0 = <&pinctrl_nau8822>;
114*5ec35a64SHiago De Franco		#sound-dai-cells = <0>;
115*5ec35a64SHiago De Franco	};
116*5ec35a64SHiago De Franco
117*5ec35a64SHiago De Franco	/* Current measurement into module VCC */
118*5ec35a64SHiago De Franco	hwmon@40 {
119*5ec35a64SHiago De Franco		compatible = "ti,ina219";
120*5ec35a64SHiago De Franco		reg = <0x40>;
121*5ec35a64SHiago De Franco		shunt-resistor = <5000>;
122*5ec35a64SHiago De Franco	};
123*5ec35a64SHiago De Franco
124*5ec35a64SHiago De Franco	/* Temperature Sensor */
125*5ec35a64SHiago De Franco	temperature-sensor@4f {
126*5ec35a64SHiago De Franco		compatible = "ti,tmp75c";
127*5ec35a64SHiago De Franco		reg = <0x4f>;
128*5ec35a64SHiago De Franco	};
129*5ec35a64SHiago De Franco
130*5ec35a64SHiago De Franco	/* EEPROM */
131*5ec35a64SHiago De Franco	eeprom@57 {
132*5ec35a64SHiago De Franco		compatible = "st,24c02", "atmel,24c02";
133*5ec35a64SHiago De Franco		reg = <0x57>;
134*5ec35a64SHiago De Franco		pagesize = <16>;
135*5ec35a64SHiago De Franco		size = <256>;
136*5ec35a64SHiago De Franco	};
137*5ec35a64SHiago De Franco};
138*5ec35a64SHiago De Franco
139*5ec35a64SHiago De Franco&pcie {
140*5ec35a64SHiago De Franco	status = "okay";
141*5ec35a64SHiago De Franco};
142*5ec35a64SHiago De Franco
143*5ec35a64SHiago De Franco&ssi2 {
144*5ec35a64SHiago De Franco	status = "okay";
145*5ec35a64SHiago De Franco};
146*5ec35a64SHiago De Franco
147*5ec35a64SHiago De Franco/* MMC1 */
148*5ec35a64SHiago De Franco&usdhc1 {
149*5ec35a64SHiago De Franco	bus-width = <4>;
150*5ec35a64SHiago De Franco	pinctrl-0 = <&pinctrl_usdhc1_4bit &pinctrl_mmc_cd>;
151*5ec35a64SHiago De Franco	vmmc-supply = <&reg_3v3_mmc>;
152*5ec35a64SHiago De Franco	status = "okay";
153*5ec35a64SHiago De Franco};
154*5ec35a64SHiago De Franco
155*5ec35a64SHiago De Franco/* SD1 */
156*5ec35a64SHiago De Franco&usdhc2 {
157*5ec35a64SHiago De Franco	cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
158*5ec35a64SHiago De Franco	pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>;
159*5ec35a64SHiago De Franco	vmmc-supply = <&reg_3v3_sd>;
160*5ec35a64SHiago De Franco	status = "okay";
161*5ec35a64SHiago De Franco};
162*5ec35a64SHiago De Franco
163*5ec35a64SHiago De Franco&iomuxc {
164*5ec35a64SHiago De Franco	pinctrl_enable_3v3_mmc: enable3v3mmcgrp {
165*5ec35a64SHiago De Franco		fsl,pins = <
166*5ec35a64SHiago De Franco			/* MMC1_PWR_CTRL */
167*5ec35a64SHiago De Franco			MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x1b0b0
168*5ec35a64SHiago De Franco		>;
169*5ec35a64SHiago De Franco	};
170*5ec35a64SHiago De Franco
171*5ec35a64SHiago De Franco	pinctrl_enable_3v3_sd: enable3v3sdgrp {
172*5ec35a64SHiago De Franco		fsl,pins = <
173*5ec35a64SHiago De Franco			/* SD1_PWR_CTRL */
174*5ec35a64SHiago De Franco			MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
175*5ec35a64SHiago De Franco		>;
176*5ec35a64SHiago De Franco	};
177*5ec35a64SHiago De Franco
178*5ec35a64SHiago De Franco	pinctrl_enable_can1_power: enablecan1powergrp {
179*5ec35a64SHiago De Franco		fsl,pins = <
180*5ec35a64SHiago De Franco			/* CAN1_PWR_EN */
181*5ec35a64SHiago De Franco			MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
182*5ec35a64SHiago De Franco		>;
183*5ec35a64SHiago De Franco	};
184*5ec35a64SHiago De Franco
185*5ec35a64SHiago De Franco	pinctrl_enable_can2_power: enablecan2powergrp {
186*5ec35a64SHiago De Franco		fsl,pins = <
187*5ec35a64SHiago De Franco			/* CAN2_PWR_EN */
188*5ec35a64SHiago De Franco			MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x1b0b0
189*5ec35a64SHiago De Franco		>;
190*5ec35a64SHiago De Franco	};
191*5ec35a64SHiago De Franco
192*5ec35a64SHiago De Franco	pinctrl_nau8822: nau8822grp {
193*5ec35a64SHiago De Franco		fsl,pins = <
194*5ec35a64SHiago De Franco			MX6QDL_PAD_DISP0_DAT16__AUD5_TXC	0x130b0
195*5ec35a64SHiago De Franco			MX6QDL_PAD_DISP0_DAT17__AUD5_TXD	0x130b0
196*5ec35a64SHiago De Franco			MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS	0x130b0
197*5ec35a64SHiago De Franco			MX6QDL_PAD_DISP0_DAT19__AUD5_RXD	0x130b0
198*5ec35a64SHiago De Franco		>;
199*5ec35a64SHiago De Franco	};
200*5ec35a64SHiago De Franco};
201