1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later OR MIT 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright (c) 2014 Protonic Holland 4724ba675SRob Herring */ 5724ba675SRob Herring 6724ba675SRob Herring/dts-v1/; 7724ba675SRob Herring#include "imx6dl.dtsi" 8724ba675SRob Herring#include "imx6qdl-prti6q.dtsi" 9724ba675SRob Herring#include <dt-bindings/leds/common.h> 10724ba675SRob Herring 11724ba675SRob Herring/ { 12724ba675SRob Herring model = "Protonic RVT board"; 13724ba675SRob Herring compatible = "prt,prtrvt", "fsl,imx6dl"; 14724ba675SRob Herring 15724ba675SRob Herring memory@10000000 { 16724ba675SRob Herring device_type = "memory"; 17724ba675SRob Herring reg = <0x10000000 0x10000000>; 18724ba675SRob Herring }; 19724ba675SRob Herring 20724ba675SRob Herring leds { 21724ba675SRob Herring compatible = "gpio-leds"; 22724ba675SRob Herring pinctrl-names = "default"; 23724ba675SRob Herring pinctrl-0 = <&pinctrl_leds>; 24724ba675SRob Herring 25724ba675SRob Herring led-debug0 { 26724ba675SRob Herring function = LED_FUNCTION_STATUS; 27724ba675SRob Herring gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 28724ba675SRob Herring linux,default-trigger = "heartbeat"; 29724ba675SRob Herring }; 30724ba675SRob Herring }; 31724ba675SRob Herring}; 32724ba675SRob Herring 33724ba675SRob Herring&can1 { 34724ba675SRob Herring pinctrl-names = "default"; 35724ba675SRob Herring pinctrl-0 = <&pinctrl_can1 &pinctrl_can1phy>; 36724ba675SRob Herring status = "okay"; 37724ba675SRob Herring}; 38724ba675SRob Herring 39724ba675SRob Herring&ecspi1 { 40724ba675SRob Herring cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>; 41724ba675SRob Herring pinctrl-names = "default"; 42724ba675SRob Herring pinctrl-0 = <&pinctrl_ecspi1>; 43724ba675SRob Herring status = "okay"; 44724ba675SRob Herring 45724ba675SRob Herring flash@0 { 46724ba675SRob Herring compatible = "jedec,spi-nor"; 47724ba675SRob Herring reg = <0>; 48724ba675SRob Herring spi-max-frequency = <20000000>; 49724ba675SRob Herring #address-cells = <1>; 50724ba675SRob Herring #size-cells = <1>; 51724ba675SRob Herring }; 52724ba675SRob Herring}; 53724ba675SRob Herring 54724ba675SRob Herring&ecspi3 { 55724ba675SRob Herring cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>; 56724ba675SRob Herring pinctrl-names = "default"; 57724ba675SRob Herring pinctrl-0 = <&pinctrl_ecspi3>; 58724ba675SRob Herring status = "okay"; 59724ba675SRob Herring 60724ba675SRob Herring nfc@0 { 61724ba675SRob Herring compatible = "ti,trf7970a"; 62724ba675SRob Herring reg = <0>; 63724ba675SRob Herring pinctrl-names = "default"; 64724ba675SRob Herring pinctrl-0 = <&pinctrl_nfc>; 65724ba675SRob Herring spi-max-frequency = <2000000>; 66724ba675SRob Herring interrupts-extended = <&gpio5 14 IRQ_TYPE_LEVEL_LOW>; 67724ba675SRob Herring ti,enable-gpios = <&gpio5 12 GPIO_ACTIVE_LOW>, 68724ba675SRob Herring <&gpio5 11 GPIO_ACTIVE_LOW>; 69724ba675SRob Herring vin-supply = <®_3v3>; 70724ba675SRob Herring autosuspend-delay = <30000>; 71724ba675SRob Herring irq-status-read-quirk; 72724ba675SRob Herring en2-rf-quirk; 73724ba675SRob Herring status = "okay"; 74724ba675SRob Herring }; 75724ba675SRob Herring}; 76724ba675SRob Herring 77724ba675SRob Herring&i2c3 { 78724ba675SRob Herring adc@49 { 79724ba675SRob Herring compatible = "ti,ads1015"; 80724ba675SRob Herring reg = <0x49>; 81724ba675SRob Herring #address-cells = <1>; 82724ba675SRob Herring #size-cells = <0>; 83724ba675SRob Herring 84724ba675SRob Herring /* nc */ 85724ba675SRob Herring channel@4 { 86724ba675SRob Herring reg = <4>; 87724ba675SRob Herring ti,gain = <3>; 88724ba675SRob Herring ti,datarate = <3>; 89724ba675SRob Herring }; 90724ba675SRob Herring 91724ba675SRob Herring /* nc */ 92724ba675SRob Herring channel@5 { 93724ba675SRob Herring reg = <5>; 94724ba675SRob Herring ti,gain = <3>; 95724ba675SRob Herring ti,datarate = <3>; 96724ba675SRob Herring }; 97724ba675SRob Herring 98724ba675SRob Herring /* can1_l */ 99724ba675SRob Herring channel@6 { 100724ba675SRob Herring reg = <6>; 101724ba675SRob Herring ti,gain = <3>; 102724ba675SRob Herring ti,datarate = <3>; 103724ba675SRob Herring }; 104724ba675SRob Herring 105724ba675SRob Herring /* can1_h */ 106724ba675SRob Herring channel@7 { 107724ba675SRob Herring reg = <7>; 108724ba675SRob Herring ti,gain = <3>; 109724ba675SRob Herring ti,datarate = <3>; 110724ba675SRob Herring }; 111724ba675SRob Herring }; 112724ba675SRob Herring 113724ba675SRob Herring rtc@51 { 114724ba675SRob Herring compatible = "nxp,pcf8563"; 115724ba675SRob Herring reg = <0x51>; 116724ba675SRob Herring }; 117724ba675SRob Herring}; 118724ba675SRob Herring 119724ba675SRob Herring&pcie { 120724ba675SRob Herring status = "okay"; 121724ba675SRob Herring}; 122724ba675SRob Herring 123724ba675SRob Herring&usbh1 { 124724ba675SRob Herring status = "disabled"; 125724ba675SRob Herring}; 126724ba675SRob Herring 127724ba675SRob Herring&usbotg { 128724ba675SRob Herring disable-over-current; 129724ba675SRob Herring}; 130724ba675SRob Herring 131724ba675SRob Herring&vpu { 132724ba675SRob Herring status = "disabled"; 133724ba675SRob Herring}; 134724ba675SRob Herring 135724ba675SRob Herring&iomuxc { 136*1a980586SMarek Vasut pinctrl_can1phy: can1phygrp { 137724ba675SRob Herring fsl,pins = < 138724ba675SRob Herring /* CAN1_SR */ 139724ba675SRob Herring MX6QDL_PAD_KEY_COL3__GPIO4_IO12 0x13070 140724ba675SRob Herring /* CAN1_TERM */ 141724ba675SRob Herring MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 142724ba675SRob Herring >; 143724ba675SRob Herring }; 144724ba675SRob Herring 145724ba675SRob Herring pinctrl_ecspi1: ecspi1grp { 146724ba675SRob Herring fsl,pins = < 147724ba675SRob Herring MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 148724ba675SRob Herring MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 149724ba675SRob Herring MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 150724ba675SRob Herring /* CS */ 151724ba675SRob Herring MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 152724ba675SRob Herring >; 153724ba675SRob Herring }; 154724ba675SRob Herring 155724ba675SRob Herring pinctrl_ecspi3: ecspi3grp { 156724ba675SRob Herring fsl,pins = < 157724ba675SRob Herring MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 158724ba675SRob Herring MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 159724ba675SRob Herring MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 160724ba675SRob Herring MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x000b1 161724ba675SRob Herring >; 162724ba675SRob Herring }; 163724ba675SRob Herring 164724ba675SRob Herring pinctrl_leds: ledsgrp { 165724ba675SRob Herring fsl,pins = < 166724ba675SRob Herring MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 167724ba675SRob Herring >; 168724ba675SRob Herring }; 169724ba675SRob Herring 170724ba675SRob Herring pinctrl_nfc: nfcgrp { 171724ba675SRob Herring fsl,pins = < 172724ba675SRob Herring /* NFC_ASK_OOK */ 173724ba675SRob Herring MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x100b1 174724ba675SRob Herring /* NFC_PWR_EN */ 175724ba675SRob Herring MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x100b1 176724ba675SRob Herring /* NFC_EN2 */ 177724ba675SRob Herring MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x100b1 178724ba675SRob Herring /* NFC_EN */ 179724ba675SRob Herring MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x100b1 180724ba675SRob Herring /* NFC_MOD */ 181724ba675SRob Herring MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x100b1 182724ba675SRob Herring /* NFC_IRQ */ 183724ba675SRob Herring MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x100b1 184724ba675SRob Herring >; 185724ba675SRob Herring }; 186724ba675SRob Herring}; 187