xref: /linux/scripts/dtc/include-prefixes/arm/nxp/imx/imx51-babbage.dts (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+
2*724ba675SRob Herring//
3*724ba675SRob Herring// Copyright 2011 Freescale Semiconductor, Inc.
4*724ba675SRob Herring// Copyright 2011 Linaro Ltd.
5*724ba675SRob Herring
6*724ba675SRob Herring/dts-v1/;
7*724ba675SRob Herring#include "imx51.dtsi"
8*724ba675SRob Herring
9*724ba675SRob Herring/ {
10*724ba675SRob Herring	model = "Freescale i.MX51 Babbage Board";
11*724ba675SRob Herring	compatible = "fsl,imx51-babbage", "fsl,imx51";
12*724ba675SRob Herring
13*724ba675SRob Herring	chosen {
14*724ba675SRob Herring		stdout-path = &uart1;
15*724ba675SRob Herring	};
16*724ba675SRob Herring
17*724ba675SRob Herring	memory@90000000 {
18*724ba675SRob Herring		device_type = "memory";
19*724ba675SRob Herring		reg = <0x90000000 0x20000000>;
20*724ba675SRob Herring	};
21*724ba675SRob Herring
22*724ba675SRob Herring	ckih1 {
23*724ba675SRob Herring		clock-frequency = <22579200>;
24*724ba675SRob Herring	};
25*724ba675SRob Herring
26*724ba675SRob Herring	clk_osc: clk-osc {
27*724ba675SRob Herring		compatible = "fixed-clock";
28*724ba675SRob Herring		#clock-cells = <0>;
29*724ba675SRob Herring		clock-frequency = <26000000>;
30*724ba675SRob Herring	};
31*724ba675SRob Herring
32*724ba675SRob Herring	clk_osc_gate: clk-osc-gate {
33*724ba675SRob Herring		compatible = "gpio-gate-clock";
34*724ba675SRob Herring		pinctrl-names = "default";
35*724ba675SRob Herring		pinctrl-0 = <&pinctrl_clk26mhz_osc>;
36*724ba675SRob Herring		clocks = <&clk_osc>;
37*724ba675SRob Herring		#clock-cells = <0>;
38*724ba675SRob Herring		enable-gpios = <&gpio3 1 GPIO_ACTIVE_HIGH>;
39*724ba675SRob Herring	};
40*724ba675SRob Herring
41*724ba675SRob Herring	clk_audio: clk-audio {
42*724ba675SRob Herring		compatible = "gpio-gate-clock";
43*724ba675SRob Herring		pinctrl-names = "default";
44*724ba675SRob Herring		pinctrl-0 = <&pinctrl_clk26mhz_audio>;
45*724ba675SRob Herring		clocks = <&clk_osc_gate>;
46*724ba675SRob Herring		#clock-cells = <0>;
47*724ba675SRob Herring		enable-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
48*724ba675SRob Herring	};
49*724ba675SRob Herring
50*724ba675SRob Herring	clk_usb: clk-usb {
51*724ba675SRob Herring		compatible = "gpio-gate-clock";
52*724ba675SRob Herring		pinctrl-names = "default";
53*724ba675SRob Herring		pinctrl-0 = <&pinctrl_clk26mhz_usb>;
54*724ba675SRob Herring		clocks = <&clk_osc_gate>;
55*724ba675SRob Herring		#clock-cells = <0>;
56*724ba675SRob Herring		enable-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
57*724ba675SRob Herring	};
58*724ba675SRob Herring
59*724ba675SRob Herring	display1: disp1 {
60*724ba675SRob Herring		compatible = "fsl,imx-parallel-display";
61*724ba675SRob Herring		#address-cells = <1>;
62*724ba675SRob Herring		#size-cells = <0>;
63*724ba675SRob Herring		interface-pix-fmt = "rgb24";
64*724ba675SRob Herring		pinctrl-names = "default";
65*724ba675SRob Herring		pinctrl-0 = <&pinctrl_ipu_disp1>;
66*724ba675SRob Herring
67*724ba675SRob Herring		port@0 {
68*724ba675SRob Herring		reg = <0>;
69*724ba675SRob Herring
70*724ba675SRob Herring			display0_in: endpoint {
71*724ba675SRob Herring				remote-endpoint = <&ipu_di0_disp1>;
72*724ba675SRob Herring			};
73*724ba675SRob Herring		};
74*724ba675SRob Herring
75*724ba675SRob Herring		port@1 {
76*724ba675SRob Herring			reg = <1>;
77*724ba675SRob Herring
78*724ba675SRob Herring			parallel_display_out: endpoint {
79*724ba675SRob Herring				remote-endpoint = <&tfp410_in>;
80*724ba675SRob Herring			};
81*724ba675SRob Herring		};
82*724ba675SRob Herring	};
83*724ba675SRob Herring
84*724ba675SRob Herring	display2: disp2 {
85*724ba675SRob Herring		compatible = "fsl,imx-parallel-display";
86*724ba675SRob Herring		interface-pix-fmt = "rgb565";
87*724ba675SRob Herring		pinctrl-names = "default";
88*724ba675SRob Herring		pinctrl-0 = <&pinctrl_ipu_disp2>;
89*724ba675SRob Herring		status = "disabled";
90*724ba675SRob Herring		display-timings {
91*724ba675SRob Herring			native-mode = <&timing1>;
92*724ba675SRob Herring			timing1: claawvga {
93*724ba675SRob Herring				clock-frequency = <27000000>;
94*724ba675SRob Herring				hactive = <800>;
95*724ba675SRob Herring				vactive = <480>;
96*724ba675SRob Herring				hback-porch = <40>;
97*724ba675SRob Herring				hfront-porch = <60>;
98*724ba675SRob Herring				vback-porch = <10>;
99*724ba675SRob Herring				vfront-porch = <10>;
100*724ba675SRob Herring				hsync-len = <20>;
101*724ba675SRob Herring				vsync-len = <10>;
102*724ba675SRob Herring				hsync-active = <0>;
103*724ba675SRob Herring				vsync-active = <0>;
104*724ba675SRob Herring				de-active = <1>;
105*724ba675SRob Herring				pixelclk-active = <0>;
106*724ba675SRob Herring			};
107*724ba675SRob Herring		};
108*724ba675SRob Herring
109*724ba675SRob Herring		port {
110*724ba675SRob Herring			display1_in: endpoint {
111*724ba675SRob Herring				remote-endpoint = <&ipu_di1_disp2>;
112*724ba675SRob Herring			};
113*724ba675SRob Herring		};
114*724ba675SRob Herring	};
115*724ba675SRob Herring
116*724ba675SRob Herring	dvi-connector {
117*724ba675SRob Herring		compatible = "dvi-connector";
118*724ba675SRob Herring		digital;
119*724ba675SRob Herring
120*724ba675SRob Herring		port {
121*724ba675SRob Herring			dvi_connector_in: endpoint {
122*724ba675SRob Herring				remote-endpoint = <&tfp410_out>;
123*724ba675SRob Herring			};
124*724ba675SRob Herring		};
125*724ba675SRob Herring	};
126*724ba675SRob Herring
127*724ba675SRob Herring	dvi-encoder {
128*724ba675SRob Herring		compatible = "ti,tfp410";
129*724ba675SRob Herring
130*724ba675SRob Herring		ports {
131*724ba675SRob Herring			#address-cells = <1>;
132*724ba675SRob Herring			#size-cells = <0>;
133*724ba675SRob Herring
134*724ba675SRob Herring			port@0 {
135*724ba675SRob Herring				reg = <0>;
136*724ba675SRob Herring
137*724ba675SRob Herring				tfp410_in: endpoint {
138*724ba675SRob Herring					remote-endpoint = <&parallel_display_out>;
139*724ba675SRob Herring				};
140*724ba675SRob Herring			};
141*724ba675SRob Herring
142*724ba675SRob Herring			port@1 {
143*724ba675SRob Herring				reg = <1>;
144*724ba675SRob Herring
145*724ba675SRob Herring				tfp410_out: endpoint {
146*724ba675SRob Herring					remote-endpoint = <&dvi_connector_in>;
147*724ba675SRob Herring				};
148*724ba675SRob Herring			};
149*724ba675SRob Herring		};
150*724ba675SRob Herring	};
151*724ba675SRob Herring
152*724ba675SRob Herring	gpio-keys {
153*724ba675SRob Herring		compatible = "gpio-keys";
154*724ba675SRob Herring		pinctrl-names = "default";
155*724ba675SRob Herring		pinctrl-0 = <&pinctrl_gpio_keys>;
156*724ba675SRob Herring
157*724ba675SRob Herring		key-power {
158*724ba675SRob Herring			label = "Power Button";
159*724ba675SRob Herring			gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
160*724ba675SRob Herring			linux,code = <KEY_POWER>;
161*724ba675SRob Herring			wakeup-source;
162*724ba675SRob Herring		};
163*724ba675SRob Herring	};
164*724ba675SRob Herring
165*724ba675SRob Herring	leds {
166*724ba675SRob Herring		compatible = "gpio-leds";
167*724ba675SRob Herring		pinctrl-names = "default";
168*724ba675SRob Herring		pinctrl-0 = <&pinctrl_gpio_leds>;
169*724ba675SRob Herring
170*724ba675SRob Herring		led-diagnostic {
171*724ba675SRob Herring			label = "diagnostic";
172*724ba675SRob Herring			gpios = <&gpio2 6 GPIO_ACTIVE_HIGH>;
173*724ba675SRob Herring		};
174*724ba675SRob Herring	};
175*724ba675SRob Herring
176*724ba675SRob Herring	regulators {
177*724ba675SRob Herring		compatible = "simple-bus";
178*724ba675SRob Herring		#address-cells = <1>;
179*724ba675SRob Herring		#size-cells = <0>;
180*724ba675SRob Herring
181*724ba675SRob Herring		reg_hub_reset: regulator@0 {
182*724ba675SRob Herring			compatible = "regulator-fixed";
183*724ba675SRob Herring			pinctrl-names = "default";
184*724ba675SRob Herring			pinctrl-0 = <&pinctrl_usbotgreg>;
185*724ba675SRob Herring			reg = <0>;
186*724ba675SRob Herring			regulator-name = "hub_reset";
187*724ba675SRob Herring			regulator-min-microvolt = <5000000>;
188*724ba675SRob Herring			regulator-max-microvolt = <5000000>;
189*724ba675SRob Herring			gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>;
190*724ba675SRob Herring			enable-active-high;
191*724ba675SRob Herring		};
192*724ba675SRob Herring	};
193*724ba675SRob Herring
194*724ba675SRob Herring	sound {
195*724ba675SRob Herring		compatible = "fsl,imx51-babbage-sgtl5000",
196*724ba675SRob Herring			     "fsl,imx-audio-sgtl5000";
197*724ba675SRob Herring		model = "imx51-babbage-sgtl5000";
198*724ba675SRob Herring		ssi-controller = <&ssi2>;
199*724ba675SRob Herring		audio-codec = <&sgtl5000>;
200*724ba675SRob Herring		audio-routing =
201*724ba675SRob Herring			"MIC_IN", "Mic Jack",
202*724ba675SRob Herring			"Mic Jack", "Mic Bias",
203*724ba675SRob Herring			"Headphone Jack", "HP_OUT";
204*724ba675SRob Herring		mux-int-port = <2>;
205*724ba675SRob Herring		mux-ext-port = <3>;
206*724ba675SRob Herring	};
207*724ba675SRob Herring
208*724ba675SRob Herring	usbphy1: usbphy1 {
209*724ba675SRob Herring		compatible = "usb-nop-xceiv";
210*724ba675SRob Herring		pinctrl-names = "default";
211*724ba675SRob Herring		pinctrl-0 = <&pinctrl_usbh1reg>;
212*724ba675SRob Herring		clocks = <&clk_usb>;
213*724ba675SRob Herring		clock-names = "main_clk";
214*724ba675SRob Herring		reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
215*724ba675SRob Herring		vcc-supply = <&vusb_reg>;
216*724ba675SRob Herring		#phy-cells = <0>;
217*724ba675SRob Herring	};
218*724ba675SRob Herring};
219*724ba675SRob Herring
220*724ba675SRob Herring&audmux {
221*724ba675SRob Herring	pinctrl-names = "default";
222*724ba675SRob Herring	pinctrl-0 = <&pinctrl_audmux>;
223*724ba675SRob Herring	status = "okay";
224*724ba675SRob Herring};
225*724ba675SRob Herring
226*724ba675SRob Herring&ecspi1 {
227*724ba675SRob Herring	pinctrl-names = "default";
228*724ba675SRob Herring	pinctrl-0 = <&pinctrl_ecspi1>;
229*724ba675SRob Herring	cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>,
230*724ba675SRob Herring		   <&gpio4 25 GPIO_ACTIVE_LOW>;
231*724ba675SRob Herring	status = "okay";
232*724ba675SRob Herring
233*724ba675SRob Herring	pmic: mc13892@0 {
234*724ba675SRob Herring		compatible = "fsl,mc13892";
235*724ba675SRob Herring		pinctrl-names = "default";
236*724ba675SRob Herring		pinctrl-0 = <&pinctrl_pmic>;
237*724ba675SRob Herring		spi-max-frequency = <6000000>;
238*724ba675SRob Herring		spi-cs-high;
239*724ba675SRob Herring		reg = <0>;
240*724ba675SRob Herring		interrupt-parent = <&gpio1>;
241*724ba675SRob Herring		interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
242*724ba675SRob Herring		fsl,mc13xxx-uses-adc;
243*724ba675SRob Herring		fsl,mc13xxx-uses-rtc;
244*724ba675SRob Herring
245*724ba675SRob Herring		regulators {
246*724ba675SRob Herring			sw1_reg: sw1 {
247*724ba675SRob Herring				regulator-min-microvolt = <600000>;
248*724ba675SRob Herring				regulator-max-microvolt = <1375000>;
249*724ba675SRob Herring				regulator-boot-on;
250*724ba675SRob Herring				regulator-always-on;
251*724ba675SRob Herring			};
252*724ba675SRob Herring
253*724ba675SRob Herring			sw2_reg: sw2 {
254*724ba675SRob Herring				regulator-min-microvolt = <900000>;
255*724ba675SRob Herring				regulator-max-microvolt = <1850000>;
256*724ba675SRob Herring				regulator-boot-on;
257*724ba675SRob Herring				regulator-always-on;
258*724ba675SRob Herring			};
259*724ba675SRob Herring
260*724ba675SRob Herring			sw3_reg: sw3 {
261*724ba675SRob Herring				regulator-min-microvolt = <1100000>;
262*724ba675SRob Herring				regulator-max-microvolt = <1850000>;
263*724ba675SRob Herring				regulator-boot-on;
264*724ba675SRob Herring				regulator-always-on;
265*724ba675SRob Herring			};
266*724ba675SRob Herring
267*724ba675SRob Herring			sw4_reg: sw4 {
268*724ba675SRob Herring				regulator-min-microvolt = <1100000>;
269*724ba675SRob Herring				regulator-max-microvolt = <1850000>;
270*724ba675SRob Herring				regulator-boot-on;
271*724ba675SRob Herring				regulator-always-on;
272*724ba675SRob Herring			};
273*724ba675SRob Herring
274*724ba675SRob Herring			vpll_reg: vpll {
275*724ba675SRob Herring				regulator-min-microvolt = <1050000>;
276*724ba675SRob Herring				regulator-max-microvolt = <1800000>;
277*724ba675SRob Herring				regulator-boot-on;
278*724ba675SRob Herring				regulator-always-on;
279*724ba675SRob Herring			};
280*724ba675SRob Herring
281*724ba675SRob Herring			vdig_reg: vdig {
282*724ba675SRob Herring				regulator-min-microvolt = <1650000>;
283*724ba675SRob Herring				regulator-max-microvolt = <1650000>;
284*724ba675SRob Herring				regulator-boot-on;
285*724ba675SRob Herring			};
286*724ba675SRob Herring
287*724ba675SRob Herring			vsd_reg: vsd {
288*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
289*724ba675SRob Herring				regulator-max-microvolt = <3150000>;
290*724ba675SRob Herring			};
291*724ba675SRob Herring
292*724ba675SRob Herring			vusb_reg: vusb {
293*724ba675SRob Herring				regulator-boot-on;
294*724ba675SRob Herring			};
295*724ba675SRob Herring
296*724ba675SRob Herring			vusb2_reg: vusb2 {
297*724ba675SRob Herring				regulator-min-microvolt = <2400000>;
298*724ba675SRob Herring				regulator-max-microvolt = <2775000>;
299*724ba675SRob Herring				regulator-boot-on;
300*724ba675SRob Herring				regulator-always-on;
301*724ba675SRob Herring			};
302*724ba675SRob Herring
303*724ba675SRob Herring			vvideo_reg: vvideo {
304*724ba675SRob Herring				regulator-min-microvolt = <2775000>;
305*724ba675SRob Herring				regulator-max-microvolt = <2775000>;
306*724ba675SRob Herring			};
307*724ba675SRob Herring
308*724ba675SRob Herring			vaudio_reg: vaudio {
309*724ba675SRob Herring				regulator-min-microvolt = <2300000>;
310*724ba675SRob Herring				regulator-max-microvolt = <3000000>;
311*724ba675SRob Herring			};
312*724ba675SRob Herring
313*724ba675SRob Herring			vcam_reg: vcam {
314*724ba675SRob Herring				regulator-min-microvolt = <2500000>;
315*724ba675SRob Herring				regulator-max-microvolt = <3000000>;
316*724ba675SRob Herring			};
317*724ba675SRob Herring
318*724ba675SRob Herring			vgen1_reg: vgen1 {
319*724ba675SRob Herring				regulator-min-microvolt = <1200000>;
320*724ba675SRob Herring				regulator-max-microvolt = <1200000>;
321*724ba675SRob Herring			};
322*724ba675SRob Herring
323*724ba675SRob Herring			vgen2_reg: vgen2 {
324*724ba675SRob Herring				regulator-min-microvolt = <1200000>;
325*724ba675SRob Herring				regulator-max-microvolt = <3150000>;
326*724ba675SRob Herring				regulator-always-on;
327*724ba675SRob Herring			};
328*724ba675SRob Herring
329*724ba675SRob Herring			vgen3_reg: vgen3 {
330*724ba675SRob Herring				regulator-min-microvolt = <1800000>;
331*724ba675SRob Herring				regulator-max-microvolt = <2900000>;
332*724ba675SRob Herring				regulator-always-on;
333*724ba675SRob Herring			};
334*724ba675SRob Herring		};
335*724ba675SRob Herring	};
336*724ba675SRob Herring
337*724ba675SRob Herring	flash: at45db321d@1 {
338*724ba675SRob Herring		#address-cells = <1>;
339*724ba675SRob Herring		#size-cells = <1>;
340*724ba675SRob Herring		compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
341*724ba675SRob Herring		spi-max-frequency = <25000000>;
342*724ba675SRob Herring		reg = <1>;
343*724ba675SRob Herring
344*724ba675SRob Herring		partition@0 {
345*724ba675SRob Herring			label = "U-Boot";
346*724ba675SRob Herring			reg = <0x0 0x40000>;
347*724ba675SRob Herring			read-only;
348*724ba675SRob Herring		};
349*724ba675SRob Herring
350*724ba675SRob Herring		partition@40000 {
351*724ba675SRob Herring			label = "Kernel";
352*724ba675SRob Herring			reg = <0x40000 0x3c0000>;
353*724ba675SRob Herring		};
354*724ba675SRob Herring	};
355*724ba675SRob Herring};
356*724ba675SRob Herring
357*724ba675SRob Herring&esdhc1 {
358*724ba675SRob Herring	pinctrl-names = "default";
359*724ba675SRob Herring	pinctrl-0 = <&pinctrl_esdhc1>;
360*724ba675SRob Herring	cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
361*724ba675SRob Herring	wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
362*724ba675SRob Herring	status = "okay";
363*724ba675SRob Herring};
364*724ba675SRob Herring
365*724ba675SRob Herring&esdhc2 {
366*724ba675SRob Herring	pinctrl-names = "default";
367*724ba675SRob Herring	pinctrl-0 = <&pinctrl_esdhc2>;
368*724ba675SRob Herring	cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
369*724ba675SRob Herring	wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
370*724ba675SRob Herring	status = "okay";
371*724ba675SRob Herring};
372*724ba675SRob Herring
373*724ba675SRob Herring&fec {
374*724ba675SRob Herring	pinctrl-names = "default";
375*724ba675SRob Herring	pinctrl-0 = <&pinctrl_fec>;
376*724ba675SRob Herring	phy-mode = "mii";
377*724ba675SRob Herring	phy-reset-gpios = <&gpio2 14 GPIO_ACTIVE_LOW>;
378*724ba675SRob Herring	phy-reset-duration = <1>;
379*724ba675SRob Herring	status = "okay";
380*724ba675SRob Herring};
381*724ba675SRob Herring
382*724ba675SRob Herring&i2c1 {
383*724ba675SRob Herring	pinctrl-names = "default";
384*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c1>;
385*724ba675SRob Herring	status = "okay";
386*724ba675SRob Herring};
387*724ba675SRob Herring
388*724ba675SRob Herring&i2c2 {
389*724ba675SRob Herring	pinctrl-names = "default";
390*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c2>;
391*724ba675SRob Herring	status = "okay";
392*724ba675SRob Herring
393*724ba675SRob Herring	sgtl5000: codec@a {
394*724ba675SRob Herring		compatible = "fsl,sgtl5000";
395*724ba675SRob Herring		reg = <0x0a>;
396*724ba675SRob Herring		#sound-dai-cells = <0>;
397*724ba675SRob Herring		clocks = <&clk_audio>;
398*724ba675SRob Herring		VDDA-supply = <&vdig_reg>;
399*724ba675SRob Herring		VDDIO-supply = <&vvideo_reg>;
400*724ba675SRob Herring	};
401*724ba675SRob Herring};
402*724ba675SRob Herring
403*724ba675SRob Herring&ipu_di0_disp1 {
404*724ba675SRob Herring	remote-endpoint = <&display0_in>;
405*724ba675SRob Herring};
406*724ba675SRob Herring
407*724ba675SRob Herring&ipu_di1_disp2 {
408*724ba675SRob Herring	remote-endpoint = <&display1_in>;
409*724ba675SRob Herring};
410*724ba675SRob Herring
411*724ba675SRob Herring&kpp {
412*724ba675SRob Herring	pinctrl-names = "default";
413*724ba675SRob Herring	pinctrl-0 = <&pinctrl_kpp>;
414*724ba675SRob Herring	linux,keymap = <
415*724ba675SRob Herring		MATRIX_KEY(0, 0, KEY_UP)
416*724ba675SRob Herring		MATRIX_KEY(0, 1, KEY_DOWN)
417*724ba675SRob Herring		MATRIX_KEY(0, 2, KEY_VOLUMEDOWN)
418*724ba675SRob Herring		MATRIX_KEY(0, 3, KEY_HOME)
419*724ba675SRob Herring		MATRIX_KEY(1, 0, KEY_RIGHT)
420*724ba675SRob Herring		MATRIX_KEY(1, 1, KEY_LEFT)
421*724ba675SRob Herring		MATRIX_KEY(1, 2, KEY_ENTER)
422*724ba675SRob Herring		MATRIX_KEY(1, 3, KEY_VOLUMEUP)
423*724ba675SRob Herring		MATRIX_KEY(2, 0, KEY_F6)
424*724ba675SRob Herring		MATRIX_KEY(2, 1, KEY_F8)
425*724ba675SRob Herring		MATRIX_KEY(2, 2, KEY_F9)
426*724ba675SRob Herring		MATRIX_KEY(2, 3, KEY_F10)
427*724ba675SRob Herring		MATRIX_KEY(3, 0, KEY_F1)
428*724ba675SRob Herring		MATRIX_KEY(3, 1, KEY_F2)
429*724ba675SRob Herring		MATRIX_KEY(3, 2, KEY_F3)
430*724ba675SRob Herring		MATRIX_KEY(3, 3, KEY_POWER)
431*724ba675SRob Herring	>;
432*724ba675SRob Herring	status = "okay";
433*724ba675SRob Herring};
434*724ba675SRob Herring
435*724ba675SRob Herring&pmu {
436*724ba675SRob Herring	secure-reg-access;
437*724ba675SRob Herring};
438*724ba675SRob Herring
439*724ba675SRob Herring&ssi2 {
440*724ba675SRob Herring	status = "okay";
441*724ba675SRob Herring};
442*724ba675SRob Herring
443*724ba675SRob Herring&uart1 {
444*724ba675SRob Herring	pinctrl-names = "default";
445*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart1>;
446*724ba675SRob Herring	uart-has-rtscts;
447*724ba675SRob Herring	status = "okay";
448*724ba675SRob Herring};
449*724ba675SRob Herring
450*724ba675SRob Herring&uart2 {
451*724ba675SRob Herring	pinctrl-names = "default";
452*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart2>;
453*724ba675SRob Herring	status = "okay";
454*724ba675SRob Herring};
455*724ba675SRob Herring
456*724ba675SRob Herring&uart3 {
457*724ba675SRob Herring	pinctrl-names = "default";
458*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart3>;
459*724ba675SRob Herring	uart-has-rtscts;
460*724ba675SRob Herring	status = "okay";
461*724ba675SRob Herring};
462*724ba675SRob Herring
463*724ba675SRob Herring&usbh1 {
464*724ba675SRob Herring	pinctrl-names = "default";
465*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usbh1>;
466*724ba675SRob Herring	vbus-supply = <&reg_hub_reset>;
467*724ba675SRob Herring	fsl,usbphy = <&usbphy1>;
468*724ba675SRob Herring	phy_type = "ulpi";
469*724ba675SRob Herring	status = "okay";
470*724ba675SRob Herring};
471*724ba675SRob Herring
472*724ba675SRob Herring&usbphy0 {
473*724ba675SRob Herring	vcc-supply = <&vusb_reg>;
474*724ba675SRob Herring};
475*724ba675SRob Herring
476*724ba675SRob Herring&usbotg {
477*724ba675SRob Herring	dr_mode = "otg";
478*724ba675SRob Herring	disable-over-current;
479*724ba675SRob Herring	phy_type = "utmi_wide";
480*724ba675SRob Herring	status = "okay";
481*724ba675SRob Herring};
482*724ba675SRob Herring
483*724ba675SRob Herring&iomuxc {
484*724ba675SRob Herring	imx51-babbage {
485*724ba675SRob Herring		pinctrl_audmux: audmuxgrp {
486*724ba675SRob Herring			fsl,pins = <
487*724ba675SRob Herring				MX51_PAD_AUD3_BB_TXD__AUD3_TXD		0x80000000
488*724ba675SRob Herring				MX51_PAD_AUD3_BB_RXD__AUD3_RXD		0x80000000
489*724ba675SRob Herring				MX51_PAD_AUD3_BB_CK__AUD3_TXC		0x80000000
490*724ba675SRob Herring				MX51_PAD_AUD3_BB_FS__AUD3_TXFS		0x80000000
491*724ba675SRob Herring			>;
492*724ba675SRob Herring		};
493*724ba675SRob Herring
494*724ba675SRob Herring		pinctrl_clk26mhz_audio: clk26mhzaudiocgrp {
495*724ba675SRob Herring			fsl,pins = <
496*724ba675SRob Herring				MX51_PAD_CSPI1_RDY__GPIO4_26		0x85
497*724ba675SRob Herring			>;
498*724ba675SRob Herring		};
499*724ba675SRob Herring
500*724ba675SRob Herring		pinctrl_clk26mhz_osc: clk26mhzoscgrp {
501*724ba675SRob Herring			fsl,pins = <
502*724ba675SRob Herring				MX51_PAD_DI1_PIN12__GPIO3_1		0x85
503*724ba675SRob Herring			>;
504*724ba675SRob Herring		};
505*724ba675SRob Herring
506*724ba675SRob Herring		pinctrl_clk26mhz_usb: clk26mhzusbgrp {
507*724ba675SRob Herring			fsl,pins = <
508*724ba675SRob Herring				MX51_PAD_EIM_D17__GPIO2_1		0x85
509*724ba675SRob Herring			>;
510*724ba675SRob Herring		};
511*724ba675SRob Herring
512*724ba675SRob Herring		pinctrl_ecspi1: ecspi1grp {
513*724ba675SRob Herring			fsl,pins = <
514*724ba675SRob Herring				MX51_PAD_CSPI1_MISO__ECSPI1_MISO	0x185
515*724ba675SRob Herring				MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI	0x185
516*724ba675SRob Herring				MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK	0x185
517*724ba675SRob Herring				MX51_PAD_CSPI1_SS0__GPIO4_24		0x85 /* CS0 */
518*724ba675SRob Herring				MX51_PAD_CSPI1_SS1__GPIO4_25		0x85 /* CS1 */
519*724ba675SRob Herring			>;
520*724ba675SRob Herring		};
521*724ba675SRob Herring
522*724ba675SRob Herring		pinctrl_esdhc1: esdhc1grp {
523*724ba675SRob Herring			fsl,pins = <
524*724ba675SRob Herring				MX51_PAD_SD1_CMD__SD1_CMD		0x400020d5
525*724ba675SRob Herring				MX51_PAD_SD1_CLK__SD1_CLK		0x20d5
526*724ba675SRob Herring				MX51_PAD_SD1_DATA0__SD1_DATA0		0x20d5
527*724ba675SRob Herring				MX51_PAD_SD1_DATA1__SD1_DATA1		0x20d5
528*724ba675SRob Herring				MX51_PAD_SD1_DATA2__SD1_DATA2		0x20d5
529*724ba675SRob Herring				MX51_PAD_SD1_DATA3__SD1_DATA3		0x20d5
530*724ba675SRob Herring				MX51_PAD_GPIO1_0__GPIO1_0		0x100
531*724ba675SRob Herring				MX51_PAD_GPIO1_1__GPIO1_1		0x100
532*724ba675SRob Herring			>;
533*724ba675SRob Herring		};
534*724ba675SRob Herring
535*724ba675SRob Herring		pinctrl_esdhc2: esdhc2grp {
536*724ba675SRob Herring			fsl,pins = <
537*724ba675SRob Herring				MX51_PAD_SD2_CMD__SD2_CMD		0x400020d5
538*724ba675SRob Herring				MX51_PAD_SD2_CLK__SD2_CLK		0x20d5
539*724ba675SRob Herring				MX51_PAD_SD2_DATA0__SD2_DATA0		0x20d5
540*724ba675SRob Herring				MX51_PAD_SD2_DATA1__SD2_DATA1		0x20d5
541*724ba675SRob Herring				MX51_PAD_SD2_DATA2__SD2_DATA2		0x20d5
542*724ba675SRob Herring				MX51_PAD_SD2_DATA3__SD2_DATA3		0x20d5
543*724ba675SRob Herring				MX51_PAD_GPIO1_5__GPIO1_5		0x100 /* WP */
544*724ba675SRob Herring				MX51_PAD_GPIO1_6__GPIO1_6		0x100 /* CD */
545*724ba675SRob Herring			>;
546*724ba675SRob Herring		};
547*724ba675SRob Herring
548*724ba675SRob Herring		pinctrl_fec: fecgrp {
549*724ba675SRob Herring			fsl,pins = <
550*724ba675SRob Herring				MX51_PAD_EIM_EB2__FEC_MDIO		0x000001f5
551*724ba675SRob Herring				MX51_PAD_EIM_EB3__FEC_RDATA1		0x00000085
552*724ba675SRob Herring				MX51_PAD_EIM_CS2__FEC_RDATA2		0x00000085
553*724ba675SRob Herring				MX51_PAD_EIM_CS3__FEC_RDATA3		0x00000085
554*724ba675SRob Herring				MX51_PAD_EIM_CS4__FEC_RX_ER		0x00000180
555*724ba675SRob Herring				MX51_PAD_EIM_CS5__FEC_CRS		0x00000180
556*724ba675SRob Herring				MX51_PAD_NANDF_RB2__FEC_COL		0x00000180
557*724ba675SRob Herring				MX51_PAD_NANDF_RB3__FEC_RX_CLK		0x00000180
558*724ba675SRob Herring				MX51_PAD_NANDF_D9__FEC_RDATA0		0x00002180
559*724ba675SRob Herring				MX51_PAD_NANDF_D8__FEC_TDATA0		0x00002004
560*724ba675SRob Herring				MX51_PAD_NANDF_CS2__FEC_TX_ER		0x00002004
561*724ba675SRob Herring				MX51_PAD_NANDF_CS3__FEC_MDC		0x00002004
562*724ba675SRob Herring				MX51_PAD_NANDF_CS4__FEC_TDATA1		0x00002004
563*724ba675SRob Herring				MX51_PAD_NANDF_CS5__FEC_TDATA2		0x00002004
564*724ba675SRob Herring				MX51_PAD_NANDF_CS6__FEC_TDATA3		0x00002004
565*724ba675SRob Herring				MX51_PAD_NANDF_CS7__FEC_TX_EN		0x00002004
566*724ba675SRob Herring				MX51_PAD_NANDF_RDY_INT__FEC_TX_CLK	0x00002180
567*724ba675SRob Herring				MX51_PAD_NANDF_D11__FEC_RX_DV		0x000020a4
568*724ba675SRob Herring				MX51_PAD_EIM_A20__GPIO2_14		0x00000085 /* Phy Reset */
569*724ba675SRob Herring			>;
570*724ba675SRob Herring		};
571*724ba675SRob Herring
572*724ba675SRob Herring		pinctrl_gpio_keys: gpiokeysgrp {
573*724ba675SRob Herring			fsl,pins = <
574*724ba675SRob Herring				MX51_PAD_EIM_A27__GPIO2_21		0x5
575*724ba675SRob Herring			>;
576*724ba675SRob Herring		};
577*724ba675SRob Herring
578*724ba675SRob Herring		pinctrl_gpio_leds: gpioledsgrp {
579*724ba675SRob Herring			fsl,pins = <
580*724ba675SRob Herring				MX51_PAD_EIM_D22__GPIO2_6		0x80000000
581*724ba675SRob Herring			>;
582*724ba675SRob Herring		};
583*724ba675SRob Herring
584*724ba675SRob Herring		pinctrl_i2c1: i2c1grp {
585*724ba675SRob Herring			fsl,pins = <
586*724ba675SRob Herring				MX51_PAD_EIM_D19__I2C1_SCL		0x400001ed
587*724ba675SRob Herring				MX51_PAD_EIM_D16__I2C1_SDA		0x400001ed
588*724ba675SRob Herring			>;
589*724ba675SRob Herring		};
590*724ba675SRob Herring
591*724ba675SRob Herring		pinctrl_i2c2: i2c2grp {
592*724ba675SRob Herring			fsl,pins = <
593*724ba675SRob Herring				MX51_PAD_KEY_COL4__I2C2_SCL		0x400001ed
594*724ba675SRob Herring				MX51_PAD_KEY_COL5__I2C2_SDA		0x400001ed
595*724ba675SRob Herring			>;
596*724ba675SRob Herring		};
597*724ba675SRob Herring
598*724ba675SRob Herring		pinctrl_ipu_disp1: ipudisp1grp {
599*724ba675SRob Herring			fsl,pins = <
600*724ba675SRob Herring				MX51_PAD_DISP1_DAT0__DISP1_DAT0		0x5
601*724ba675SRob Herring				MX51_PAD_DISP1_DAT1__DISP1_DAT1		0x5
602*724ba675SRob Herring				MX51_PAD_DISP1_DAT2__DISP1_DAT2		0x5
603*724ba675SRob Herring				MX51_PAD_DISP1_DAT3__DISP1_DAT3		0x5
604*724ba675SRob Herring				MX51_PAD_DISP1_DAT4__DISP1_DAT4		0x5
605*724ba675SRob Herring				MX51_PAD_DISP1_DAT5__DISP1_DAT5		0x5
606*724ba675SRob Herring				MX51_PAD_DISP1_DAT6__DISP1_DAT6		0x5
607*724ba675SRob Herring				MX51_PAD_DISP1_DAT7__DISP1_DAT7		0x5
608*724ba675SRob Herring				MX51_PAD_DISP1_DAT8__DISP1_DAT8		0x5
609*724ba675SRob Herring				MX51_PAD_DISP1_DAT9__DISP1_DAT9		0x5
610*724ba675SRob Herring				MX51_PAD_DISP1_DAT10__DISP1_DAT10	0x5
611*724ba675SRob Herring				MX51_PAD_DISP1_DAT11__DISP1_DAT11	0x5
612*724ba675SRob Herring				MX51_PAD_DISP1_DAT12__DISP1_DAT12	0x5
613*724ba675SRob Herring				MX51_PAD_DISP1_DAT13__DISP1_DAT13	0x5
614*724ba675SRob Herring				MX51_PAD_DISP1_DAT14__DISP1_DAT14	0x5
615*724ba675SRob Herring				MX51_PAD_DISP1_DAT15__DISP1_DAT15	0x5
616*724ba675SRob Herring				MX51_PAD_DISP1_DAT16__DISP1_DAT16	0x5
617*724ba675SRob Herring				MX51_PAD_DISP1_DAT17__DISP1_DAT17	0x5
618*724ba675SRob Herring				MX51_PAD_DISP1_DAT18__DISP1_DAT18	0x5
619*724ba675SRob Herring				MX51_PAD_DISP1_DAT19__DISP1_DAT19	0x5
620*724ba675SRob Herring				MX51_PAD_DISP1_DAT20__DISP1_DAT20	0x5
621*724ba675SRob Herring				MX51_PAD_DISP1_DAT21__DISP1_DAT21	0x5
622*724ba675SRob Herring				MX51_PAD_DISP1_DAT22__DISP1_DAT22	0x5
623*724ba675SRob Herring				MX51_PAD_DISP1_DAT23__DISP1_DAT23	0x5
624*724ba675SRob Herring				MX51_PAD_DI1_PIN2__DI1_PIN2		0x5
625*724ba675SRob Herring				MX51_PAD_DI1_PIN3__DI1_PIN3		0x5
626*724ba675SRob Herring			>;
627*724ba675SRob Herring		};
628*724ba675SRob Herring
629*724ba675SRob Herring		pinctrl_ipu_disp2: ipudisp2grp {
630*724ba675SRob Herring			fsl,pins = <
631*724ba675SRob Herring				MX51_PAD_DISP2_DAT0__DISP2_DAT0		0x5
632*724ba675SRob Herring				MX51_PAD_DISP2_DAT1__DISP2_DAT1		0x5
633*724ba675SRob Herring				MX51_PAD_DISP2_DAT2__DISP2_DAT2		0x5
634*724ba675SRob Herring				MX51_PAD_DISP2_DAT3__DISP2_DAT3		0x5
635*724ba675SRob Herring				MX51_PAD_DISP2_DAT4__DISP2_DAT4		0x5
636*724ba675SRob Herring				MX51_PAD_DISP2_DAT5__DISP2_DAT5		0x5
637*724ba675SRob Herring				MX51_PAD_DISP2_DAT6__DISP2_DAT6		0x5
638*724ba675SRob Herring				MX51_PAD_DISP2_DAT7__DISP2_DAT7		0x5
639*724ba675SRob Herring				MX51_PAD_DISP2_DAT8__DISP2_DAT8		0x5
640*724ba675SRob Herring				MX51_PAD_DISP2_DAT9__DISP2_DAT9		0x5
641*724ba675SRob Herring				MX51_PAD_DISP2_DAT10__DISP2_DAT10	0x5
642*724ba675SRob Herring				MX51_PAD_DISP2_DAT11__DISP2_DAT11	0x5
643*724ba675SRob Herring				MX51_PAD_DISP2_DAT12__DISP2_DAT12	0x5
644*724ba675SRob Herring				MX51_PAD_DISP2_DAT13__DISP2_DAT13	0x5
645*724ba675SRob Herring				MX51_PAD_DISP2_DAT14__DISP2_DAT14	0x5
646*724ba675SRob Herring				MX51_PAD_DISP2_DAT15__DISP2_DAT15	0x5
647*724ba675SRob Herring				MX51_PAD_DI2_PIN2__DI2_PIN2		0x5
648*724ba675SRob Herring				MX51_PAD_DI2_PIN3__DI2_PIN3		0x5
649*724ba675SRob Herring				MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK	0x5
650*724ba675SRob Herring				MX51_PAD_DI_GP4__DI2_PIN15		0x5
651*724ba675SRob Herring			>;
652*724ba675SRob Herring		};
653*724ba675SRob Herring
654*724ba675SRob Herring		pinctrl_kpp: kppgrp {
655*724ba675SRob Herring			fsl,pins = <
656*724ba675SRob Herring				MX51_PAD_KEY_ROW0__KEY_ROW0		0xe0
657*724ba675SRob Herring				MX51_PAD_KEY_ROW1__KEY_ROW1		0xe0
658*724ba675SRob Herring				MX51_PAD_KEY_ROW2__KEY_ROW2		0xe0
659*724ba675SRob Herring				MX51_PAD_KEY_ROW3__KEY_ROW3		0xe0
660*724ba675SRob Herring				MX51_PAD_KEY_COL0__KEY_COL0		0xe8
661*724ba675SRob Herring				MX51_PAD_KEY_COL1__KEY_COL1		0xe8
662*724ba675SRob Herring				MX51_PAD_KEY_COL2__KEY_COL2		0xe8
663*724ba675SRob Herring				MX51_PAD_KEY_COL3__KEY_COL3		0xe8
664*724ba675SRob Herring			>;
665*724ba675SRob Herring		};
666*724ba675SRob Herring
667*724ba675SRob Herring		pinctrl_pmic: pmicgrp {
668*724ba675SRob Herring			fsl,pins = <
669*724ba675SRob Herring				MX51_PAD_GPIO1_8__GPIO1_8		0xe5 /* IRQ */
670*724ba675SRob Herring			>;
671*724ba675SRob Herring		};
672*724ba675SRob Herring
673*724ba675SRob Herring		pinctrl_uart1: uart1grp {
674*724ba675SRob Herring			fsl,pins = <
675*724ba675SRob Herring				MX51_PAD_UART1_RXD__UART1_RXD		0x1c5
676*724ba675SRob Herring				MX51_PAD_UART1_TXD__UART1_TXD		0x1c5
677*724ba675SRob Herring				MX51_PAD_UART1_RTS__UART1_RTS		0x1c5
678*724ba675SRob Herring				MX51_PAD_UART1_CTS__UART1_CTS		0x1c5
679*724ba675SRob Herring			>;
680*724ba675SRob Herring		};
681*724ba675SRob Herring
682*724ba675SRob Herring		pinctrl_uart2: uart2grp {
683*724ba675SRob Herring			fsl,pins = <
684*724ba675SRob Herring				MX51_PAD_UART2_RXD__UART2_RXD		0x1c5
685*724ba675SRob Herring				MX51_PAD_UART2_TXD__UART2_TXD		0x1c5
686*724ba675SRob Herring			>;
687*724ba675SRob Herring		};
688*724ba675SRob Herring
689*724ba675SRob Herring		pinctrl_uart3: uart3grp {
690*724ba675SRob Herring			fsl,pins = <
691*724ba675SRob Herring				MX51_PAD_EIM_D25__UART3_RXD		0x1c5
692*724ba675SRob Herring				MX51_PAD_EIM_D26__UART3_TXD		0x1c5
693*724ba675SRob Herring				MX51_PAD_EIM_D27__UART3_RTS		0x1c5
694*724ba675SRob Herring				MX51_PAD_EIM_D24__UART3_CTS		0x1c5
695*724ba675SRob Herring			>;
696*724ba675SRob Herring		};
697*724ba675SRob Herring
698*724ba675SRob Herring		pinctrl_usbh1: usbh1grp {
699*724ba675SRob Herring			fsl,pins = <
700*724ba675SRob Herring				MX51_PAD_USBH1_CLK__USBH1_CLK		0x80000000
701*724ba675SRob Herring				MX51_PAD_USBH1_DIR__USBH1_DIR		0x80000000
702*724ba675SRob Herring				MX51_PAD_USBH1_NXT__USBH1_NXT		0x80000000
703*724ba675SRob Herring				MX51_PAD_USBH1_DATA0__USBH1_DATA0	0x80000000
704*724ba675SRob Herring				MX51_PAD_USBH1_DATA1__USBH1_DATA1	0x80000000
705*724ba675SRob Herring				MX51_PAD_USBH1_DATA2__USBH1_DATA2	0x80000000
706*724ba675SRob Herring				MX51_PAD_USBH1_DATA3__USBH1_DATA3	0x80000000
707*724ba675SRob Herring				MX51_PAD_USBH1_DATA4__USBH1_DATA4	0x80000000
708*724ba675SRob Herring				MX51_PAD_USBH1_DATA5__USBH1_DATA5	0x80000000
709*724ba675SRob Herring				MX51_PAD_USBH1_DATA6__USBH1_DATA6	0x80000000
710*724ba675SRob Herring				MX51_PAD_USBH1_DATA7__USBH1_DATA7	0x80000000
711*724ba675SRob Herring			>;
712*724ba675SRob Herring		};
713*724ba675SRob Herring
714*724ba675SRob Herring		pinctrl_usbh1reg: usbh1reggrp {
715*724ba675SRob Herring			fsl,pins = <
716*724ba675SRob Herring				MX51_PAD_EIM_D21__GPIO2_5		0x85
717*724ba675SRob Herring			>;
718*724ba675SRob Herring		};
719*724ba675SRob Herring
720*724ba675SRob Herring		pinctrl_usbotgreg: usbotgreggrp {
721*724ba675SRob Herring			fsl,pins = <
722*724ba675SRob Herring				MX51_PAD_GPIO1_7__GPIO1_7		0x85
723*724ba675SRob Herring			>;
724*724ba675SRob Herring		};
725*724ba675SRob Herring	};
726*724ba675SRob Herring};
727