xref: /linux/scripts/dtc/include-prefixes/arm/nxp/imx/imx50-evk.dts (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+
2*724ba675SRob Herring//
3*724ba675SRob Herring// Copyright 2013 Greg Ungerer <gerg@uclinux.org>
4*724ba675SRob Herring// Copyright 2011 Freescale Semiconductor, Inc.
5*724ba675SRob Herring// Copyright 2011 Linaro Ltd.
6*724ba675SRob Herring
7*724ba675SRob Herring/dts-v1/;
8*724ba675SRob Herring#include "imx50.dtsi"
9*724ba675SRob Herring
10*724ba675SRob Herring/ {
11*724ba675SRob Herring	model = "Freescale i.MX50 Evaluation Kit";
12*724ba675SRob Herring	compatible = "fsl,imx50-evk", "fsl,imx50";
13*724ba675SRob Herring
14*724ba675SRob Herring	memory@70000000 {
15*724ba675SRob Herring		device_type = "memory";
16*724ba675SRob Herring		reg = <0x70000000 0x80000000>;
17*724ba675SRob Herring	};
18*724ba675SRob Herring};
19*724ba675SRob Herring
20*724ba675SRob Herring&cspi {
21*724ba675SRob Herring	pinctrl-names = "default";
22*724ba675SRob Herring	pinctrl-0 = <&pinctrl_cspi>;
23*724ba675SRob Herring	cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>, <&gpio4 13 GPIO_ACTIVE_LOW>;
24*724ba675SRob Herring	status = "okay";
25*724ba675SRob Herring
26*724ba675SRob Herring	flash: m25p32@1 {
27*724ba675SRob Herring		#address-cells = <1>;
28*724ba675SRob Herring		#size-cells = <1>;
29*724ba675SRob Herring		compatible = "m25p32", "jedec,spi-nor";
30*724ba675SRob Herring		spi-max-frequency = <25000000>;
31*724ba675SRob Herring		reg = <1>;
32*724ba675SRob Herring
33*724ba675SRob Herring		partition@0 {
34*724ba675SRob Herring			label = "bootloader";
35*724ba675SRob Herring			reg = <0x0 0x100000>;
36*724ba675SRob Herring			read-only;
37*724ba675SRob Herring		};
38*724ba675SRob Herring
39*724ba675SRob Herring		partition@100000 {
40*724ba675SRob Herring			label = "kernel";
41*724ba675SRob Herring			reg = <0x100000 0x300000>;
42*724ba675SRob Herring		};
43*724ba675SRob Herring	};
44*724ba675SRob Herring};
45*724ba675SRob Herring
46*724ba675SRob Herring&fec {
47*724ba675SRob Herring	pinctrl-names = "default";
48*724ba675SRob Herring	pinctrl-0 = <&pinctrl_fec>;
49*724ba675SRob Herring	phy-mode = "rmii";
50*724ba675SRob Herring	phy-reset-gpios = <&gpio4 12 GPIO_ACTIVE_LOW>;
51*724ba675SRob Herring	status = "okay";
52*724ba675SRob Herring};
53*724ba675SRob Herring
54*724ba675SRob Herring&iomuxc {
55*724ba675SRob Herring	imx50-evk {
56*724ba675SRob Herring		pinctrl_cspi: cspigrp {
57*724ba675SRob Herring			fsl,pins = <
58*724ba675SRob Herring				MX50_PAD_CSPI_SCLK__CSPI_SCLK		0x00
59*724ba675SRob Herring				MX50_PAD_CSPI_MISO__CSPI_MISO		0x00
60*724ba675SRob Herring				MX50_PAD_CSPI_MOSI__CSPI_MOSI		0x00
61*724ba675SRob Herring				MX50_PAD_CSPI_SS0__GPIO4_11		0xc4
62*724ba675SRob Herring				MX50_PAD_ECSPI1_MOSI__GPIO4_13		0x84
63*724ba675SRob Herring			>;
64*724ba675SRob Herring		};
65*724ba675SRob Herring
66*724ba675SRob Herring		pinctrl_fec: fecgrp {
67*724ba675SRob Herring			fsl,pins = <
68*724ba675SRob Herring				MX50_PAD_SSI_RXFS__FEC_MDC		0x80
69*724ba675SRob Herring				MX50_PAD_SSI_RXC__FEC_MDIO		0x80
70*724ba675SRob Herring				MX50_PAD_DISP_D0__FEC_TX_CLK		0x80
71*724ba675SRob Herring				MX50_PAD_DISP_D1__FEC_RX_ERR		0x80
72*724ba675SRob Herring				MX50_PAD_DISP_D2__FEC_RX_DV		0x80
73*724ba675SRob Herring				MX50_PAD_DISP_D3__FEC_RDATA_1		0x80
74*724ba675SRob Herring				MX50_PAD_DISP_D4__FEC_RDATA_0		0x80
75*724ba675SRob Herring				MX50_PAD_DISP_D5__FEC_TX_EN		0x80
76*724ba675SRob Herring				MX50_PAD_DISP_D6__FEC_TDATA_1		0x80
77*724ba675SRob Herring				MX50_PAD_DISP_D7__FEC_TDATA_0		0x80
78*724ba675SRob Herring			>;
79*724ba675SRob Herring		};
80*724ba675SRob Herring
81*724ba675SRob Herring		pinctrl_uart1: uart1grp {
82*724ba675SRob Herring			fsl,pins = <
83*724ba675SRob Herring				MX50_PAD_UART1_TXD__UART1_TXD_MUX	0x1e4
84*724ba675SRob Herring				MX50_PAD_UART1_RXD__UART1_RXD_MUX	0x1e4
85*724ba675SRob Herring				MX50_PAD_UART1_RTS__UART1_RTS		0x1e4
86*724ba675SRob Herring				MX50_PAD_UART1_CTS__UART1_CTS		0x1e4
87*724ba675SRob Herring			>;
88*724ba675SRob Herring		};
89*724ba675SRob Herring	};
90*724ba675SRob Herring};
91*724ba675SRob Herring
92*724ba675SRob Herring&uart1 {
93*724ba675SRob Herring	pinctrl-names = "default";
94*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart1>;
95*724ba675SRob Herring	status = "okay";
96*724ba675SRob Herring};
97*724ba675SRob Herring
98*724ba675SRob Herring&usbh1 {
99*724ba675SRob Herring	status = "okay";
100*724ba675SRob Herring};
101*724ba675SRob Herring
102*724ba675SRob Herring&usbotg {
103*724ba675SRob Herring	status = "okay";
104*724ba675SRob Herring};
105