xref: /linux/scripts/dtc/include-prefixes/arm/nxp/imx/imx35-pdk.dts (revision c771600c6af14749609b49565ffb4cac2959710d)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+
2*724ba675SRob Herring//
3*724ba675SRob Herring// Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
4*724ba675SRob Herring// Copyright 2014 Freescale Semiconductor, Inc.
5*724ba675SRob Herring
6*724ba675SRob Herring/dts-v1/;
7*724ba675SRob Herring#include "imx35.dtsi"
8*724ba675SRob Herring
9*724ba675SRob Herring/ {
10*724ba675SRob Herring	model = "Freescale i.MX35 Product Development Kit";
11*724ba675SRob Herring	compatible = "fsl,imx35-pdk", "fsl,imx35";
12*724ba675SRob Herring
13*724ba675SRob Herring	memory@80000000 {
14*724ba675SRob Herring		device_type = "memory";
15*724ba675SRob Herring		reg = <0x80000000 0x8000000>,
16*724ba675SRob Herring		      <0x90000000 0x8000000>;
17*724ba675SRob Herring	};
18*724ba675SRob Herring};
19*724ba675SRob Herring
20*724ba675SRob Herring&esdhc1 {
21*724ba675SRob Herring	pinctrl-names = "default";
22*724ba675SRob Herring	pinctrl-0 = <&pinctrl_esdhc1>;
23*724ba675SRob Herring	status = "okay";
24*724ba675SRob Herring};
25*724ba675SRob Herring
26*724ba675SRob Herring&iomuxc {
27*724ba675SRob Herring	pinctrl_esdhc1: esdhc1grp {
28*724ba675SRob Herring		fsl,pins = <
29*724ba675SRob Herring			MX35_PAD_SD1_CMD__ESDHC1_CMD		0x80000000
30*724ba675SRob Herring			MX35_PAD_SD1_CLK__ESDHC1_CLK		0x80000000
31*724ba675SRob Herring			MX35_PAD_SD1_DATA0__ESDHC1_DAT0		0x80000000
32*724ba675SRob Herring			MX35_PAD_SD1_DATA1__ESDHC1_DAT1		0x80000000
33*724ba675SRob Herring			MX35_PAD_SD1_DATA2__ESDHC1_DAT2		0x80000000
34*724ba675SRob Herring			MX35_PAD_SD1_DATA3__ESDHC1_DAT3		0x80000000
35*724ba675SRob Herring		>;
36*724ba675SRob Herring	};
37*724ba675SRob Herring
38*724ba675SRob Herring	pinctrl_uart1: uart1grp {
39*724ba675SRob Herring		fsl,pins = <
40*724ba675SRob Herring			MX35_PAD_TXD1__UART1_TXD_MUX		0x1c5
41*724ba675SRob Herring			MX35_PAD_RXD1__UART1_RXD_MUX		0x1c5
42*724ba675SRob Herring			MX35_PAD_CTS1__UART1_CTS		0x1c5
43*724ba675SRob Herring			MX35_PAD_RTS1__UART1_RTS		0x1c5
44*724ba675SRob Herring		>;
45*724ba675SRob Herring	};
46*724ba675SRob Herring};
47*724ba675SRob Herring
48*724ba675SRob Herring&nfc {
49*724ba675SRob Herring	nand-bus-width = <16>;
50*724ba675SRob Herring	nand-ecc-mode = "hw";
51*724ba675SRob Herring	nand-on-flash-bbt;
52*724ba675SRob Herring	status = "okay";
53*724ba675SRob Herring};
54*724ba675SRob Herring
55*724ba675SRob Herring&uart1 {
56*724ba675SRob Herring	pinctrl-names = "default";
57*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart1>;
58*724ba675SRob Herring	uart-has-rtscts;
59*724ba675SRob Herring	status = "okay";
60*724ba675SRob Herring};
61