1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright 2013 Eukréa Electromatique <denis@eukrea.com> 4724ba675SRob Herring */ 5724ba675SRob Herring 6724ba675SRob Herring#include "imx35.dtsi" 7724ba675SRob Herring 8724ba675SRob Herring/ { 9724ba675SRob Herring model = "Eukrea CPUIMX35"; 10724ba675SRob Herring compatible = "eukrea,cpuimx35", "fsl,imx35"; 11724ba675SRob Herring 12724ba675SRob Herring memory@80000000 { 13724ba675SRob Herring device_type = "memory"; 14724ba675SRob Herring reg = <0x80000000 0x8000000>; /* 128M */ 15724ba675SRob Herring }; 16724ba675SRob Herring}; 17724ba675SRob Herring 18724ba675SRob Herring&fec { 19724ba675SRob Herring pinctrl-names = "default"; 20724ba675SRob Herring pinctrl-0 = <&pinctrl_fec>; 21724ba675SRob Herring status = "okay"; 22724ba675SRob Herring}; 23724ba675SRob Herring 24724ba675SRob Herring&i2c1 { 25724ba675SRob Herring pinctrl-names = "default"; 26724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 27724ba675SRob Herring status = "okay"; 28724ba675SRob Herring 29724ba675SRob Herring pcf8563@51 { 30724ba675SRob Herring compatible = "nxp,pcf8563"; 31724ba675SRob Herring reg = <0x51>; 32724ba675SRob Herring }; 33724ba675SRob Herring 34724ba675SRob Herring tsc2007: tsc2007@48 { 35724ba675SRob Herring compatible = "ti,tsc2007"; 36724ba675SRob Herring gpios = <&gpio3 2 0>; 37724ba675SRob Herring interrupt-parent = <&gpio3>; 38724ba675SRob Herring interrupts = <0x2 0x8>; 39724ba675SRob Herring pinctrl-names = "default"; 40724ba675SRob Herring pinctrl-0 = <&pinctrl_tsc2007_1>; 41724ba675SRob Herring reg = <0x48>; 42724ba675SRob Herring ti,x-plate-ohms = <180>; 43724ba675SRob Herring }; 44724ba675SRob Herring}; 45724ba675SRob Herring 46724ba675SRob Herring&iomuxc { 47724ba675SRob Herring pinctrl_fec: fecgrp { 48724ba675SRob Herring fsl,pins = < 49724ba675SRob Herring MX35_PAD_FEC_TX_CLK__FEC_TX_CLK 0x80000000 50724ba675SRob Herring MX35_PAD_FEC_RX_CLK__FEC_RX_CLK 0x80000000 51724ba675SRob Herring MX35_PAD_FEC_RX_DV__FEC_RX_DV 0x80000000 52724ba675SRob Herring MX35_PAD_FEC_COL__FEC_COL 0x80000000 53724ba675SRob Herring MX35_PAD_FEC_RDATA0__FEC_RDATA_0 0x80000000 54724ba675SRob Herring MX35_PAD_FEC_TDATA0__FEC_TDATA_0 0x80000000 55724ba675SRob Herring MX35_PAD_FEC_TX_EN__FEC_TX_EN 0x80000000 56724ba675SRob Herring MX35_PAD_FEC_MDC__FEC_MDC 0x80000000 57724ba675SRob Herring MX35_PAD_FEC_MDIO__FEC_MDIO 0x80000000 58724ba675SRob Herring MX35_PAD_FEC_TX_ERR__FEC_TX_ERR 0x80000000 59724ba675SRob Herring MX35_PAD_FEC_RX_ERR__FEC_RX_ERR 0x80000000 60724ba675SRob Herring MX35_PAD_FEC_CRS__FEC_CRS 0x80000000 61724ba675SRob Herring MX35_PAD_FEC_RDATA1__FEC_RDATA_1 0x80000000 62724ba675SRob Herring MX35_PAD_FEC_TDATA1__FEC_TDATA_1 0x80000000 63724ba675SRob Herring MX35_PAD_FEC_RDATA2__FEC_RDATA_2 0x80000000 64724ba675SRob Herring MX35_PAD_FEC_TDATA2__FEC_TDATA_2 0x80000000 65724ba675SRob Herring MX35_PAD_FEC_RDATA3__FEC_RDATA_3 0x80000000 66724ba675SRob Herring MX35_PAD_FEC_TDATA3__FEC_TDATA_3 0x80000000 67724ba675SRob Herring >; 68724ba675SRob Herring }; 69724ba675SRob Herring 70724ba675SRob Herring pinctrl_i2c1: i2c1grp { 71724ba675SRob Herring fsl,pins = < 72724ba675SRob Herring MX35_PAD_I2C1_CLK__I2C1_SCL 0x80000000 73724ba675SRob Herring MX35_PAD_I2C1_DAT__I2C1_SDA 0x80000000 74724ba675SRob Herring >; 75724ba675SRob Herring }; 76724ba675SRob Herring 77*4f3a5cbcSMarek Vasut pinctrl_tsc2007_1: tsc2007-1-grp { 78724ba675SRob Herring fsl,pins = <MX35_PAD_ATA_DA2__GPIO3_2 0x80000000>; 79724ba675SRob Herring }; 80724ba675SRob Herring}; 81724ba675SRob Herring 82724ba675SRob Herring&nfc { 83724ba675SRob Herring nand-bus-width = <8>; 84724ba675SRob Herring nand-ecc-mode = "hw"; 85724ba675SRob Herring nand-on-flash-bbt; 86724ba675SRob Herring status = "okay"; 87724ba675SRob Herring}; 88