xref: /linux/scripts/dtc/include-prefixes/arm/nxp/imx/imx27-eukrea-cpuimx27.dtsi (revision 06d07429858317ded2db7986113a9e0129cd599b)
1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later
2724ba675SRob Herring/*
3724ba675SRob Herring * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
4724ba675SRob Herring */
5724ba675SRob Herring
6724ba675SRob Herring/dts-v1/;
7724ba675SRob Herring#include "imx27.dtsi"
8724ba675SRob Herring
9724ba675SRob Herring/ {
10724ba675SRob Herring	model = "Eukrea CPUIMX27";
11724ba675SRob Herring	compatible = "eukrea,cpuimx27", "fsl,imx27";
12724ba675SRob Herring
13724ba675SRob Herring	memory@a0000000 {
14724ba675SRob Herring		device_type = "memory";
15724ba675SRob Herring		reg = <0xa0000000 0x04000000>;
16724ba675SRob Herring	};
17724ba675SRob Herring
18724ba675SRob Herring	clk14745600: clk-uart {
19724ba675SRob Herring		compatible = "fixed-clock";
20724ba675SRob Herring		#clock-cells = <0>;
21724ba675SRob Herring		clock-frequency = <14745600>;
22724ba675SRob Herring	};
23724ba675SRob Herring};
24724ba675SRob Herring
25724ba675SRob Herring&fec {
26724ba675SRob Herring	pinctrl-names = "default";
27724ba675SRob Herring	pinctrl-0 = <&pinctrl_fec>;
28724ba675SRob Herring	status = "okay";
29724ba675SRob Herring};
30724ba675SRob Herring
31724ba675SRob Herring&i2c1 {
32724ba675SRob Herring	pinctrl-names = "default";
33724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c1>;
34724ba675SRob Herring	status = "okay";
35724ba675SRob Herring
3668c711b8SFabio Estevam	rtc@51 {
37724ba675SRob Herring		compatible = "nxp,pcf8563";
38724ba675SRob Herring		reg = <0x51>;
39724ba675SRob Herring	};
40724ba675SRob Herring};
41724ba675SRob Herring
42724ba675SRob Herring&nfc {
43724ba675SRob Herring	pinctrl-names = "default";
44724ba675SRob Herring	pinctrl-0 = <&pinctrl_nfc>;
45724ba675SRob Herring	nand-bus-width = <8>;
46724ba675SRob Herring	nand-ecc-mode = "hw";
47724ba675SRob Herring	nand-on-flash-bbt;
48724ba675SRob Herring	status = "okay";
49724ba675SRob Herring};
50724ba675SRob Herring
51724ba675SRob Herring&owire {
52724ba675SRob Herring	pinctrl-names = "default";
53724ba675SRob Herring	pinctrl-0 = <&pinctrl_owire>;
54724ba675SRob Herring	status = "okay";
55724ba675SRob Herring};
56724ba675SRob Herring
57724ba675SRob Herring&sdhci2 {
58724ba675SRob Herring	pinctrl-names = "default";
59724ba675SRob Herring	pinctrl-0 = <&pinctrl_sdhc2>;
60724ba675SRob Herring	bus-width = <4>;
61724ba675SRob Herring	non-removable;
62724ba675SRob Herring	status = "okay";
63724ba675SRob Herring};
64724ba675SRob Herring
65724ba675SRob Herring&uart4 {
66724ba675SRob Herring	pinctrl-names = "default";
67724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart4>;
68724ba675SRob Herring	uart-has-rtscts;
69724ba675SRob Herring	status = "okay";
70724ba675SRob Herring};
71724ba675SRob Herring
72724ba675SRob Herring&usbh2 {
73724ba675SRob Herring	pinctrl-names = "default";
74724ba675SRob Herring	pinctrl-0 = <&pinctrl_usbh2>;
75724ba675SRob Herring	dr_mode = "host";
76724ba675SRob Herring	phy_type = "ulpi";
77724ba675SRob Herring	disable-over-current;
78724ba675SRob Herring	status = "okay";
79724ba675SRob Herring};
80724ba675SRob Herring
81724ba675SRob Herring&usbotg {
82724ba675SRob Herring	pinctrl-names = "default";
83724ba675SRob Herring	pinctrl-0 = <&pinctrl_usbotg>;
84724ba675SRob Herring	dr_mode = "otg";
85724ba675SRob Herring	phy_type = "ulpi";
86724ba675SRob Herring	disable-over-current;
87724ba675SRob Herring	status = "okay";
88724ba675SRob Herring};
89724ba675SRob Herring
90724ba675SRob Herring&weim {
91724ba675SRob Herring	status = "okay";
92724ba675SRob Herring
93*1e1d7cc4SFabio Estevam	nor: flash@0,0 {
94724ba675SRob Herring		#address-cells = <1>;
95724ba675SRob Herring		#size-cells = <1>;
96724ba675SRob Herring		compatible = "cfi-flash";
97724ba675SRob Herring		reg = <0 0x00000000 0x04000000>;
98724ba675SRob Herring		bank-width = <2>;
99724ba675SRob Herring		linux,mtd-name = "physmap-flash.0";
100724ba675SRob Herring		fsl,weim-cs-timing = <0x00008f03 0xa0330d01 0x002208c0>;
101724ba675SRob Herring	};
102724ba675SRob Herring
103724ba675SRob Herring	uart8250@3,200000 {
104724ba675SRob Herring		pinctrl-names = "default";
105724ba675SRob Herring		pinctrl-0 = <&pinctrl_uart8250_1>;
106724ba675SRob Herring		compatible = "ns8250";
107724ba675SRob Herring		clocks = <&clk14745600>;
108724ba675SRob Herring		fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>;
109724ba675SRob Herring		interrupts = <&gpio2 23 IRQ_TYPE_LEVEL_LOW>;
110724ba675SRob Herring		reg = <3 0x200000 0x1000>;
111724ba675SRob Herring		reg-shift = <1>;
112724ba675SRob Herring		reg-io-width = <1>;
113724ba675SRob Herring		no-loopback-test;
114724ba675SRob Herring	};
115724ba675SRob Herring
116724ba675SRob Herring	uart8250@3,400000 {
117724ba675SRob Herring		pinctrl-names = "default";
118724ba675SRob Herring		pinctrl-0 = <&pinctrl_uart8250_2>;
119724ba675SRob Herring		compatible = "ns8250";
120724ba675SRob Herring		clocks = <&clk14745600>;
121724ba675SRob Herring		fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>;
122724ba675SRob Herring		interrupts = <&gpio2 22 IRQ_TYPE_LEVEL_LOW>;
123724ba675SRob Herring		reg = <3 0x400000 0x1000>;
124724ba675SRob Herring		reg-shift = <1>;
125724ba675SRob Herring		reg-io-width = <1>;
126724ba675SRob Herring		no-loopback-test;
127724ba675SRob Herring	};
128724ba675SRob Herring
129724ba675SRob Herring	uart8250@3,800000 {
130724ba675SRob Herring		pinctrl-names = "default";
131724ba675SRob Herring		pinctrl-0 = <&pinctrl_uart8250_3>;
132724ba675SRob Herring		compatible = "ns8250";
133724ba675SRob Herring		clocks = <&clk14745600>;
134724ba675SRob Herring		fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>;
135724ba675SRob Herring		interrupts = <&gpio2 27 IRQ_TYPE_LEVEL_LOW>;
136724ba675SRob Herring		reg = <3 0x800000 0x1000>;
137724ba675SRob Herring		reg-shift = <1>;
138724ba675SRob Herring		reg-io-width = <1>;
139724ba675SRob Herring		no-loopback-test;
140724ba675SRob Herring	};
141724ba675SRob Herring
142724ba675SRob Herring	uart8250@3,1000000 {
143724ba675SRob Herring		pinctrl-names = "default";
144724ba675SRob Herring		pinctrl-0 = <&pinctrl_uart8250_4>;
145724ba675SRob Herring		compatible = "ns8250";
146724ba675SRob Herring		clocks = <&clk14745600>;
147724ba675SRob Herring		fsl,weim-cs-timing = <0x0000d603 0x0d1d0d01 0x00d20000>;
148724ba675SRob Herring		interrupts = <&gpio2 30 IRQ_TYPE_LEVEL_LOW>;
149724ba675SRob Herring		reg = <3 0x1000000 0x1000>;
150724ba675SRob Herring		reg-shift = <1>;
151724ba675SRob Herring		reg-io-width = <1>;
152724ba675SRob Herring		no-loopback-test;
153724ba675SRob Herring	};
154724ba675SRob Herring};
155724ba675SRob Herring
156724ba675SRob Herring&iomuxc {
157724ba675SRob Herring	imx27-eukrea-cpuimx27 {
158724ba675SRob Herring		pinctrl_fec: fecgrp {
159724ba675SRob Herring			fsl,pins = <
160724ba675SRob Herring				MX27_PAD_SD3_CMD__FEC_TXD0		0x0
161724ba675SRob Herring				MX27_PAD_SD3_CLK__FEC_TXD1		0x0
162724ba675SRob Herring				MX27_PAD_ATA_DATA0__FEC_TXD2		0x0
163724ba675SRob Herring				MX27_PAD_ATA_DATA1__FEC_TXD3		0x0
164724ba675SRob Herring				MX27_PAD_ATA_DATA2__FEC_RX_ER		0x0
165724ba675SRob Herring				MX27_PAD_ATA_DATA3__FEC_RXD1		0x0
166724ba675SRob Herring				MX27_PAD_ATA_DATA4__FEC_RXD2		0x0
167724ba675SRob Herring				MX27_PAD_ATA_DATA5__FEC_RXD3		0x0
168724ba675SRob Herring				MX27_PAD_ATA_DATA6__FEC_MDIO		0x0
169724ba675SRob Herring				MX27_PAD_ATA_DATA7__FEC_MDC		0x0
170724ba675SRob Herring				MX27_PAD_ATA_DATA8__FEC_CRS		0x0
171724ba675SRob Herring				MX27_PAD_ATA_DATA9__FEC_TX_CLK		0x0
172724ba675SRob Herring				MX27_PAD_ATA_DATA10__FEC_RXD0		0x0
173724ba675SRob Herring				MX27_PAD_ATA_DATA11__FEC_RX_DV		0x0
174724ba675SRob Herring				MX27_PAD_ATA_DATA12__FEC_RX_CLK		0x0
175724ba675SRob Herring				MX27_PAD_ATA_DATA13__FEC_COL		0x0
176724ba675SRob Herring				MX27_PAD_ATA_DATA14__FEC_TX_ER		0x0
177724ba675SRob Herring				MX27_PAD_ATA_DATA15__FEC_TX_EN		0x0
178724ba675SRob Herring			>;
179724ba675SRob Herring		};
180724ba675SRob Herring
181724ba675SRob Herring		pinctrl_i2c1: i2c1grp {
182724ba675SRob Herring			fsl,pins = <
183724ba675SRob Herring				MX27_PAD_I2C_DATA__I2C_DATA		0x0
184724ba675SRob Herring				MX27_PAD_I2C_CLK__I2C_CLK		0x0
185724ba675SRob Herring			>;
186724ba675SRob Herring		};
187724ba675SRob Herring
188724ba675SRob Herring		pinctrl_nfc: nfcgrp {
189724ba675SRob Herring			fsl,pins = <
190724ba675SRob Herring				MX27_PAD_NFRB__NFRB			0x0
191724ba675SRob Herring				MX27_PAD_NFCLE__NFCLE			0x0
192724ba675SRob Herring				MX27_PAD_NFWP_B__NFWP_B			0x0
193724ba675SRob Herring				MX27_PAD_NFCE_B__NFCE_B			0x0
194724ba675SRob Herring				MX27_PAD_NFALE__NFALE			0x0
195724ba675SRob Herring				MX27_PAD_NFRE_B__NFRE_B			0x0
196724ba675SRob Herring				MX27_PAD_NFWE_B__NFWE_B			0x0
197724ba675SRob Herring			>;
198724ba675SRob Herring		};
199724ba675SRob Herring
200724ba675SRob Herring		pinctrl_owire: owiregrp {
201724ba675SRob Herring			fsl,pins = <
202724ba675SRob Herring				MX27_PAD_RTCK__OWIRE			0x0
203724ba675SRob Herring			>;
204724ba675SRob Herring		};
205724ba675SRob Herring
206724ba675SRob Herring		pinctrl_sdhc2: sdhc2grp {
207724ba675SRob Herring			fsl,pins = <
208724ba675SRob Herring				MX27_PAD_SD2_CLK__SD2_CLK		0x0
209724ba675SRob Herring				MX27_PAD_SD2_CMD__SD2_CMD		0x0
210724ba675SRob Herring				MX27_PAD_SD2_D0__SD2_D0			0x0
211724ba675SRob Herring				MX27_PAD_SD2_D1__SD2_D1			0x0
212724ba675SRob Herring				MX27_PAD_SD2_D2__SD2_D2			0x0
213724ba675SRob Herring				MX27_PAD_SD2_D3__SD2_D3			0x0
214724ba675SRob Herring			>;
215724ba675SRob Herring		};
216724ba675SRob Herring
217724ba675SRob Herring		pinctrl_uart4: uart4grp {
218724ba675SRob Herring			fsl,pins = <
219724ba675SRob Herring				MX27_PAD_USBH1_TXDM__UART4_TXD		0x0
220724ba675SRob Herring				MX27_PAD_USBH1_RXDP__UART4_RXD		0x0
221724ba675SRob Herring				MX27_PAD_USBH1_TXDP__UART4_CTS		0x0
222724ba675SRob Herring				MX27_PAD_USBH1_FS__UART4_RTS		0x0
223724ba675SRob Herring			>;
224724ba675SRob Herring		};
225724ba675SRob Herring
226724ba675SRob Herring		pinctrl_uart8250_1: uart82501grp {
227724ba675SRob Herring			fsl,pins = <
228724ba675SRob Herring				MX27_PAD_USB_PWR__GPIO2_23		0x0
229724ba675SRob Herring			>;
230724ba675SRob Herring		};
231724ba675SRob Herring
232724ba675SRob Herring		pinctrl_uart8250_2: uart82502grp {
233724ba675SRob Herring			fsl,pins = <
234724ba675SRob Herring				MX27_PAD_USBH1_SUSP__GPIO2_22		0x0
235724ba675SRob Herring			>;
236724ba675SRob Herring		};
237724ba675SRob Herring
238724ba675SRob Herring		pinctrl_uart8250_3: uart82503grp {
239724ba675SRob Herring			fsl,pins = <
240724ba675SRob Herring				MX27_PAD_USBH1_OE_B__GPIO2_27		0x0
241724ba675SRob Herring			>;
242724ba675SRob Herring		};
243724ba675SRob Herring
244724ba675SRob Herring		pinctrl_uart8250_4: uart82504grp {
245724ba675SRob Herring			fsl,pins = <
246724ba675SRob Herring				MX27_PAD_USBH1_RXDM__GPIO2_30		0x0
247724ba675SRob Herring			>;
248724ba675SRob Herring		};
249724ba675SRob Herring
250724ba675SRob Herring		pinctrl_usbh2: usbh2grp {
251724ba675SRob Herring			fsl,pins = <
252724ba675SRob Herring				MX27_PAD_USBH2_CLK__USBH2_CLK		0x0
253724ba675SRob Herring				MX27_PAD_USBH2_DIR__USBH2_DIR		0x0
254724ba675SRob Herring				MX27_PAD_USBH2_NXT__USBH2_NXT		0x0
255724ba675SRob Herring				MX27_PAD_USBH2_STP__USBH2_STP		0x0
256724ba675SRob Herring				MX27_PAD_CSPI2_SCLK__USBH2_DATA0	0x0
257724ba675SRob Herring				MX27_PAD_CSPI2_MOSI__USBH2_DATA1	0x0
258724ba675SRob Herring				MX27_PAD_CSPI2_MISO__USBH2_DATA2	0x0
259724ba675SRob Herring				MX27_PAD_CSPI2_SS1__USBH2_DATA3		0x0
260724ba675SRob Herring				MX27_PAD_CSPI2_SS2__USBH2_DATA4		0x0
261724ba675SRob Herring				MX27_PAD_CSPI1_SS2__USBH2_DATA5		0x0
262724ba675SRob Herring				MX27_PAD_CSPI2_SS0__USBH2_DATA6		0x0
263724ba675SRob Herring				MX27_PAD_USBH2_DATA7__USBH2_DATA7	0x0
264724ba675SRob Herring			>;
265724ba675SRob Herring		};
266724ba675SRob Herring
267724ba675SRob Herring		pinctrl_usbotg: usbotggrp {
268724ba675SRob Herring			fsl,pins = <
269724ba675SRob Herring				MX27_PAD_USBOTG_CLK__USBOTG_CLK		0x0
270724ba675SRob Herring				MX27_PAD_USBOTG_DIR__USBOTG_DIR		0x0
271724ba675SRob Herring				MX27_PAD_USBOTG_NXT__USBOTG_NXT		0x0
272724ba675SRob Herring				MX27_PAD_USBOTG_STP__USBOTG_STP		0x0
273724ba675SRob Herring				MX27_PAD_USBOTG_DATA0__USBOTG_DATA0	0x0
274724ba675SRob Herring				MX27_PAD_USBOTG_DATA1__USBOTG_DATA1	0x0
275724ba675SRob Herring				MX27_PAD_USBOTG_DATA2__USBOTG_DATA2	0x0
276724ba675SRob Herring				MX27_PAD_USBOTG_DATA3__USBOTG_DATA3	0x0
277724ba675SRob Herring				MX27_PAD_USBOTG_DATA4__USBOTG_DATA4	0x0
278724ba675SRob Herring				MX27_PAD_USBOTG_DATA5__USBOTG_DATA5	0x0
279724ba675SRob Herring				MX27_PAD_USBOTG_DATA6__USBOTG_DATA6	0x0
280724ba675SRob Herring				MX27_PAD_USBOTG_DATA7__USBOTG_DATA7	0x0
281724ba675SRob Herring			>;
282724ba675SRob Herring		};
283724ba675SRob Herring	};
284724ba675SRob Herring};
285