1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Copyright 2013 Armadeus Systems - <support@armadeus.com> 4*724ba675SRob Herring */ 5*724ba675SRob Herring 6*724ba675SRob Herring/* APF27Dev is a docking board for the APF27 SOM */ 7*724ba675SRob Herring#include "imx27-apf27.dts" 8*724ba675SRob Herring 9*724ba675SRob Herring/ { 10*724ba675SRob Herring model = "Armadeus Systems APF27Dev docking/development board"; 11*724ba675SRob Herring compatible = "armadeus,imx27-apf27dev", "armadeus,imx27-apf27", "fsl,imx27"; 12*724ba675SRob Herring 13*724ba675SRob Herring display: display { 14*724ba675SRob Herring model = "Chimei-LW700AT9003"; 15*724ba675SRob Herring bits-per-pixel = <16>; /* non-standard but required */ 16*724ba675SRob Herring fsl,pcr = <0xfae80083>; /* non-standard but required */ 17*724ba675SRob Herring display-timings { 18*724ba675SRob Herring native-mode = <&timing0>; 19*724ba675SRob Herring timing0: 800x480 { 20*724ba675SRob Herring clock-frequency = <33000033>; 21*724ba675SRob Herring hactive = <800>; 22*724ba675SRob Herring vactive = <480>; 23*724ba675SRob Herring hback-porch = <96>; 24*724ba675SRob Herring hfront-porch = <96>; 25*724ba675SRob Herring vback-porch = <20>; 26*724ba675SRob Herring vfront-porch = <21>; 27*724ba675SRob Herring hsync-len = <64>; 28*724ba675SRob Herring vsync-len = <4>; 29*724ba675SRob Herring }; 30*724ba675SRob Herring }; 31*724ba675SRob Herring }; 32*724ba675SRob Herring 33*724ba675SRob Herring gpio-keys { 34*724ba675SRob Herring compatible = "gpio-keys"; 35*724ba675SRob Herring pinctrl-names = "default"; 36*724ba675SRob Herring pinctrl-0 = <&pinctrl_gpio_keys>; 37*724ba675SRob Herring 38*724ba675SRob Herring user-key { 39*724ba675SRob Herring label = "user"; 40*724ba675SRob Herring gpios = <&gpio6 13 GPIO_ACTIVE_HIGH>; 41*724ba675SRob Herring linux,code = <276>; /* BTN_EXTRA */ 42*724ba675SRob Herring }; 43*724ba675SRob Herring }; 44*724ba675SRob Herring 45*724ba675SRob Herring leds { 46*724ba675SRob Herring compatible = "gpio-leds"; 47*724ba675SRob Herring pinctrl-names = "default"; 48*724ba675SRob Herring pinctrl-0 = <&pinctrl_gpio_leds>; 49*724ba675SRob Herring 50*724ba675SRob Herring user { 51*724ba675SRob Herring label = "Heartbeat"; 52*724ba675SRob Herring gpios = <&gpio6 14 GPIO_ACTIVE_HIGH>; 53*724ba675SRob Herring linux,default-trigger = "heartbeat"; 54*724ba675SRob Herring }; 55*724ba675SRob Herring }; 56*724ba675SRob Herring 57*724ba675SRob Herring regulators { 58*724ba675SRob Herring compatible = "simple-bus"; 59*724ba675SRob Herring #address-cells = <1>; 60*724ba675SRob Herring #size-cells = <0>; 61*724ba675SRob Herring 62*724ba675SRob Herring reg_max5821: regulator@0 { 63*724ba675SRob Herring compatible = "regulator-fixed"; 64*724ba675SRob Herring reg = <0>; 65*724ba675SRob Herring regulator-name = "max5821-reg"; 66*724ba675SRob Herring regulator-min-microvolt = <2500000>; 67*724ba675SRob Herring regulator-max-microvolt = <2500000>; 68*724ba675SRob Herring regulator-always-on; 69*724ba675SRob Herring }; 70*724ba675SRob Herring }; 71*724ba675SRob Herring}; 72*724ba675SRob Herring 73*724ba675SRob Herring&cspi1 { 74*724ba675SRob Herring cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; 75*724ba675SRob Herring pinctrl-names = "default"; 76*724ba675SRob Herring pinctrl-0 = <&pinctrl_cspi1 &pinctrl_cspi1_cs>; 77*724ba675SRob Herring status = "okay"; 78*724ba675SRob Herring 79*724ba675SRob Herring adc@0 { 80*724ba675SRob Herring compatible = "maxim,max1027"; 81*724ba675SRob Herring reg = <0>; 82*724ba675SRob Herring interrupt-parent = <&gpio5>; 83*724ba675SRob Herring interrupts = <15 IRQ_TYPE_EDGE_FALLING>; 84*724ba675SRob Herring pinctrl-names = "default"; 85*724ba675SRob Herring pinctrl-0 = <&pinctrl_max1027>; 86*724ba675SRob Herring spi-max-frequency = <10000000>; 87*724ba675SRob Herring }; 88*724ba675SRob Herring}; 89*724ba675SRob Herring 90*724ba675SRob Herring&cspi2 { 91*724ba675SRob Herring cs-gpios = <&gpio4 21 GPIO_ACTIVE_LOW>, 92*724ba675SRob Herring <&gpio4 27 GPIO_ACTIVE_LOW>, 93*724ba675SRob Herring <&gpio2 17 GPIO_ACTIVE_LOW>; 94*724ba675SRob Herring pinctrl-names = "default"; 95*724ba675SRob Herring pinctrl-0 = <&pinctrl_cspi2 &pinctrl_cspi2_cs>; 96*724ba675SRob Herring status = "okay"; 97*724ba675SRob Herring}; 98*724ba675SRob Herring 99*724ba675SRob Herring&fb { 100*724ba675SRob Herring display = <&display>; 101*724ba675SRob Herring fsl,dmacr = <0x00020010>; 102*724ba675SRob Herring pinctrl-names = "default"; 103*724ba675SRob Herring pinctrl-0 = <&pinctrl_imxfb1>; 104*724ba675SRob Herring status = "okay"; 105*724ba675SRob Herring}; 106*724ba675SRob Herring 107*724ba675SRob Herring&i2c1 { 108*724ba675SRob Herring clock-frequency = <400000>; 109*724ba675SRob Herring pinctrl-names = "default"; 110*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c1>; 111*724ba675SRob Herring status = "okay"; 112*724ba675SRob Herring 113*724ba675SRob Herring rtc@68 { 114*724ba675SRob Herring compatible = "dallas,ds1374"; 115*724ba675SRob Herring reg = <0x68>; 116*724ba675SRob Herring }; 117*724ba675SRob Herring 118*724ba675SRob Herring max5821@38 { 119*724ba675SRob Herring compatible = "maxim,max5821"; 120*724ba675SRob Herring reg = <0x38>; 121*724ba675SRob Herring vref-supply = <®_max5821>; 122*724ba675SRob Herring }; 123*724ba675SRob Herring}; 124*724ba675SRob Herring 125*724ba675SRob Herring&i2c2 { 126*724ba675SRob Herring pinctrl-names = "default"; 127*724ba675SRob Herring pinctrl-0 = <&pinctrl_i2c2>; 128*724ba675SRob Herring status = "okay"; 129*724ba675SRob Herring}; 130*724ba675SRob Herring 131*724ba675SRob Herring&iomuxc { 132*724ba675SRob Herring imx27-apf27dev { 133*724ba675SRob Herring pinctrl_cspi1: cspi1grp { 134*724ba675SRob Herring fsl,pins = < 135*724ba675SRob Herring MX27_PAD_CSPI1_MISO__CSPI1_MISO 0x0 136*724ba675SRob Herring MX27_PAD_CSPI1_MOSI__CSPI1_MOSI 0x0 137*724ba675SRob Herring MX27_PAD_CSPI1_SCLK__CSPI1_SCLK 0x0 138*724ba675SRob Herring >; 139*724ba675SRob Herring }; 140*724ba675SRob Herring 141*724ba675SRob Herring pinctrl_cspi1_cs: cspi1csgrp { 142*724ba675SRob Herring fsl,pins = <MX27_PAD_CSPI1_SS0__GPIO4_28 0x0>; 143*724ba675SRob Herring }; 144*724ba675SRob Herring 145*724ba675SRob Herring pinctrl_cspi2: cspi2grp { 146*724ba675SRob Herring fsl,pins = < 147*724ba675SRob Herring MX27_PAD_CSPI2_MISO__CSPI2_MISO 0x0 148*724ba675SRob Herring MX27_PAD_CSPI2_MOSI__CSPI2_MOSI 0x0 149*724ba675SRob Herring MX27_PAD_CSPI2_SCLK__CSPI2_SCLK 0x0 150*724ba675SRob Herring >; 151*724ba675SRob Herring }; 152*724ba675SRob Herring 153*724ba675SRob Herring pinctrl_cspi2_cs: cspi2csgrp { 154*724ba675SRob Herring fsl,pins = < 155*724ba675SRob Herring MX27_PAD_CSI_D5__GPIO2_17 0x0 156*724ba675SRob Herring MX27_PAD_CSPI2_SS0__GPIO4_21 0x0 157*724ba675SRob Herring MX27_PAD_CSPI1_SS1__GPIO4_27 0x0 158*724ba675SRob Herring >; 159*724ba675SRob Herring }; 160*724ba675SRob Herring 161*724ba675SRob Herring pinctrl_gpio_leds: gpioledsgrp { 162*724ba675SRob Herring fsl,pins = <MX27_PAD_PC_VS1__GPIO6_14 0x0>; 163*724ba675SRob Herring }; 164*724ba675SRob Herring 165*724ba675SRob Herring pinctrl_gpio_keys: gpiokeysgrp { 166*724ba675SRob Herring fsl,pins = <MX27_PAD_PC_VS2__GPIO6_13 0x0>; 167*724ba675SRob Herring }; 168*724ba675SRob Herring 169*724ba675SRob Herring pinctrl_imxfb1: imxfbgrp { 170*724ba675SRob Herring fsl,pins = < 171*724ba675SRob Herring MX27_PAD_CLS__CLS 0x0 172*724ba675SRob Herring MX27_PAD_CONTRAST__CONTRAST 0x0 173*724ba675SRob Herring MX27_PAD_LD0__LD0 0x0 174*724ba675SRob Herring MX27_PAD_LD1__LD1 0x0 175*724ba675SRob Herring MX27_PAD_LD2__LD2 0x0 176*724ba675SRob Herring MX27_PAD_LD3__LD3 0x0 177*724ba675SRob Herring MX27_PAD_LD4__LD4 0x0 178*724ba675SRob Herring MX27_PAD_LD5__LD5 0x0 179*724ba675SRob Herring MX27_PAD_LD6__LD6 0x0 180*724ba675SRob Herring MX27_PAD_LD7__LD7 0x0 181*724ba675SRob Herring MX27_PAD_LD8__LD8 0x0 182*724ba675SRob Herring MX27_PAD_LD9__LD9 0x0 183*724ba675SRob Herring MX27_PAD_LD10__LD10 0x0 184*724ba675SRob Herring MX27_PAD_LD11__LD11 0x0 185*724ba675SRob Herring MX27_PAD_LD12__LD12 0x0 186*724ba675SRob Herring MX27_PAD_LD13__LD13 0x0 187*724ba675SRob Herring MX27_PAD_LD14__LD14 0x0 188*724ba675SRob Herring MX27_PAD_LD15__LD15 0x0 189*724ba675SRob Herring MX27_PAD_LD16__LD16 0x0 190*724ba675SRob Herring MX27_PAD_LD17__LD17 0x0 191*724ba675SRob Herring MX27_PAD_LSCLK__LSCLK 0x0 192*724ba675SRob Herring MX27_PAD_OE_ACD__OE_ACD 0x0 193*724ba675SRob Herring MX27_PAD_PS__PS 0x0 194*724ba675SRob Herring MX27_PAD_REV__REV 0x0 195*724ba675SRob Herring MX27_PAD_SPL_SPR__SPL_SPR 0x0 196*724ba675SRob Herring MX27_PAD_HSYNC__HSYNC 0x0 197*724ba675SRob Herring MX27_PAD_VSYNC__VSYNC 0x0 198*724ba675SRob Herring >; 199*724ba675SRob Herring }; 200*724ba675SRob Herring 201*724ba675SRob Herring pinctrl_i2c1: i2c1grp { 202*724ba675SRob Herring fsl,pins = < 203*724ba675SRob Herring MX27_PAD_I2C_DATA__I2C_DATA 0x0 204*724ba675SRob Herring MX27_PAD_I2C_CLK__I2C_CLK 0x0 205*724ba675SRob Herring >; 206*724ba675SRob Herring }; 207*724ba675SRob Herring 208*724ba675SRob Herring pinctrl_i2c2: i2c2grp { 209*724ba675SRob Herring fsl,pins = < 210*724ba675SRob Herring MX27_PAD_I2C2_SDA__I2C2_SDA 0x0 211*724ba675SRob Herring MX27_PAD_I2C2_SCL__I2C2_SCL 0x0 212*724ba675SRob Herring >; 213*724ba675SRob Herring }; 214*724ba675SRob Herring 215*724ba675SRob Herring pinctrl_max1027: max1027 { 216*724ba675SRob Herring fsl,pins = < 217*724ba675SRob Herring MX27_PAD_UART1_CTS__GPIO5_14 0x0 /* CNVST */ 218*724ba675SRob Herring MX27_PAD_UART1_RTS__GPIO5_15 0x0 /* EOC */ 219*724ba675SRob Herring >; 220*724ba675SRob Herring }; 221*724ba675SRob Herring 222*724ba675SRob Herring pinctrl_pwm: pwmgrp { 223*724ba675SRob Herring fsl,pins = < 224*724ba675SRob Herring MX27_PAD_PWMO__PWMO 0x0 225*724ba675SRob Herring >; 226*724ba675SRob Herring }; 227*724ba675SRob Herring 228*724ba675SRob Herring pinctrl_sdhc2: sdhc2grp { 229*724ba675SRob Herring fsl,pins = < 230*724ba675SRob Herring MX27_PAD_SD2_CLK__SD2_CLK 0x0 231*724ba675SRob Herring MX27_PAD_SD2_CMD__SD2_CMD 0x0 232*724ba675SRob Herring MX27_PAD_SD2_D0__SD2_D0 0x0 233*724ba675SRob Herring MX27_PAD_SD2_D1__SD2_D1 0x0 234*724ba675SRob Herring MX27_PAD_SD2_D2__SD2_D2 0x0 235*724ba675SRob Herring MX27_PAD_SD2_D3__SD2_D3 0x0 236*724ba675SRob Herring >; 237*724ba675SRob Herring }; 238*724ba675SRob Herring 239*724ba675SRob Herring pinctrl_sdhc2_cd: sdhc2cdgrp { 240*724ba675SRob Herring fsl,pins = <MX27_PAD_TOUT__GPIO3_14 0x0>; 241*724ba675SRob Herring }; 242*724ba675SRob Herring }; 243*724ba675SRob Herring}; 244*724ba675SRob Herring 245*724ba675SRob Herring&sdhci2 { 246*724ba675SRob Herring bus-width = <4>; 247*724ba675SRob Herring cd-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>; 248*724ba675SRob Herring pinctrl-names = "default"; 249*724ba675SRob Herring pinctrl-0 = <&pinctrl_sdhc2 &pinctrl_sdhc2_cd>; 250*724ba675SRob Herring status = "okay"; 251*724ba675SRob Herring}; 252*724ba675SRob Herring 253*724ba675SRob Herring&pwm { 254*724ba675SRob Herring pinctrl-names = "default"; 255*724ba675SRob Herring pinctrl-0 = <&pinctrl_pwm>; 256*724ba675SRob Herring}; 257