1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+ 2*724ba675SRob Herring// 3*724ba675SRob Herring// Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> 4*724ba675SRob Herring 5*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 6*724ba675SRob Herring#include "imx25-pinfunc.h" 7*724ba675SRob Herring 8*724ba675SRob Herring/ { 9*724ba675SRob Herring #address-cells = <1>; 10*724ba675SRob Herring #size-cells = <1>; 11*724ba675SRob Herring /* 12*724ba675SRob Herring * The decompressor and also some bootloaders rely on a 13*724ba675SRob Herring * pre-existing /chosen node to be available to insert the 14*724ba675SRob Herring * command line and merge other ATAGS info. 15*724ba675SRob Herring */ 16*724ba675SRob Herring chosen {}; 17*724ba675SRob Herring 18*724ba675SRob Herring aliases { 19*724ba675SRob Herring ethernet0 = &fec; 20*724ba675SRob Herring gpio0 = &gpio1; 21*724ba675SRob Herring gpio1 = &gpio2; 22*724ba675SRob Herring gpio2 = &gpio3; 23*724ba675SRob Herring gpio3 = &gpio4; 24*724ba675SRob Herring i2c0 = &i2c1; 25*724ba675SRob Herring i2c1 = &i2c2; 26*724ba675SRob Herring i2c2 = &i2c3; 27*724ba675SRob Herring mmc0 = &esdhc1; 28*724ba675SRob Herring mmc1 = &esdhc2; 29*724ba675SRob Herring pwm0 = &pwm1; 30*724ba675SRob Herring pwm1 = &pwm2; 31*724ba675SRob Herring pwm2 = &pwm3; 32*724ba675SRob Herring pwm3 = &pwm4; 33*724ba675SRob Herring serial0 = &uart1; 34*724ba675SRob Herring serial1 = &uart2; 35*724ba675SRob Herring serial2 = &uart3; 36*724ba675SRob Herring serial3 = &uart4; 37*724ba675SRob Herring serial4 = &uart5; 38*724ba675SRob Herring spi0 = &spi1; 39*724ba675SRob Herring spi1 = &spi2; 40*724ba675SRob Herring spi2 = &spi3; 41*724ba675SRob Herring usb0 = &usbotg; 42*724ba675SRob Herring usb1 = &usbhost1; 43*724ba675SRob Herring }; 44*724ba675SRob Herring 45*724ba675SRob Herring cpus { 46*724ba675SRob Herring #address-cells = <1>; 47*724ba675SRob Herring #size-cells = <0>; 48*724ba675SRob Herring 49*724ba675SRob Herring cpu@0 { 50*724ba675SRob Herring compatible = "arm,arm926ej-s"; 51*724ba675SRob Herring device_type = "cpu"; 52*724ba675SRob Herring reg = <0>; 53*724ba675SRob Herring }; 54*724ba675SRob Herring }; 55*724ba675SRob Herring 56*724ba675SRob Herring asic: asic-interrupt-controller@68000000 { 57*724ba675SRob Herring compatible = "fsl,imx25-asic", "fsl,avic"; 58*724ba675SRob Herring interrupt-controller; 59*724ba675SRob Herring #interrupt-cells = <1>; 60*724ba675SRob Herring reg = <0x68000000 0x8000000>; 61*724ba675SRob Herring }; 62*724ba675SRob Herring 63*724ba675SRob Herring clocks { 64*724ba675SRob Herring osc { 65*724ba675SRob Herring compatible = "fixed-clock"; 66*724ba675SRob Herring #clock-cells = <0>; 67*724ba675SRob Herring clock-frequency = <24000000>; 68*724ba675SRob Herring }; 69*724ba675SRob Herring }; 70*724ba675SRob Herring 71*724ba675SRob Herring soc: soc { 72*724ba675SRob Herring #address-cells = <1>; 73*724ba675SRob Herring #size-cells = <1>; 74*724ba675SRob Herring compatible = "simple-bus"; 75*724ba675SRob Herring interrupt-parent = <&asic>; 76*724ba675SRob Herring ranges; 77*724ba675SRob Herring 78*724ba675SRob Herring bus@43f00000 { /* AIPS1 */ 79*724ba675SRob Herring compatible = "fsl,aips-bus", "simple-bus"; 80*724ba675SRob Herring #address-cells = <1>; 81*724ba675SRob Herring #size-cells = <1>; 82*724ba675SRob Herring reg = <0x43f00000 0x100000>; 83*724ba675SRob Herring ranges; 84*724ba675SRob Herring 85*724ba675SRob Herring aips1: bridge@43f00000 { 86*724ba675SRob Herring compatible = "fsl,imx25-aips"; 87*724ba675SRob Herring reg = <0x43f00000 0x4000>; 88*724ba675SRob Herring }; 89*724ba675SRob Herring 90*724ba675SRob Herring i2c1: i2c@43f80000 { 91*724ba675SRob Herring #address-cells = <1>; 92*724ba675SRob Herring #size-cells = <0>; 93*724ba675SRob Herring compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 94*724ba675SRob Herring reg = <0x43f80000 0x4000>; 95*724ba675SRob Herring clocks = <&clks 48>; 96*724ba675SRob Herring clock-names = ""; 97*724ba675SRob Herring interrupts = <3>; 98*724ba675SRob Herring status = "disabled"; 99*724ba675SRob Herring }; 100*724ba675SRob Herring 101*724ba675SRob Herring i2c3: i2c@43f84000 { 102*724ba675SRob Herring #address-cells = <1>; 103*724ba675SRob Herring #size-cells = <0>; 104*724ba675SRob Herring compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 105*724ba675SRob Herring reg = <0x43f84000 0x4000>; 106*724ba675SRob Herring clocks = <&clks 48>; 107*724ba675SRob Herring clock-names = ""; 108*724ba675SRob Herring interrupts = <10>; 109*724ba675SRob Herring status = "disabled"; 110*724ba675SRob Herring }; 111*724ba675SRob Herring 112*724ba675SRob Herring can1: can@43f88000 { 113*724ba675SRob Herring compatible = "fsl,imx25-flexcan"; 114*724ba675SRob Herring reg = <0x43f88000 0x4000>; 115*724ba675SRob Herring interrupts = <43>; 116*724ba675SRob Herring clocks = <&clks 75>, <&clks 75>; 117*724ba675SRob Herring clock-names = "ipg", "per"; 118*724ba675SRob Herring status = "disabled"; 119*724ba675SRob Herring }; 120*724ba675SRob Herring 121*724ba675SRob Herring can2: can@43f8c000 { 122*724ba675SRob Herring compatible = "fsl,imx25-flexcan"; 123*724ba675SRob Herring reg = <0x43f8c000 0x4000>; 124*724ba675SRob Herring interrupts = <44>; 125*724ba675SRob Herring clocks = <&clks 76>, <&clks 76>; 126*724ba675SRob Herring clock-names = "ipg", "per"; 127*724ba675SRob Herring status = "disabled"; 128*724ba675SRob Herring }; 129*724ba675SRob Herring 130*724ba675SRob Herring uart1: serial@43f90000 { 131*724ba675SRob Herring compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 132*724ba675SRob Herring reg = <0x43f90000 0x4000>; 133*724ba675SRob Herring interrupts = <45>; 134*724ba675SRob Herring clocks = <&clks 120>, <&clks 57>; 135*724ba675SRob Herring clock-names = "ipg", "per"; 136*724ba675SRob Herring status = "disabled"; 137*724ba675SRob Herring }; 138*724ba675SRob Herring 139*724ba675SRob Herring uart2: serial@43f94000 { 140*724ba675SRob Herring compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 141*724ba675SRob Herring reg = <0x43f94000 0x4000>; 142*724ba675SRob Herring interrupts = <32>; 143*724ba675SRob Herring clocks = <&clks 121>, <&clks 57>; 144*724ba675SRob Herring clock-names = "ipg", "per"; 145*724ba675SRob Herring status = "disabled"; 146*724ba675SRob Herring }; 147*724ba675SRob Herring 148*724ba675SRob Herring i2c2: i2c@43f98000 { 149*724ba675SRob Herring #address-cells = <1>; 150*724ba675SRob Herring #size-cells = <0>; 151*724ba675SRob Herring compatible = "fsl,imx25-i2c", "fsl,imx21-i2c"; 152*724ba675SRob Herring reg = <0x43f98000 0x4000>; 153*724ba675SRob Herring clocks = <&clks 48>; 154*724ba675SRob Herring clock-names = ""; 155*724ba675SRob Herring interrupts = <4>; 156*724ba675SRob Herring status = "disabled"; 157*724ba675SRob Herring }; 158*724ba675SRob Herring 159*724ba675SRob Herring owire@43f9c000 { 160*724ba675SRob Herring #address-cells = <1>; 161*724ba675SRob Herring #size-cells = <0>; 162*724ba675SRob Herring reg = <0x43f9c000 0x4000>; 163*724ba675SRob Herring clocks = <&clks 51>; 164*724ba675SRob Herring clock-names = ""; 165*724ba675SRob Herring interrupts = <2>; 166*724ba675SRob Herring status = "disabled"; 167*724ba675SRob Herring }; 168*724ba675SRob Herring 169*724ba675SRob Herring spi1: spi@43fa4000 { 170*724ba675SRob Herring #address-cells = <1>; 171*724ba675SRob Herring #size-cells = <0>; 172*724ba675SRob Herring compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 173*724ba675SRob Herring reg = <0x43fa4000 0x4000>; 174*724ba675SRob Herring clocks = <&clks 78>, <&clks 78>; 175*724ba675SRob Herring clock-names = "ipg", "per"; 176*724ba675SRob Herring interrupts = <14>; 177*724ba675SRob Herring status = "disabled"; 178*724ba675SRob Herring }; 179*724ba675SRob Herring 180*724ba675SRob Herring kpp: kpp@43fa8000 { 181*724ba675SRob Herring #address-cells = <1>; 182*724ba675SRob Herring #size-cells = <0>; 183*724ba675SRob Herring compatible = "fsl,imx25-kpp", "fsl,imx21-kpp"; 184*724ba675SRob Herring reg = <0x43fa8000 0x4000>; 185*724ba675SRob Herring clocks = <&clks 102>; 186*724ba675SRob Herring clock-names = ""; 187*724ba675SRob Herring interrupts = <24>; 188*724ba675SRob Herring status = "disabled"; 189*724ba675SRob Herring }; 190*724ba675SRob Herring 191*724ba675SRob Herring iomuxc: iomuxc@43fac000 { 192*724ba675SRob Herring compatible = "fsl,imx25-iomuxc"; 193*724ba675SRob Herring reg = <0x43fac000 0x4000>; 194*724ba675SRob Herring }; 195*724ba675SRob Herring 196*724ba675SRob Herring audmux: audmux@43fb0000 { 197*724ba675SRob Herring compatible = "fsl,imx25-audmux", "fsl,imx31-audmux"; 198*724ba675SRob Herring reg = <0x43fb0000 0x4000>; 199*724ba675SRob Herring status = "disabled"; 200*724ba675SRob Herring }; 201*724ba675SRob Herring }; 202*724ba675SRob Herring 203*724ba675SRob Herring spba-bus@50000000 { 204*724ba675SRob Herring compatible = "fsl,spba-bus", "simple-bus"; 205*724ba675SRob Herring #address-cells = <1>; 206*724ba675SRob Herring #size-cells = <1>; 207*724ba675SRob Herring reg = <0x50000000 0x40000>; 208*724ba675SRob Herring ranges; 209*724ba675SRob Herring 210*724ba675SRob Herring spi3: spi@50004000 { 211*724ba675SRob Herring #address-cells = <1>; 212*724ba675SRob Herring #size-cells = <0>; 213*724ba675SRob Herring compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 214*724ba675SRob Herring reg = <0x50004000 0x4000>; 215*724ba675SRob Herring interrupts = <0>; 216*724ba675SRob Herring clocks = <&clks 80>, <&clks 80>; 217*724ba675SRob Herring clock-names = "ipg", "per"; 218*724ba675SRob Herring status = "disabled"; 219*724ba675SRob Herring }; 220*724ba675SRob Herring 221*724ba675SRob Herring uart4: serial@50008000 { 222*724ba675SRob Herring compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 223*724ba675SRob Herring reg = <0x50008000 0x4000>; 224*724ba675SRob Herring interrupts = <5>; 225*724ba675SRob Herring clocks = <&clks 123>, <&clks 57>; 226*724ba675SRob Herring clock-names = "ipg", "per"; 227*724ba675SRob Herring status = "disabled"; 228*724ba675SRob Herring }; 229*724ba675SRob Herring 230*724ba675SRob Herring uart3: serial@5000c000 { 231*724ba675SRob Herring compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 232*724ba675SRob Herring reg = <0x5000c000 0x4000>; 233*724ba675SRob Herring interrupts = <18>; 234*724ba675SRob Herring clocks = <&clks 122>, <&clks 57>; 235*724ba675SRob Herring clock-names = "ipg", "per"; 236*724ba675SRob Herring status = "disabled"; 237*724ba675SRob Herring }; 238*724ba675SRob Herring 239*724ba675SRob Herring spi2: spi@50010000 { 240*724ba675SRob Herring #address-cells = <1>; 241*724ba675SRob Herring #size-cells = <0>; 242*724ba675SRob Herring compatible = "fsl,imx25-cspi", "fsl,imx35-cspi"; 243*724ba675SRob Herring reg = <0x50010000 0x4000>; 244*724ba675SRob Herring clocks = <&clks 79>, <&clks 79>; 245*724ba675SRob Herring clock-names = "ipg", "per"; 246*724ba675SRob Herring interrupts = <13>; 247*724ba675SRob Herring status = "disabled"; 248*724ba675SRob Herring }; 249*724ba675SRob Herring 250*724ba675SRob Herring ssi2: ssi@50014000 { 251*724ba675SRob Herring #sound-dai-cells = <0>; 252*724ba675SRob Herring compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; 253*724ba675SRob Herring reg = <0x50014000 0x4000>; 254*724ba675SRob Herring interrupts = <11>; 255*724ba675SRob Herring clocks = <&clks 118>; 256*724ba675SRob Herring clock-names = "ipg"; 257*724ba675SRob Herring dmas = <&sdma 24 1 0>, 258*724ba675SRob Herring <&sdma 25 1 0>; 259*724ba675SRob Herring dma-names = "rx", "tx"; 260*724ba675SRob Herring fsl,fifo-depth = <15>; 261*724ba675SRob Herring status = "disabled"; 262*724ba675SRob Herring }; 263*724ba675SRob Herring 264*724ba675SRob Herring esai@50018000 { 265*724ba675SRob Herring reg = <0x50018000 0x4000>; 266*724ba675SRob Herring interrupts = <7>; 267*724ba675SRob Herring }; 268*724ba675SRob Herring 269*724ba675SRob Herring uart5: serial@5002c000 { 270*724ba675SRob Herring compatible = "fsl,imx25-uart", "fsl,imx21-uart"; 271*724ba675SRob Herring reg = <0x5002c000 0x4000>; 272*724ba675SRob Herring interrupts = <40>; 273*724ba675SRob Herring clocks = <&clks 124>, <&clks 57>; 274*724ba675SRob Herring clock-names = "ipg", "per"; 275*724ba675SRob Herring status = "disabled"; 276*724ba675SRob Herring }; 277*724ba675SRob Herring 278*724ba675SRob Herring tscadc: tscadc@50030000 { 279*724ba675SRob Herring compatible = "fsl,imx25-tsadc"; 280*724ba675SRob Herring reg = <0x50030000 0xc>; 281*724ba675SRob Herring interrupts = <46>; 282*724ba675SRob Herring clocks = <&clks 119>; 283*724ba675SRob Herring clock-names = "ipg"; 284*724ba675SRob Herring interrupt-controller; 285*724ba675SRob Herring #interrupt-cells = <1>; 286*724ba675SRob Herring #address-cells = <1>; 287*724ba675SRob Herring #size-cells = <1>; 288*724ba675SRob Herring status = "disabled"; 289*724ba675SRob Herring ranges; 290*724ba675SRob Herring 291*724ba675SRob Herring adc: adc@50030800 { 292*724ba675SRob Herring compatible = "fsl,imx25-gcq"; 293*724ba675SRob Herring reg = <0x50030800 0x60>; 294*724ba675SRob Herring interrupt-parent = <&tscadc>; 295*724ba675SRob Herring interrupts = <1>; 296*724ba675SRob Herring #address-cells = <1>; 297*724ba675SRob Herring #size-cells = <0>; 298*724ba675SRob Herring status = "disabled"; 299*724ba675SRob Herring }; 300*724ba675SRob Herring 301*724ba675SRob Herring tsc: tcq@50030400 { 302*724ba675SRob Herring compatible = "fsl,imx25-tcq"; 303*724ba675SRob Herring reg = <0x50030400 0x60>; 304*724ba675SRob Herring interrupt-parent = <&tscadc>; 305*724ba675SRob Herring interrupts = <0>; 306*724ba675SRob Herring fsl,wires = <4>; 307*724ba675SRob Herring status = "disabled"; 308*724ba675SRob Herring }; 309*724ba675SRob Herring }; 310*724ba675SRob Herring 311*724ba675SRob Herring ssi1: ssi@50034000 { 312*724ba675SRob Herring #sound-dai-cells = <0>; 313*724ba675SRob Herring compatible = "fsl,imx25-ssi", "fsl,imx21-ssi"; 314*724ba675SRob Herring reg = <0x50034000 0x4000>; 315*724ba675SRob Herring interrupts = <12>; 316*724ba675SRob Herring clocks = <&clks 117>; 317*724ba675SRob Herring clock-names = "ipg"; 318*724ba675SRob Herring dmas = <&sdma 28 1 0>, 319*724ba675SRob Herring <&sdma 29 1 0>; 320*724ba675SRob Herring dma-names = "rx", "tx"; 321*724ba675SRob Herring fsl,fifo-depth = <15>; 322*724ba675SRob Herring status = "disabled"; 323*724ba675SRob Herring }; 324*724ba675SRob Herring 325*724ba675SRob Herring fec: ethernet@50038000 { 326*724ba675SRob Herring compatible = "fsl,imx25-fec"; 327*724ba675SRob Herring reg = <0x50038000 0x4000>; 328*724ba675SRob Herring interrupts = <57>; 329*724ba675SRob Herring clocks = <&clks 88>, <&clks 65>; 330*724ba675SRob Herring clock-names = "ipg", "ahb"; 331*724ba675SRob Herring status = "disabled"; 332*724ba675SRob Herring }; 333*724ba675SRob Herring }; 334*724ba675SRob Herring 335*724ba675SRob Herring bus@53f00000 { /* AIPS2 */ 336*724ba675SRob Herring compatible = "fsl,aips-bus", "simple-bus"; 337*724ba675SRob Herring #address-cells = <1>; 338*724ba675SRob Herring #size-cells = <1>; 339*724ba675SRob Herring reg = <0x53f00000 0x100000>; 340*724ba675SRob Herring ranges; 341*724ba675SRob Herring 342*724ba675SRob Herring aips2: bridge@53f00000 { 343*724ba675SRob Herring compatible = "fsl,imx25-aips"; 344*724ba675SRob Herring reg = <0x53f00000 0x4000>; 345*724ba675SRob Herring }; 346*724ba675SRob Herring 347*724ba675SRob Herring clks: ccm@53f80000 { 348*724ba675SRob Herring compatible = "fsl,imx25-ccm"; 349*724ba675SRob Herring reg = <0x53f80000 0x4000>; 350*724ba675SRob Herring interrupts = <31>; 351*724ba675SRob Herring #clock-cells = <1>; 352*724ba675SRob Herring }; 353*724ba675SRob Herring 354*724ba675SRob Herring gpt4: timer@53f84000 { 355*724ba675SRob Herring compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 356*724ba675SRob Herring reg = <0x53f84000 0x4000>; 357*724ba675SRob Herring clocks = <&clks 95>, <&clks 47>; 358*724ba675SRob Herring clock-names = "ipg", "per"; 359*724ba675SRob Herring interrupts = <1>; 360*724ba675SRob Herring }; 361*724ba675SRob Herring 362*724ba675SRob Herring gpt3: timer@53f88000 { 363*724ba675SRob Herring compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 364*724ba675SRob Herring reg = <0x53f88000 0x4000>; 365*724ba675SRob Herring clocks = <&clks 94>, <&clks 47>; 366*724ba675SRob Herring clock-names = "ipg", "per"; 367*724ba675SRob Herring interrupts = <29>; 368*724ba675SRob Herring }; 369*724ba675SRob Herring 370*724ba675SRob Herring gpt2: timer@53f8c000 { 371*724ba675SRob Herring compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 372*724ba675SRob Herring reg = <0x53f8c000 0x4000>; 373*724ba675SRob Herring clocks = <&clks 93>, <&clks 47>; 374*724ba675SRob Herring clock-names = "ipg", "per"; 375*724ba675SRob Herring interrupts = <53>; 376*724ba675SRob Herring }; 377*724ba675SRob Herring 378*724ba675SRob Herring gpt1: timer@53f90000 { 379*724ba675SRob Herring compatible = "fsl,imx25-gpt", "fsl,imx31-gpt"; 380*724ba675SRob Herring reg = <0x53f90000 0x4000>; 381*724ba675SRob Herring clocks = <&clks 92>, <&clks 47>; 382*724ba675SRob Herring clock-names = "ipg", "per"; 383*724ba675SRob Herring interrupts = <54>; 384*724ba675SRob Herring }; 385*724ba675SRob Herring 386*724ba675SRob Herring epit1: timer@53f94000 { 387*724ba675SRob Herring compatible = "fsl,imx25-epit"; 388*724ba675SRob Herring reg = <0x53f94000 0x4000>; 389*724ba675SRob Herring clocks = <&clks 83>, <&clks 43>; 390*724ba675SRob Herring clock-names = "ipg", "per"; 391*724ba675SRob Herring interrupts = <28>; 392*724ba675SRob Herring }; 393*724ba675SRob Herring 394*724ba675SRob Herring epit2: timer@53f98000 { 395*724ba675SRob Herring compatible = "fsl,imx25-epit"; 396*724ba675SRob Herring reg = <0x53f98000 0x4000>; 397*724ba675SRob Herring clocks = <&clks 84>, <&clks 43>; 398*724ba675SRob Herring clock-names = "ipg", "per"; 399*724ba675SRob Herring interrupts = <27>; 400*724ba675SRob Herring }; 401*724ba675SRob Herring 402*724ba675SRob Herring gpio4: gpio@53f9c000 { 403*724ba675SRob Herring compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 404*724ba675SRob Herring reg = <0x53f9c000 0x4000>; 405*724ba675SRob Herring interrupts = <23>; 406*724ba675SRob Herring gpio-controller; 407*724ba675SRob Herring #gpio-cells = <2>; 408*724ba675SRob Herring interrupt-controller; 409*724ba675SRob Herring #interrupt-cells = <2>; 410*724ba675SRob Herring }; 411*724ba675SRob Herring 412*724ba675SRob Herring pwm2: pwm@53fa0000 { 413*724ba675SRob Herring compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 414*724ba675SRob Herring #pwm-cells = <3>; 415*724ba675SRob Herring reg = <0x53fa0000 0x4000>; 416*724ba675SRob Herring clocks = <&clks 106>, <&clks 52>; 417*724ba675SRob Herring clock-names = "ipg", "per"; 418*724ba675SRob Herring interrupts = <36>; 419*724ba675SRob Herring }; 420*724ba675SRob Herring 421*724ba675SRob Herring gpio3: gpio@53fa4000 { 422*724ba675SRob Herring compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 423*724ba675SRob Herring reg = <0x53fa4000 0x4000>; 424*724ba675SRob Herring interrupts = <16>; 425*724ba675SRob Herring gpio-controller; 426*724ba675SRob Herring #gpio-cells = <2>; 427*724ba675SRob Herring interrupt-controller; 428*724ba675SRob Herring #interrupt-cells = <2>; 429*724ba675SRob Herring }; 430*724ba675SRob Herring 431*724ba675SRob Herring pwm3: pwm@53fa8000 { 432*724ba675SRob Herring compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 433*724ba675SRob Herring #pwm-cells = <3>; 434*724ba675SRob Herring reg = <0x53fa8000 0x4000>; 435*724ba675SRob Herring clocks = <&clks 107>, <&clks 52>; 436*724ba675SRob Herring clock-names = "ipg", "per"; 437*724ba675SRob Herring interrupts = <41>; 438*724ba675SRob Herring }; 439*724ba675SRob Herring 440*724ba675SRob Herring scc: crypto@53fac000 { 441*724ba675SRob Herring compatible = "fsl,imx25-scc"; 442*724ba675SRob Herring reg = <0x53fac000 0x4000>; 443*724ba675SRob Herring clocks = <&clks 111>; 444*724ba675SRob Herring clock-names = "ipg"; 445*724ba675SRob Herring interrupts = <49>, <50>; 446*724ba675SRob Herring interrupt-names = "scm", "smn"; 447*724ba675SRob Herring }; 448*724ba675SRob Herring 449*724ba675SRob Herring rngb: rngb@53fb0000 { 450*724ba675SRob Herring compatible = "fsl,imx25-rngb"; 451*724ba675SRob Herring reg = <0x53fb0000 0x4000>; 452*724ba675SRob Herring clocks = <&clks 109>; 453*724ba675SRob Herring interrupts = <22>; 454*724ba675SRob Herring }; 455*724ba675SRob Herring 456*724ba675SRob Herring esdhc1: mmc@53fb4000 { 457*724ba675SRob Herring compatible = "fsl,imx25-esdhc"; 458*724ba675SRob Herring reg = <0x53fb4000 0x4000>; 459*724ba675SRob Herring interrupts = <9>; 460*724ba675SRob Herring clocks = <&clks 86>, <&clks 63>, <&clks 45>; 461*724ba675SRob Herring clock-names = "ipg", "ahb", "per"; 462*724ba675SRob Herring status = "disabled"; 463*724ba675SRob Herring }; 464*724ba675SRob Herring 465*724ba675SRob Herring esdhc2: mmc@53fb8000 { 466*724ba675SRob Herring compatible = "fsl,imx25-esdhc"; 467*724ba675SRob Herring reg = <0x53fb8000 0x4000>; 468*724ba675SRob Herring interrupts = <8>; 469*724ba675SRob Herring clocks = <&clks 87>, <&clks 64>, <&clks 46>; 470*724ba675SRob Herring clock-names = "ipg", "ahb", "per"; 471*724ba675SRob Herring status = "disabled"; 472*724ba675SRob Herring }; 473*724ba675SRob Herring 474*724ba675SRob Herring lcdc: lcdc@53fbc000 { 475*724ba675SRob Herring compatible = "fsl,imx25-fb", "fsl,imx21-fb"; 476*724ba675SRob Herring reg = <0x53fbc000 0x4000>; 477*724ba675SRob Herring interrupts = <39>; 478*724ba675SRob Herring clocks = <&clks 103>, <&clks 66>, <&clks 49>; 479*724ba675SRob Herring clock-names = "ipg", "ahb", "per"; 480*724ba675SRob Herring status = "disabled"; 481*724ba675SRob Herring }; 482*724ba675SRob Herring 483*724ba675SRob Herring slcdc@53fc0000 { 484*724ba675SRob Herring reg = <0x53fc0000 0x4000>; 485*724ba675SRob Herring interrupts = <38>; 486*724ba675SRob Herring status = "disabled"; 487*724ba675SRob Herring }; 488*724ba675SRob Herring 489*724ba675SRob Herring pwm4: pwm@53fc8000 { 490*724ba675SRob Herring compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 491*724ba675SRob Herring #pwm-cells = <3>; 492*724ba675SRob Herring reg = <0x53fc8000 0x4000>; 493*724ba675SRob Herring clocks = <&clks 108>, <&clks 52>; 494*724ba675SRob Herring clock-names = "ipg", "per"; 495*724ba675SRob Herring interrupts = <42>; 496*724ba675SRob Herring }; 497*724ba675SRob Herring 498*724ba675SRob Herring gpio1: gpio@53fcc000 { 499*724ba675SRob Herring compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 500*724ba675SRob Herring reg = <0x53fcc000 0x4000>; 501*724ba675SRob Herring interrupts = <52>; 502*724ba675SRob Herring gpio-controller; 503*724ba675SRob Herring #gpio-cells = <2>; 504*724ba675SRob Herring interrupt-controller; 505*724ba675SRob Herring #interrupt-cells = <2>; 506*724ba675SRob Herring }; 507*724ba675SRob Herring 508*724ba675SRob Herring gpio2: gpio@53fd0000 { 509*724ba675SRob Herring compatible = "fsl,imx25-gpio", "fsl,imx35-gpio"; 510*724ba675SRob Herring reg = <0x53fd0000 0x4000>; 511*724ba675SRob Herring interrupts = <51>; 512*724ba675SRob Herring gpio-controller; 513*724ba675SRob Herring #gpio-cells = <2>; 514*724ba675SRob Herring interrupt-controller; 515*724ba675SRob Herring #interrupt-cells = <2>; 516*724ba675SRob Herring }; 517*724ba675SRob Herring 518*724ba675SRob Herring sdma: dma-controller@53fd4000 { 519*724ba675SRob Herring compatible = "fsl,imx25-sdma"; 520*724ba675SRob Herring reg = <0x53fd4000 0x4000>; 521*724ba675SRob Herring clocks = <&clks 112>, <&clks 68>; 522*724ba675SRob Herring clock-names = "ipg", "ahb"; 523*724ba675SRob Herring #dma-cells = <3>; 524*724ba675SRob Herring interrupts = <34>; 525*724ba675SRob Herring fsl,sdma-ram-script-name = "imx/sdma/sdma-imx25.bin"; 526*724ba675SRob Herring }; 527*724ba675SRob Herring 528*724ba675SRob Herring watchdog@53fdc000 { 529*724ba675SRob Herring compatible = "fsl,imx25-wdt", "fsl,imx21-wdt"; 530*724ba675SRob Herring reg = <0x53fdc000 0x4000>; 531*724ba675SRob Herring clocks = <&clks 126>; 532*724ba675SRob Herring clock-names = ""; 533*724ba675SRob Herring interrupts = <55>; 534*724ba675SRob Herring }; 535*724ba675SRob Herring 536*724ba675SRob Herring pwm1: pwm@53fe0000 { 537*724ba675SRob Herring compatible = "fsl,imx25-pwm", "fsl,imx27-pwm"; 538*724ba675SRob Herring #pwm-cells = <3>; 539*724ba675SRob Herring reg = <0x53fe0000 0x4000>; 540*724ba675SRob Herring clocks = <&clks 105>, <&clks 52>; 541*724ba675SRob Herring clock-names = "ipg", "per"; 542*724ba675SRob Herring interrupts = <26>; 543*724ba675SRob Herring }; 544*724ba675SRob Herring 545*724ba675SRob Herring iim: efuse@53ff0000 { 546*724ba675SRob Herring compatible = "fsl,imx25-iim", "fsl,imx27-iim"; 547*724ba675SRob Herring reg = <0x53ff0000 0x4000>; 548*724ba675SRob Herring interrupts = <19>; 549*724ba675SRob Herring clocks = <&clks 99>; 550*724ba675SRob Herring }; 551*724ba675SRob Herring 552*724ba675SRob Herring usbotg: usb@53ff4000 { 553*724ba675SRob Herring compatible = "fsl,imx25-usb", "fsl,imx27-usb"; 554*724ba675SRob Herring reg = <0x53ff4000 0x0200>; 555*724ba675SRob Herring interrupts = <37>; 556*724ba675SRob Herring clocks = <&clks 9>, <&clks 70>, <&clks 8>; 557*724ba675SRob Herring clock-names = "ipg", "ahb", "per"; 558*724ba675SRob Herring fsl,usbmisc = <&usbmisc 0>; 559*724ba675SRob Herring fsl,usbphy = <&usbphy0>; 560*724ba675SRob Herring phy_type = "utmi"; 561*724ba675SRob Herring dr_mode = "otg"; 562*724ba675SRob Herring status = "disabled"; 563*724ba675SRob Herring }; 564*724ba675SRob Herring 565*724ba675SRob Herring usbhost1: usb@53ff4400 { 566*724ba675SRob Herring compatible = "fsl,imx25-usb", "fsl,imx27-usb"; 567*724ba675SRob Herring reg = <0x53ff4400 0x0200>; 568*724ba675SRob Herring interrupts = <35>; 569*724ba675SRob Herring clocks = <&clks 9>, <&clks 70>, <&clks 8>; 570*724ba675SRob Herring clock-names = "ipg", "ahb", "per"; 571*724ba675SRob Herring fsl,usbmisc = <&usbmisc 1>; 572*724ba675SRob Herring fsl,usbphy = <&usbphy1>; 573*724ba675SRob Herring maximum-speed = "full-speed"; 574*724ba675SRob Herring phy_type = "serial"; 575*724ba675SRob Herring dr_mode = "host"; 576*724ba675SRob Herring status = "disabled"; 577*724ba675SRob Herring }; 578*724ba675SRob Herring 579*724ba675SRob Herring usbmisc: usbmisc@53ff4600 { 580*724ba675SRob Herring #index-cells = <1>; 581*724ba675SRob Herring compatible = "fsl,imx25-usbmisc"; 582*724ba675SRob Herring reg = <0x53ff4600 0x00f>; 583*724ba675SRob Herring }; 584*724ba675SRob Herring 585*724ba675SRob Herring dryice@53ffc000 { 586*724ba675SRob Herring compatible = "fsl,imx25-dryice", "fsl,imx25-rtc"; 587*724ba675SRob Herring reg = <0x53ffc000 0x4000>; 588*724ba675SRob Herring clocks = <&clks 81>; 589*724ba675SRob Herring clock-names = "ipg"; 590*724ba675SRob Herring interrupts = <25 56>; 591*724ba675SRob Herring }; 592*724ba675SRob Herring }; 593*724ba675SRob Herring 594*724ba675SRob Herring iram: sram@78000000 { 595*724ba675SRob Herring compatible = "mmio-sram"; 596*724ba675SRob Herring reg = <0x78000000 0x20000>; 597*724ba675SRob Herring }; 598*724ba675SRob Herring 599*724ba675SRob Herring emi@80000000 { 600*724ba675SRob Herring compatible = "fsl,emi-bus", "simple-bus"; 601*724ba675SRob Herring #address-cells = <1>; 602*724ba675SRob Herring #size-cells = <1>; 603*724ba675SRob Herring reg = <0x80000000 0x3b002000>; 604*724ba675SRob Herring ranges; 605*724ba675SRob Herring 606*724ba675SRob Herring nfc: nand@bb000000 { 607*724ba675SRob Herring #address-cells = <1>; 608*724ba675SRob Herring #size-cells = <1>; 609*724ba675SRob Herring 610*724ba675SRob Herring compatible = "fsl,imx25-nand"; 611*724ba675SRob Herring reg = <0xbb000000 0x2000>; 612*724ba675SRob Herring clocks = <&clks 50>; 613*724ba675SRob Herring clock-names = ""; 614*724ba675SRob Herring interrupts = <33>; 615*724ba675SRob Herring status = "disabled"; 616*724ba675SRob Herring }; 617*724ba675SRob Herring }; 618*724ba675SRob Herring }; 619*724ba675SRob Herring 620*724ba675SRob Herring usbphy { 621*724ba675SRob Herring compatible = "simple-bus"; 622*724ba675SRob Herring #address-cells = <1>; 623*724ba675SRob Herring #size-cells = <0>; 624*724ba675SRob Herring 625*724ba675SRob Herring usbphy0: usb-phy@0 { 626*724ba675SRob Herring reg = <0>; 627*724ba675SRob Herring compatible = "usb-nop-xceiv"; 628*724ba675SRob Herring #phy-cells = <0>; 629*724ba675SRob Herring }; 630*724ba675SRob Herring 631*724ba675SRob Herring usbphy1: usb-phy@1 { 632*724ba675SRob Herring reg = <1>; 633*724ba675SRob Herring compatible = "usb-nop-xceiv"; 634*724ba675SRob Herring #phy-cells = <0>; 635*724ba675SRob Herring }; 636*724ba675SRob Herring }; 637*724ba675SRob Herring}; 638