xref: /linux/scripts/dtc/include-prefixes/arm/nxp/imx/imx25-pdk.dts (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0+
2*724ba675SRob Herring//
3*724ba675SRob Herring// Copyright 2013 Freescale Semiconductor, Inc.
4*724ba675SRob Herring
5*724ba675SRob Herring/dts-v1/;
6*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
7*724ba675SRob Herring#include <dt-bindings/input/input.h>
8*724ba675SRob Herring#include "imx25.dtsi"
9*724ba675SRob Herring
10*724ba675SRob Herring/ {
11*724ba675SRob Herring	model = "Freescale i.MX25 Product Development Kit";
12*724ba675SRob Herring	compatible = "fsl,imx25-pdk", "fsl,imx25";
13*724ba675SRob Herring
14*724ba675SRob Herring	memory@80000000 {
15*724ba675SRob Herring		device_type = "memory";
16*724ba675SRob Herring		reg = <0x80000000 0x4000000>;
17*724ba675SRob Herring	};
18*724ba675SRob Herring
19*724ba675SRob Herring	regulators {
20*724ba675SRob Herring		compatible = "simple-bus";
21*724ba675SRob Herring		#address-cells = <1>;
22*724ba675SRob Herring		#size-cells = <0>;
23*724ba675SRob Herring
24*724ba675SRob Herring		reg_fec_3v3: regulator@0 {
25*724ba675SRob Herring			compatible = "regulator-fixed";
26*724ba675SRob Herring			reg = <0>;
27*724ba675SRob Herring			regulator-name = "fec-3v3";
28*724ba675SRob Herring			regulator-min-microvolt = <3300000>;
29*724ba675SRob Herring			regulator-max-microvolt = <3300000>;
30*724ba675SRob Herring			gpio = <&gpio2 3 0>;
31*724ba675SRob Herring			enable-active-high;
32*724ba675SRob Herring		};
33*724ba675SRob Herring
34*724ba675SRob Herring		reg_2p5v: regulator@1 {
35*724ba675SRob Herring			compatible = "regulator-fixed";
36*724ba675SRob Herring			reg = <1>;
37*724ba675SRob Herring			regulator-name = "2P5V";
38*724ba675SRob Herring			regulator-min-microvolt = <2500000>;
39*724ba675SRob Herring			regulator-max-microvolt = <2500000>;
40*724ba675SRob Herring		};
41*724ba675SRob Herring
42*724ba675SRob Herring		reg_3p3v: regulator@2 {
43*724ba675SRob Herring			compatible = "regulator-fixed";
44*724ba675SRob Herring			reg = <2>;
45*724ba675SRob Herring			regulator-name = "3P3V";
46*724ba675SRob Herring			regulator-min-microvolt = <3300000>;
47*724ba675SRob Herring			regulator-max-microvolt = <3300000>;
48*724ba675SRob Herring		};
49*724ba675SRob Herring
50*724ba675SRob Herring		reg_can_3v3: regulator@3 {
51*724ba675SRob Herring			compatible = "regulator-fixed";
52*724ba675SRob Herring			reg = <3>;
53*724ba675SRob Herring			regulator-name = "can-3v3";
54*724ba675SRob Herring			regulator-min-microvolt = <3300000>;
55*724ba675SRob Herring			regulator-max-microvolt = <3300000>;
56*724ba675SRob Herring			gpio = <&gpio4 6 0>;
57*724ba675SRob Herring		};
58*724ba675SRob Herring	};
59*724ba675SRob Herring
60*724ba675SRob Herring	sound {
61*724ba675SRob Herring		compatible = "fsl,imx25-pdk-sgtl5000",
62*724ba675SRob Herring			     "fsl,imx-audio-sgtl5000";
63*724ba675SRob Herring		model = "imx25-pdk-sgtl5000";
64*724ba675SRob Herring		ssi-controller = <&ssi1>;
65*724ba675SRob Herring		audio-codec = <&codec>;
66*724ba675SRob Herring		audio-routing =
67*724ba675SRob Herring			"MIC_IN", "Mic Jack",
68*724ba675SRob Herring			"Mic Jack", "Mic Bias",
69*724ba675SRob Herring			"Headphone Jack", "HP_OUT";
70*724ba675SRob Herring		mux-int-port = <1>;
71*724ba675SRob Herring		mux-ext-port = <4>;
72*724ba675SRob Herring	};
73*724ba675SRob Herring
74*724ba675SRob Herring	wvga: display {
75*724ba675SRob Herring		model = "CLAA057VC01CW";
76*724ba675SRob Herring		bits-per-pixel = <16>;
77*724ba675SRob Herring		fsl,pcr = <0xfa208b80>;
78*724ba675SRob Herring		bus-width = <18>;
79*724ba675SRob Herring		display-timings {
80*724ba675SRob Herring			native-mode = <&wvga_timings>;
81*724ba675SRob Herring			wvga_timings: 640x480 {
82*724ba675SRob Herring				hactive = <640>;
83*724ba675SRob Herring				vactive = <480>;
84*724ba675SRob Herring				hback-porch = <45>;
85*724ba675SRob Herring				hfront-porch = <114>;
86*724ba675SRob Herring				hsync-len = <1>;
87*724ba675SRob Herring				vback-porch = <33>;
88*724ba675SRob Herring				vfront-porch = <11>;
89*724ba675SRob Herring				vsync-len = <1>;
90*724ba675SRob Herring				clock-frequency = <25200000>;
91*724ba675SRob Herring			};
92*724ba675SRob Herring		};
93*724ba675SRob Herring	};
94*724ba675SRob Herring};
95*724ba675SRob Herring
96*724ba675SRob Herring&audmux {
97*724ba675SRob Herring	pinctrl-names = "default";
98*724ba675SRob Herring	pinctrl-0 = <&pinctrl_audmux>;
99*724ba675SRob Herring	status = "okay";
100*724ba675SRob Herring};
101*724ba675SRob Herring
102*724ba675SRob Herring&can1 {
103*724ba675SRob Herring	pinctrl-names = "default";
104*724ba675SRob Herring	pinctrl-0 = <&pinctrl_can1>;
105*724ba675SRob Herring	xceiver-supply = <&reg_can_3v3>;
106*724ba675SRob Herring	status = "okay";
107*724ba675SRob Herring};
108*724ba675SRob Herring
109*724ba675SRob Herring&esdhc1 {
110*724ba675SRob Herring	pinctrl-names = "default";
111*724ba675SRob Herring	pinctrl-0 = <&pinctrl_esdhc1>;
112*724ba675SRob Herring	cd-gpios = <&gpio2 1 GPIO_ACTIVE_LOW>;
113*724ba675SRob Herring	wp-gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
114*724ba675SRob Herring	status = "okay";
115*724ba675SRob Herring};
116*724ba675SRob Herring
117*724ba675SRob Herring&fec {
118*724ba675SRob Herring	phy-mode = "rmii";
119*724ba675SRob Herring	pinctrl-names = "default";
120*724ba675SRob Herring	pinctrl-0 = <&pinctrl_fec>;
121*724ba675SRob Herring	phy-supply = <&reg_fec_3v3>;
122*724ba675SRob Herring	phy-reset-gpios = <&gpio4 8 GPIO_ACTIVE_LOW>;
123*724ba675SRob Herring	status = "okay";
124*724ba675SRob Herring};
125*724ba675SRob Herring
126*724ba675SRob Herring&i2c1 {
127*724ba675SRob Herring	clock-frequency = <100000>;
128*724ba675SRob Herring	pinctrl-names = "default";
129*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c1>;
130*724ba675SRob Herring	status = "okay";
131*724ba675SRob Herring
132*724ba675SRob Herring	codec: sgtl5000@a {
133*724ba675SRob Herring		compatible = "fsl,sgtl5000";
134*724ba675SRob Herring		reg = <0x0a>;
135*724ba675SRob Herring		clocks = <&clks 129>;
136*724ba675SRob Herring		VDDA-supply = <&reg_2p5v>;
137*724ba675SRob Herring		VDDIO-supply = <&reg_3p3v>;
138*724ba675SRob Herring	};
139*724ba675SRob Herring};
140*724ba675SRob Herring
141*724ba675SRob Herring&iomuxc {
142*724ba675SRob Herring	imx25-pdk {
143*724ba675SRob Herring		pinctrl_audmux: audmuxgrp {
144*724ba675SRob Herring			fsl,pins = <
145*724ba675SRob Herring				MX25_PAD_RW__AUD4_TXFS			0xe0
146*724ba675SRob Herring				MX25_PAD_OE__AUD4_TXC			0xe0
147*724ba675SRob Herring				MX25_PAD_EB0__AUD4_TXD			0xe0
148*724ba675SRob Herring				MX25_PAD_EB1__AUD4_RXD			0xe0
149*724ba675SRob Herring			>;
150*724ba675SRob Herring		};
151*724ba675SRob Herring
152*724ba675SRob Herring		pinctrl_can1: can1grp {
153*724ba675SRob Herring			fsl,pins = <
154*724ba675SRob Herring				MX25_PAD_GPIO_A__CAN1_TX		0x0
155*724ba675SRob Herring				MX25_PAD_GPIO_B__CAN1_RX		0x0
156*724ba675SRob Herring				MX25_PAD_D14__GPIO_4_6 			0x80000000
157*724ba675SRob Herring			>;
158*724ba675SRob Herring		};
159*724ba675SRob Herring
160*724ba675SRob Herring		pinctrl_esdhc1: esdhc1grp {
161*724ba675SRob Herring			fsl,pins = <
162*724ba675SRob Herring				MX25_PAD_SD1_CMD__ESDHC1_CMD		0x80000000
163*724ba675SRob Herring				MX25_PAD_SD1_CLK__ESDHC1_CLK		0x80000000
164*724ba675SRob Herring				MX25_PAD_SD1_DATA0__ESDHC1_DAT0		0x80000000
165*724ba675SRob Herring				MX25_PAD_SD1_DATA1__ESDHC1_DAT1		0x80000000
166*724ba675SRob Herring				MX25_PAD_SD1_DATA2__ESDHC1_DAT2		0x80000000
167*724ba675SRob Herring				MX25_PAD_SD1_DATA3__ESDHC1_DAT3		0x80000000
168*724ba675SRob Herring				MX25_PAD_A14__GPIO_2_0			0x80000000
169*724ba675SRob Herring				MX25_PAD_A15__GPIO_2_1			0x80000000
170*724ba675SRob Herring			>;
171*724ba675SRob Herring		};
172*724ba675SRob Herring
173*724ba675SRob Herring		pinctrl_fec: fecgrp {
174*724ba675SRob Herring			fsl,pins = <
175*724ba675SRob Herring				MX25_PAD_FEC_MDC__FEC_MDC		0x80000000
176*724ba675SRob Herring				MX25_PAD_FEC_MDIO__FEC_MDIO		0x400001e0
177*724ba675SRob Herring				MX25_PAD_FEC_TDATA0__FEC_TDATA0		0x80000000
178*724ba675SRob Herring				MX25_PAD_FEC_TDATA1__FEC_TDATA1		0x80000000
179*724ba675SRob Herring				MX25_PAD_FEC_TX_EN__FEC_TX_EN		0x80000000
180*724ba675SRob Herring				MX25_PAD_FEC_RDATA0__FEC_RDATA0		0x80000000
181*724ba675SRob Herring				MX25_PAD_FEC_RDATA1__FEC_RDATA1		0x80000000
182*724ba675SRob Herring				MX25_PAD_FEC_RX_DV__FEC_RX_DV		0x80000000
183*724ba675SRob Herring				MX25_PAD_FEC_TX_CLK__FEC_TX_CLK		0x1c0
184*724ba675SRob Herring				MX25_PAD_A17__GPIO_2_3			0x80000000
185*724ba675SRob Herring				MX25_PAD_D12__GPIO_4_8			0x80000000
186*724ba675SRob Herring			>;
187*724ba675SRob Herring		};
188*724ba675SRob Herring
189*724ba675SRob Herring		pinctrl_i2c1: i2c1grp {
190*724ba675SRob Herring			fsl,pins = <
191*724ba675SRob Herring				MX25_PAD_I2C1_CLK__I2C1_CLK		0x80000000
192*724ba675SRob Herring				MX25_PAD_I2C1_DAT__I2C1_DAT		0x80000000
193*724ba675SRob Herring			>;
194*724ba675SRob Herring		};
195*724ba675SRob Herring
196*724ba675SRob Herring		pinctrl_kpp: kppgrp {
197*724ba675SRob Herring			fsl,pins = <
198*724ba675SRob Herring				MX25_PAD_KPP_ROW0__KPP_ROW0	0x80000000
199*724ba675SRob Herring				MX25_PAD_KPP_ROW1__KPP_ROW1	0x80000000
200*724ba675SRob Herring				MX25_PAD_KPP_ROW2__KPP_ROW2	0x80000000
201*724ba675SRob Herring				MX25_PAD_KPP_ROW3__KPP_ROW3	0x80000000
202*724ba675SRob Herring				MX25_PAD_KPP_COL0__KPP_COL0	0x80000000
203*724ba675SRob Herring				MX25_PAD_KPP_COL1__KPP_COL1	0x80000000
204*724ba675SRob Herring				MX25_PAD_KPP_COL2__KPP_COL2	0x80000000
205*724ba675SRob Herring				MX25_PAD_KPP_COL3__KPP_COL3	0x80000000
206*724ba675SRob Herring			>;
207*724ba675SRob Herring		};
208*724ba675SRob Herring
209*724ba675SRob Herring		pinctrl_lcd: lcdgrp {
210*724ba675SRob Herring			fsl,pins = <
211*724ba675SRob Herring				MX25_PAD_LD0__LD0		0xe0
212*724ba675SRob Herring				MX25_PAD_LD1__LD1		0xe0
213*724ba675SRob Herring				MX25_PAD_LD2__LD2		0xe0
214*724ba675SRob Herring				MX25_PAD_LD3__LD3		0xe0
215*724ba675SRob Herring				MX25_PAD_LD4__LD4		0xe0
216*724ba675SRob Herring				MX25_PAD_LD5__LD5		0xe0
217*724ba675SRob Herring				MX25_PAD_LD6__LD6		0xe0
218*724ba675SRob Herring				MX25_PAD_LD7__LD7		0xe0
219*724ba675SRob Herring				MX25_PAD_LD8__LD8		0xe0
220*724ba675SRob Herring				MX25_PAD_LD9__LD9		0xe0
221*724ba675SRob Herring				MX25_PAD_LD10__LD10		0xe0
222*724ba675SRob Herring				MX25_PAD_LD11__LD11		0xe0
223*724ba675SRob Herring				MX25_PAD_LD12__LD12		0xe0
224*724ba675SRob Herring				MX25_PAD_LD13__LD13		0xe0
225*724ba675SRob Herring				MX25_PAD_LD14__LD14		0xe0
226*724ba675SRob Herring				MX25_PAD_LD15__LD15		0xe0
227*724ba675SRob Herring				MX25_PAD_GPIO_E__LD16		0xe0
228*724ba675SRob Herring				MX25_PAD_GPIO_F__LD17		0xe0
229*724ba675SRob Herring				MX25_PAD_HSYNC__HSYNC		0xe0
230*724ba675SRob Herring				MX25_PAD_VSYNC__VSYNC		0xe0
231*724ba675SRob Herring				MX25_PAD_LSCLK__LSCLK		0xe0
232*724ba675SRob Herring				MX25_PAD_OE_ACD__OE_ACD		0xe0
233*724ba675SRob Herring				MX25_PAD_CONTRAST__CONTRAST	0xe0
234*724ba675SRob Herring			>;
235*724ba675SRob Herring		};
236*724ba675SRob Herring
237*724ba675SRob Herring		pinctrl_uart1: uart1grp {
238*724ba675SRob Herring			fsl,pins = <
239*724ba675SRob Herring				MX25_PAD_UART1_RTS__UART1_RTS		0xe0
240*724ba675SRob Herring				MX25_PAD_UART1_CTS__UART1_CTS		0xe0
241*724ba675SRob Herring				MX25_PAD_UART1_TXD__UART1_TXD		0x80000000
242*724ba675SRob Herring				MX25_PAD_UART1_RXD__UART1_RXD		0xc0
243*724ba675SRob Herring			>;
244*724ba675SRob Herring		};
245*724ba675SRob Herring	};
246*724ba675SRob Herring};
247*724ba675SRob Herring
248*724ba675SRob Herring&lcdc {
249*724ba675SRob Herring	display = <&wvga>;
250*724ba675SRob Herring	fsl,lpccr = <0x00a903ff>;
251*724ba675SRob Herring	fsl,lscr1 = <0x00120300>;
252*724ba675SRob Herring	fsl,dmacr = <0x00020010>;
253*724ba675SRob Herring	pinctrl-names = "default";
254*724ba675SRob Herring	pinctrl-0 = <&pinctrl_lcd>;
255*724ba675SRob Herring	status = "okay";
256*724ba675SRob Herring};
257*724ba675SRob Herring
258*724ba675SRob Herring&nfc {
259*724ba675SRob Herring	nand-on-flash-bbt;
260*724ba675SRob Herring	status = "okay";
261*724ba675SRob Herring};
262*724ba675SRob Herring
263*724ba675SRob Herring&kpp {
264*724ba675SRob Herring	pinctrl-names = "default";
265*724ba675SRob Herring	pinctrl-0 = <&pinctrl_kpp>;
266*724ba675SRob Herring	linux,keymap = <
267*724ba675SRob Herring			MATRIX_KEY(0x0, 0x0, KEY_UP)
268*724ba675SRob Herring			MATRIX_KEY(0x0, 0x1, KEY_DOWN)
269*724ba675SRob Herring			MATRIX_KEY(0x0, 0x2, KEY_VOLUMEDOWN)
270*724ba675SRob Herring			MATRIX_KEY(0x0, 0x3, KEY_HOME)
271*724ba675SRob Herring			MATRIX_KEY(0x1, 0x0, KEY_RIGHT)
272*724ba675SRob Herring			MATRIX_KEY(0x1, 0x1, KEY_LEFT)
273*724ba675SRob Herring			MATRIX_KEY(0x1, 0x2, KEY_ENTER)
274*724ba675SRob Herring			MATRIX_KEY(0x1, 0x3, KEY_VOLUMEUP)
275*724ba675SRob Herring			MATRIX_KEY(0x2, 0x0, KEY_F6)
276*724ba675SRob Herring			MATRIX_KEY(0x2, 0x1, KEY_F8)
277*724ba675SRob Herring			MATRIX_KEY(0x2, 0x2, KEY_F9)
278*724ba675SRob Herring			MATRIX_KEY(0x2, 0x3, KEY_F10)
279*724ba675SRob Herring			MATRIX_KEY(0x3, 0x0, KEY_F1)
280*724ba675SRob Herring			MATRIX_KEY(0x3, 0x1, KEY_F2)
281*724ba675SRob Herring			MATRIX_KEY(0x3, 0x2, KEY_F3)
282*724ba675SRob Herring			MATRIX_KEY(0x3, 0x2, KEY_POWER)
283*724ba675SRob Herring	>;
284*724ba675SRob Herring	status = "okay";
285*724ba675SRob Herring};
286*724ba675SRob Herring
287*724ba675SRob Herring&ssi1 {
288*724ba675SRob Herring	status = "okay";
289*724ba675SRob Herring};
290*724ba675SRob Herring
291*724ba675SRob Herring&tsc {
292*724ba675SRob Herring	status = "okay";
293*724ba675SRob Herring};
294*724ba675SRob Herring
295*724ba675SRob Herring&tscadc {
296*724ba675SRob Herring	status = "okay";
297*724ba675SRob Herring};
298*724ba675SRob Herring
299*724ba675SRob Herring&uart1 {
300*724ba675SRob Herring	pinctrl-names = "default";
301*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart1>;
302*724ba675SRob Herring	uart-has-rtscts;
303*724ba675SRob Herring	status = "okay";
304*724ba675SRob Herring};
305*724ba675SRob Herring
306*724ba675SRob Herring&usbhost1 {
307*724ba675SRob Herring	status = "okay";
308*724ba675SRob Herring};
309*724ba675SRob Herring
310*724ba675SRob Herring&usbotg {
311*724ba675SRob Herring	external-vbus-divider;
312*724ba675SRob Herring	status = "okay";
313*724ba675SRob Herring};
314