xref: /linux/scripts/dtc/include-prefixes/arm/nvidia/tegra30-beaver.dts (revision a1c613ae4c322ddd58d5a8539dbfba2a0380a8c0)
1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2724ba675SRob Herring/dts-v1/;
3724ba675SRob Herring
4724ba675SRob Herring#include "tegra30.dtsi"
5724ba675SRob Herring#include "tegra30-cpu-opp.dtsi"
6724ba675SRob Herring#include "tegra30-cpu-opp-microvolt.dtsi"
7724ba675SRob Herring
8724ba675SRob Herring/ {
9724ba675SRob Herring	model = "NVIDIA Tegra30 Beaver evaluation board";
10724ba675SRob Herring	compatible = "nvidia,beaver", "nvidia,tegra30";
11724ba675SRob Herring
12724ba675SRob Herring	aliases {
13724ba675SRob Herring		rtc0 = "/i2c@7000d000/tps65911@2d";
14724ba675SRob Herring		rtc1 = "/rtc@7000e000";
15724ba675SRob Herring		serial0 = &uarta;
16724ba675SRob Herring	};
17724ba675SRob Herring
18724ba675SRob Herring	chosen {
19724ba675SRob Herring		stdout-path = "serial0:115200n8";
20724ba675SRob Herring	};
21724ba675SRob Herring
22724ba675SRob Herring	memory@80000000 {
23724ba675SRob Herring		reg = <0x80000000 0x7ff00000>;
24724ba675SRob Herring	};
25724ba675SRob Herring
26724ba675SRob Herring	pcie@3000 {
27724ba675SRob Herring		status = "okay";
28724ba675SRob Herring
29724ba675SRob Herring		avdd-pexa-supply = <&ldo1_reg>;
30724ba675SRob Herring		vdd-pexa-supply = <&ldo1_reg>;
31724ba675SRob Herring		avdd-pexb-supply = <&ldo1_reg>;
32724ba675SRob Herring		vdd-pexb-supply = <&ldo1_reg>;
33724ba675SRob Herring		avdd-pex-pll-supply = <&ldo1_reg>;
34724ba675SRob Herring		avdd-plle-supply = <&ldo1_reg>;
35724ba675SRob Herring		vddio-pex-ctl-supply = <&sys_3v3_reg>;
36724ba675SRob Herring		hvdd-pex-supply = <&sys_3v3_pexs_reg>;
37724ba675SRob Herring
38724ba675SRob Herring		pci@1,0 {
39724ba675SRob Herring			status = "okay";
40724ba675SRob Herring			nvidia,num-lanes = <2>;
41724ba675SRob Herring		};
42724ba675SRob Herring
43724ba675SRob Herring		pci@2,0 {
44724ba675SRob Herring			nvidia,num-lanes = <2>;
45724ba675SRob Herring		};
46724ba675SRob Herring
47724ba675SRob Herring		pci@3,0 {
48724ba675SRob Herring			status = "okay";
49724ba675SRob Herring			nvidia,num-lanes = <2>;
50724ba675SRob Herring		};
51724ba675SRob Herring	};
52724ba675SRob Herring
53724ba675SRob Herring	host1x@50000000 {
54724ba675SRob Herring		hdmi@54280000 {
55724ba675SRob Herring			status = "okay";
56724ba675SRob Herring
57724ba675SRob Herring			hdmi-supply = <&vdd_5v0_hdmi>;
58724ba675SRob Herring			vdd-supply = <&sys_3v3_reg>;
59724ba675SRob Herring			pll-supply = <&vio_reg>;
60724ba675SRob Herring
61724ba675SRob Herring			nvidia,hpd-gpio =
62724ba675SRob Herring				<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
63724ba675SRob Herring			nvidia,ddc-i2c-bus = <&hdmiddc>;
64724ba675SRob Herring		};
65724ba675SRob Herring	};
66724ba675SRob Herring
67724ba675SRob Herring	pinmux@70000868 {
68724ba675SRob Herring		pinctrl-names = "default";
69724ba675SRob Herring		pinctrl-0 = <&state_default>;
70724ba675SRob Herring
71724ba675SRob Herring		state_default: pinmux {
72724ba675SRob Herring			clk_32k_out_pa0 {
73724ba675SRob Herring				nvidia,pins = "clk_32k_out_pa0";
74724ba675SRob Herring				nvidia,function = "blink";
75724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
76724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
77724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
78724ba675SRob Herring			};
79724ba675SRob Herring			uart3_cts_n_pa1 {
80724ba675SRob Herring				nvidia,pins = "uart3_cts_n_pa1";
81724ba675SRob Herring				nvidia,function = "uartc";
82724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
83724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
84724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
85724ba675SRob Herring			};
86724ba675SRob Herring			dap2_fs_pa2 {
87724ba675SRob Herring				nvidia,pins = "dap2_fs_pa2";
88724ba675SRob Herring				nvidia,function = "i2s1";
89724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
90724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
91724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
92724ba675SRob Herring			};
93724ba675SRob Herring			dap2_sclk_pa3 {
94724ba675SRob Herring				nvidia,pins = "dap2_sclk_pa3";
95724ba675SRob Herring				nvidia,function = "i2s1";
96724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
97724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
98724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
99724ba675SRob Herring			};
100724ba675SRob Herring			dap2_din_pa4 {
101724ba675SRob Herring				nvidia,pins = "dap2_din_pa4";
102724ba675SRob Herring				nvidia,function = "i2s1";
103724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
104724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
105724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
106724ba675SRob Herring			};
107724ba675SRob Herring			dap2_dout_pa5 {
108724ba675SRob Herring				nvidia,pins = "dap2_dout_pa5";
109724ba675SRob Herring				nvidia,function = "i2s1";
110724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
111724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
112724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
113724ba675SRob Herring			};
114724ba675SRob Herring			sdmmc3_clk_pa6 {
115724ba675SRob Herring				nvidia,pins = "sdmmc3_clk_pa6";
116724ba675SRob Herring				nvidia,function = "sdmmc3";
117724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
118724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
119724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
120724ba675SRob Herring			};
121724ba675SRob Herring			sdmmc3_cmd_pa7 {
122724ba675SRob Herring				nvidia,pins = "sdmmc3_cmd_pa7";
123724ba675SRob Herring				nvidia,function = "sdmmc3";
124724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
125724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
126724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
127724ba675SRob Herring			};
128724ba675SRob Herring			gmi_a17_pb0 {
129724ba675SRob Herring				nvidia,pins = "gmi_a17_pb0";
130724ba675SRob Herring				nvidia,function = "spi4";
131724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
132724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
133724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
134724ba675SRob Herring			};
135724ba675SRob Herring			gmi_a18_pb1 {
136724ba675SRob Herring				nvidia,pins = "gmi_a18_pb1";
137724ba675SRob Herring				nvidia,function = "spi4";
138724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
139724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
140724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
141724ba675SRob Herring			};
142724ba675SRob Herring			lcd_pwr0_pb2 {
143724ba675SRob Herring				nvidia,pins = "lcd_pwr0_pb2";
144724ba675SRob Herring				nvidia,function = "displaya";
145724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
146724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
147724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
148724ba675SRob Herring			};
149724ba675SRob Herring			lcd_pclk_pb3 {
150724ba675SRob Herring				nvidia,pins = "lcd_pclk_pb3";
151724ba675SRob Herring				nvidia,function = "displaya";
152724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
153724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
154724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
155724ba675SRob Herring			};
156724ba675SRob Herring			sdmmc3_dat3_pb4 {
157724ba675SRob Herring				nvidia,pins = "sdmmc3_dat3_pb4";
158724ba675SRob Herring				nvidia,function = "sdmmc3";
159724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
160724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
161724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
162724ba675SRob Herring			};
163724ba675SRob Herring			sdmmc3_dat2_pb5 {
164724ba675SRob Herring				nvidia,pins = "sdmmc3_dat2_pb5";
165724ba675SRob Herring				nvidia,function = "sdmmc3";
166724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
167724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
168724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
169724ba675SRob Herring			};
170724ba675SRob Herring			sdmmc3_dat1_pb6 {
171724ba675SRob Herring				nvidia,pins = "sdmmc3_dat1_pb6";
172724ba675SRob Herring				nvidia,function = "sdmmc3";
173724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
174724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
175724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
176724ba675SRob Herring			};
177724ba675SRob Herring			sdmmc3_dat0_pb7 {
178724ba675SRob Herring				nvidia,pins = "sdmmc3_dat0_pb7";
179724ba675SRob Herring				nvidia,function = "sdmmc3";
180724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
181724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
182724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
183724ba675SRob Herring			};
184724ba675SRob Herring			uart3_rts_n_pc0 {
185724ba675SRob Herring				nvidia,pins = "uart3_rts_n_pc0";
186724ba675SRob Herring				nvidia,function = "uartc";
187724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
188724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
189724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
190724ba675SRob Herring			};
191724ba675SRob Herring			lcd_pwr1_pc1 {
192724ba675SRob Herring				nvidia,pins = "lcd_pwr1_pc1";
193724ba675SRob Herring				nvidia,function = "displaya";
194724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
195724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
196724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
197724ba675SRob Herring			};
198724ba675SRob Herring			uart2_txd_pc2 {
199724ba675SRob Herring				nvidia,pins = "uart2_txd_pc2";
200724ba675SRob Herring				nvidia,function = "uartb";
201724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
202724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
203724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
204724ba675SRob Herring			};
205724ba675SRob Herring			uart2_rxd_pc3 {
206724ba675SRob Herring				nvidia,pins = "uart2_rxd_pc3";
207724ba675SRob Herring				nvidia,function = "uartb";
208724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
209724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
210724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
211724ba675SRob Herring			};
212724ba675SRob Herring			gen1_i2c_scl_pc4 {
213724ba675SRob Herring				nvidia,pins = "gen1_i2c_scl_pc4";
214724ba675SRob Herring				nvidia,function = "i2c1";
215724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
216724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
217724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
218724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
219724ba675SRob Herring			};
220724ba675SRob Herring			gen1_i2c_sda_pc5 {
221724ba675SRob Herring				nvidia,pins = "gen1_i2c_sda_pc5";
222724ba675SRob Herring				nvidia,function = "i2c1";
223724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
224724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
225724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
226724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
227724ba675SRob Herring			};
228724ba675SRob Herring			lcd_pwr2_pc6 {
229724ba675SRob Herring				nvidia,pins = "lcd_pwr2_pc6";
230724ba675SRob Herring				nvidia,function = "displaya";
231724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
232724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
233724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
234724ba675SRob Herring			};
235724ba675SRob Herring			gmi_wp_n_pc7 {
236724ba675SRob Herring				nvidia,pins = "gmi_wp_n_pc7";
237724ba675SRob Herring				nvidia,function = "gmi";
238724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
239724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
240724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
241724ba675SRob Herring			};
242724ba675SRob Herring			sdmmc3_dat5_pd0 {
243724ba675SRob Herring				nvidia,pins = "sdmmc3_dat5_pd0";
244724ba675SRob Herring				nvidia,function = "sdmmc3";
245724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
246724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
247724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
248724ba675SRob Herring			};
249724ba675SRob Herring			sdmmc3_dat4_pd1 {
250724ba675SRob Herring				nvidia,pins = "sdmmc3_dat4_pd1";
251724ba675SRob Herring				nvidia,function = "sdmmc3";
252724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
253724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
254724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
255724ba675SRob Herring			};
256724ba675SRob Herring			lcd_dc1_pd2 {
257724ba675SRob Herring				nvidia,pins = "lcd_dc1_pd2";
258724ba675SRob Herring				nvidia,function = "displaya";
259724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
260724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
261724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
262724ba675SRob Herring			};
263724ba675SRob Herring			sdmmc3_dat6_pd3 {
264724ba675SRob Herring				nvidia,pins = "sdmmc3_dat6_pd3";
265724ba675SRob Herring				nvidia,function = "spdif";
266724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
267724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
268724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
269724ba675SRob Herring			};
270724ba675SRob Herring			sdmmc3_dat7_pd4 {
271724ba675SRob Herring				nvidia,pins = "sdmmc3_dat7_pd4";
272724ba675SRob Herring				nvidia,function = "spdif";
273724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
274724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
275724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
276724ba675SRob Herring			};
277724ba675SRob Herring			vi_d1_pd5 {
278724ba675SRob Herring				nvidia,pins = "vi_d1_pd5";
279724ba675SRob Herring				nvidia,function = "sdmmc2";
280724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
281724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
282724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
283724ba675SRob Herring			};
284724ba675SRob Herring			vi_vsync_pd6 {
285724ba675SRob Herring				nvidia,pins = "vi_vsync_pd6";
286724ba675SRob Herring				nvidia,function = "ddr";
287724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
288724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
289724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
290724ba675SRob Herring			};
291724ba675SRob Herring			vi_hsync_pd7 {
292724ba675SRob Herring				nvidia,pins = "vi_hsync_pd7";
293724ba675SRob Herring				nvidia,function = "ddr";
294724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
295724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
296724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
297724ba675SRob Herring			};
298724ba675SRob Herring			lcd_d0_pe0 {
299724ba675SRob Herring				nvidia,pins = "lcd_d0_pe0";
300724ba675SRob Herring				nvidia,function = "displaya";
301724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
302724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
303724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
304724ba675SRob Herring			};
305724ba675SRob Herring			lcd_d1_pe1 {
306724ba675SRob Herring				nvidia,pins = "lcd_d1_pe1";
307724ba675SRob Herring				nvidia,function = "displaya";
308724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
309724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
310724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
311724ba675SRob Herring			};
312724ba675SRob Herring			lcd_d2_pe2 {
313724ba675SRob Herring				nvidia,pins = "lcd_d2_pe2";
314724ba675SRob Herring				nvidia,function = "displaya";
315724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
316724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
317724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
318724ba675SRob Herring			};
319724ba675SRob Herring			lcd_d3_pe3 {
320724ba675SRob Herring				nvidia,pins = "lcd_d3_pe3";
321724ba675SRob Herring				nvidia,function = "displaya";
322724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
323724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
324724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
325724ba675SRob Herring			};
326724ba675SRob Herring			lcd_d4_pe4 {
327724ba675SRob Herring				nvidia,pins = "lcd_d4_pe4";
328724ba675SRob Herring				nvidia,function = "displaya";
329724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
330724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
331724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
332724ba675SRob Herring			};
333724ba675SRob Herring			lcd_d5_pe5 {
334724ba675SRob Herring				nvidia,pins = "lcd_d5_pe5";
335724ba675SRob Herring				nvidia,function = "displaya";
336724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
337724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
338724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
339724ba675SRob Herring			};
340724ba675SRob Herring			lcd_d6_pe6 {
341724ba675SRob Herring				nvidia,pins = "lcd_d6_pe6";
342724ba675SRob Herring				nvidia,function = "displaya";
343724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
344724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
345724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
346724ba675SRob Herring			};
347724ba675SRob Herring			lcd_d7_pe7 {
348724ba675SRob Herring				nvidia,pins = "lcd_d7_pe7";
349724ba675SRob Herring				nvidia,function = "displaya";
350724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
351724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
352724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
353724ba675SRob Herring			};
354724ba675SRob Herring			lcd_d8_pf0 {
355724ba675SRob Herring				nvidia,pins = "lcd_d8_pf0";
356724ba675SRob Herring				nvidia,function = "displaya";
357724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
358724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
359724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
360724ba675SRob Herring			};
361724ba675SRob Herring			lcd_d9_pf1 {
362724ba675SRob Herring				nvidia,pins = "lcd_d9_pf1";
363724ba675SRob Herring				nvidia,function = "displaya";
364724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
365724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
366724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
367724ba675SRob Herring			};
368724ba675SRob Herring			lcd_d10_pf2 {
369724ba675SRob Herring				nvidia,pins = "lcd_d10_pf2";
370724ba675SRob Herring				nvidia,function = "displaya";
371724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
372724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
373724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
374724ba675SRob Herring			};
375724ba675SRob Herring			lcd_d11_pf3 {
376724ba675SRob Herring				nvidia,pins = "lcd_d11_pf3";
377724ba675SRob Herring				nvidia,function = "displaya";
378724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
379724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
380724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
381724ba675SRob Herring			};
382724ba675SRob Herring			lcd_d12_pf4 {
383724ba675SRob Herring				nvidia,pins = "lcd_d12_pf4";
384724ba675SRob Herring				nvidia,function = "displaya";
385724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
386724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
387724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
388724ba675SRob Herring			};
389724ba675SRob Herring			lcd_d13_pf5 {
390724ba675SRob Herring				nvidia,pins = "lcd_d13_pf5";
391724ba675SRob Herring				nvidia,function = "displaya";
392724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
393724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
394724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
395724ba675SRob Herring			};
396724ba675SRob Herring			lcd_d14_pf6 {
397724ba675SRob Herring				nvidia,pins = "lcd_d14_pf6";
398724ba675SRob Herring				nvidia,function = "displaya";
399724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
400724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
401724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
402724ba675SRob Herring			};
403724ba675SRob Herring			lcd_d15_pf7 {
404724ba675SRob Herring				nvidia,pins = "lcd_d15_pf7";
405724ba675SRob Herring				nvidia,function = "displaya";
406724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
407724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
408724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
409724ba675SRob Herring			};
410724ba675SRob Herring			gmi_ad0_pg0 {
411724ba675SRob Herring				nvidia,pins = "gmi_ad0_pg0";
412724ba675SRob Herring				nvidia,function = "nand";
413724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
414724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
415724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
416724ba675SRob Herring			};
417724ba675SRob Herring			gmi_ad1_pg1 {
418724ba675SRob Herring				nvidia,pins = "gmi_ad1_pg1";
419724ba675SRob Herring				nvidia,function = "nand";
420724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
421724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
422724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
423724ba675SRob Herring			};
424724ba675SRob Herring			gmi_ad2_pg2 {
425724ba675SRob Herring				nvidia,pins = "gmi_ad2_pg2";
426724ba675SRob Herring				nvidia,function = "nand";
427724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
428724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
429724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
430724ba675SRob Herring			};
431724ba675SRob Herring			gmi_ad3_pg3 {
432724ba675SRob Herring				nvidia,pins = "gmi_ad3_pg3";
433724ba675SRob Herring				nvidia,function = "nand";
434724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
435724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
436724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
437724ba675SRob Herring			};
438724ba675SRob Herring			gmi_ad4_pg4 {
439724ba675SRob Herring				nvidia,pins = "gmi_ad4_pg4";
440724ba675SRob Herring				nvidia,function = "nand";
441724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
442724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
443724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
444724ba675SRob Herring			};
445724ba675SRob Herring			gmi_ad5_pg5 {
446724ba675SRob Herring				nvidia,pins = "gmi_ad5_pg5";
447724ba675SRob Herring				nvidia,function = "nand";
448724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
449724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
450724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
451724ba675SRob Herring			};
452724ba675SRob Herring			gmi_ad6_pg6 {
453724ba675SRob Herring				nvidia,pins = "gmi_ad6_pg6";
454724ba675SRob Herring				nvidia,function = "nand";
455724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
456724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
457724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
458724ba675SRob Herring			};
459724ba675SRob Herring			gmi_ad7_pg7 {
460724ba675SRob Herring				nvidia,pins = "gmi_ad7_pg7";
461724ba675SRob Herring				nvidia,function = "nand";
462724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
463724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
464724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
465724ba675SRob Herring			};
466724ba675SRob Herring			gmi_ad8_ph0 {
467724ba675SRob Herring				nvidia,pins = "gmi_ad8_ph0";
468724ba675SRob Herring				nvidia,function = "pwm0";
469724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
470724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
471724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
472724ba675SRob Herring			};
473724ba675SRob Herring			gmi_ad9_ph1 {
474724ba675SRob Herring				nvidia,pins = "gmi_ad9_ph1";
475724ba675SRob Herring				nvidia,function = "pwm1";
476724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
477724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
478724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
479724ba675SRob Herring			};
480724ba675SRob Herring			gmi_ad10_ph2 {
481724ba675SRob Herring				nvidia,pins = "gmi_ad10_ph2";
482724ba675SRob Herring				nvidia,function = "nand";
483724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
484724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
485724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
486724ba675SRob Herring			};
487724ba675SRob Herring			gmi_ad11_ph3 {
488724ba675SRob Herring				nvidia,pins = "gmi_ad11_ph3";
489724ba675SRob Herring				nvidia,function = "nand";
490724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
491724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
492724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
493724ba675SRob Herring			};
494724ba675SRob Herring			gmi_ad12_ph4 {
495724ba675SRob Herring				nvidia,pins = "gmi_ad12_ph4";
496724ba675SRob Herring				nvidia,function = "nand";
497724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
498724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
499724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
500724ba675SRob Herring			};
501724ba675SRob Herring			gmi_ad13_ph5 {
502724ba675SRob Herring				nvidia,pins = "gmi_ad13_ph5";
503724ba675SRob Herring				nvidia,function = "nand";
504724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
505724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
506724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
507724ba675SRob Herring			};
508724ba675SRob Herring			gmi_ad14_ph6 {
509724ba675SRob Herring				nvidia,pins = "gmi_ad14_ph6";
510724ba675SRob Herring				nvidia,function = "nand";
511724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
512724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
513724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
514724ba675SRob Herring			};
515724ba675SRob Herring			gmi_wr_n_pi0 {
516724ba675SRob Herring				nvidia,pins = "gmi_wr_n_pi0";
517724ba675SRob Herring				nvidia,function = "nand";
518724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
519724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
520724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
521724ba675SRob Herring			};
522724ba675SRob Herring			gmi_oe_n_pi1 {
523724ba675SRob Herring				nvidia,pins = "gmi_oe_n_pi1";
524724ba675SRob Herring				nvidia,function = "nand";
525724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
526724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
527724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
528724ba675SRob Herring			};
529724ba675SRob Herring			gmi_dqs_pi2 {
530724ba675SRob Herring				nvidia,pins = "gmi_dqs_pi2";
531724ba675SRob Herring				nvidia,function = "nand";
532724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
533724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
534724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
535724ba675SRob Herring			};
536724ba675SRob Herring			gmi_iordy_pi5 {
537724ba675SRob Herring				nvidia,pins = "gmi_iordy_pi5";
538724ba675SRob Herring				nvidia,function = "rsvd1";
539724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
540724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
541724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
542724ba675SRob Herring			};
543724ba675SRob Herring			gmi_cs7_n_pi6 {
544724ba675SRob Herring				nvidia,pins = "gmi_cs7_n_pi6";
545724ba675SRob Herring				nvidia,function = "nand";
546724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
547724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
548724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
549724ba675SRob Herring			};
550724ba675SRob Herring			gmi_wait_pi7 {
551724ba675SRob Herring				nvidia,pins = "gmi_wait_pi7";
552724ba675SRob Herring				nvidia,function = "nand";
553724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
554724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
555724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
556724ba675SRob Herring			};
557724ba675SRob Herring			lcd_de_pj1 {
558724ba675SRob Herring				nvidia,pins = "lcd_de_pj1";
559724ba675SRob Herring				nvidia,function = "displaya";
560724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
561724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
562724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
563724ba675SRob Herring			};
564724ba675SRob Herring			lcd_hsync_pj3 {
565724ba675SRob Herring				nvidia,pins = "lcd_hsync_pj3";
566724ba675SRob Herring				nvidia,function = "displaya";
567724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
568724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
569724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
570724ba675SRob Herring			};
571724ba675SRob Herring			lcd_vsync_pj4 {
572724ba675SRob Herring				nvidia,pins = "lcd_vsync_pj4";
573724ba675SRob Herring				nvidia,function = "displaya";
574724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
575724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
576724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
577724ba675SRob Herring			};
578724ba675SRob Herring			uart2_cts_n_pj5 {
579724ba675SRob Herring				nvidia,pins = "uart2_cts_n_pj5";
580724ba675SRob Herring				nvidia,function = "uartb";
581724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
582724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
583724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
584724ba675SRob Herring			};
585724ba675SRob Herring			uart2_rts_n_pj6 {
586724ba675SRob Herring				nvidia,pins = "uart2_rts_n_pj6";
587724ba675SRob Herring				nvidia,function = "uartb";
588724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
589724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
590724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
591724ba675SRob Herring			};
592724ba675SRob Herring			gmi_a16_pj7 {
593724ba675SRob Herring				nvidia,pins = "gmi_a16_pj7";
594724ba675SRob Herring				nvidia,function = "spi4";
595724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
596724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
597724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
598724ba675SRob Herring			};
599724ba675SRob Herring			gmi_adv_n_pk0 {
600724ba675SRob Herring				nvidia,pins = "gmi_adv_n_pk0";
601724ba675SRob Herring				nvidia,function = "nand";
602724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
603724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
604724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
605724ba675SRob Herring			};
606724ba675SRob Herring			gmi_clk_pk1 {
607724ba675SRob Herring				nvidia,pins = "gmi_clk_pk1";
608724ba675SRob Herring				nvidia,function = "nand";
609724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
610724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
611724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
612724ba675SRob Herring			};
613724ba675SRob Herring			gmi_cs2_n_pk3 {
614724ba675SRob Herring				nvidia,pins = "gmi_cs2_n_pk3";
615724ba675SRob Herring				nvidia,function = "rsvd1";
616724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
617724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
618724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
619724ba675SRob Herring			};
620724ba675SRob Herring			gmi_cs3_n_pk4 {
621724ba675SRob Herring				nvidia,pins = "gmi_cs3_n_pk4";
622724ba675SRob Herring				nvidia,function = "nand";
623724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
624724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
625724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
626724ba675SRob Herring			};
627724ba675SRob Herring			spdif_out_pk5 {
628724ba675SRob Herring				nvidia,pins = "spdif_out_pk5";
629724ba675SRob Herring				nvidia,function = "spdif";
630724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
631724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
632724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
633724ba675SRob Herring			};
634724ba675SRob Herring			spdif_in_pk6 {
635724ba675SRob Herring				nvidia,pins = "spdif_in_pk6";
636724ba675SRob Herring				nvidia,function = "spdif";
637724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
638724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
639724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
640724ba675SRob Herring			};
641724ba675SRob Herring			gmi_a19_pk7 {
642724ba675SRob Herring				nvidia,pins = "gmi_a19_pk7";
643724ba675SRob Herring				nvidia,function = "spi4";
644724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
645724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
646724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
647724ba675SRob Herring			};
648724ba675SRob Herring			vi_d2_pl0 {
649724ba675SRob Herring				nvidia,pins = "vi_d2_pl0";
650724ba675SRob Herring				nvidia,function = "sdmmc2";
651724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
652724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
653724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
654724ba675SRob Herring			};
655724ba675SRob Herring			vi_d3_pl1 {
656724ba675SRob Herring				nvidia,pins = "vi_d3_pl1";
657724ba675SRob Herring				nvidia,function = "sdmmc2";
658724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
659724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
660724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
661724ba675SRob Herring			};
662724ba675SRob Herring			vi_d4_pl2 {
663724ba675SRob Herring				nvidia,pins = "vi_d4_pl2";
664724ba675SRob Herring				nvidia,function = "vi";
665724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
666724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
667724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
668724ba675SRob Herring			};
669724ba675SRob Herring			vi_d5_pl3 {
670724ba675SRob Herring				nvidia,pins = "vi_d5_pl3";
671724ba675SRob Herring				nvidia,function = "sdmmc2";
672724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
673724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
674724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
675724ba675SRob Herring			};
676724ba675SRob Herring			vi_d6_pl4 {
677724ba675SRob Herring				nvidia,pins = "vi_d6_pl4";
678724ba675SRob Herring				nvidia,function = "vi";
679724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
680724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
681724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
682724ba675SRob Herring			};
683724ba675SRob Herring			vi_d7_pl5 {
684724ba675SRob Herring				nvidia,pins = "vi_d7_pl5";
685724ba675SRob Herring				nvidia,function = "sdmmc2";
686724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
687724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
688724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
689724ba675SRob Herring			};
690724ba675SRob Herring			vi_d8_pl6 {
691724ba675SRob Herring				nvidia,pins = "vi_d8_pl6";
692724ba675SRob Herring				nvidia,function = "sdmmc2";
693724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
694724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
695724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
696724ba675SRob Herring			};
697724ba675SRob Herring			vi_d9_pl7 {
698724ba675SRob Herring				nvidia,pins = "vi_d9_pl7";
699724ba675SRob Herring				nvidia,function = "sdmmc2";
700724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
701724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
702724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
703724ba675SRob Herring			};
704724ba675SRob Herring			lcd_d16_pm0 {
705724ba675SRob Herring				nvidia,pins = "lcd_d16_pm0";
706724ba675SRob Herring				nvidia,function = "displaya";
707724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
708724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
709724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
710724ba675SRob Herring			};
711724ba675SRob Herring			lcd_d17_pm1 {
712724ba675SRob Herring				nvidia,pins = "lcd_d17_pm1";
713724ba675SRob Herring				nvidia,function = "displaya";
714724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
715724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
716724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
717724ba675SRob Herring			};
718724ba675SRob Herring			lcd_d18_pm2 {
719724ba675SRob Herring				nvidia,pins = "lcd_d18_pm2";
720724ba675SRob Herring				nvidia,function = "displaya";
721724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
722724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
723724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
724724ba675SRob Herring			};
725724ba675SRob Herring			lcd_d19_pm3 {
726724ba675SRob Herring				nvidia,pins = "lcd_d19_pm3";
727724ba675SRob Herring				nvidia,function = "displaya";
728724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
729724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
730724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
731724ba675SRob Herring			};
732724ba675SRob Herring			lcd_d20_pm4 {
733724ba675SRob Herring				nvidia,pins = "lcd_d20_pm4";
734724ba675SRob Herring				nvidia,function = "displaya";
735724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
736724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
737724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
738724ba675SRob Herring			};
739724ba675SRob Herring			lcd_d21_pm5 {
740724ba675SRob Herring				nvidia,pins = "lcd_d21_pm5";
741724ba675SRob Herring				nvidia,function = "displaya";
742724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
743724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
744724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
745724ba675SRob Herring			};
746724ba675SRob Herring			lcd_d22_pm6 {
747724ba675SRob Herring				nvidia,pins = "lcd_d22_pm6";
748724ba675SRob Herring				nvidia,function = "displaya";
749724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
750724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
751724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
752724ba675SRob Herring			};
753724ba675SRob Herring			lcd_d23_pm7 {
754724ba675SRob Herring				nvidia,pins = "lcd_d23_pm7";
755724ba675SRob Herring				nvidia,function = "displaya";
756724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
757724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
758724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
759724ba675SRob Herring			};
760724ba675SRob Herring			dap1_fs_pn0 {
761724ba675SRob Herring				nvidia,pins = "dap1_fs_pn0";
762724ba675SRob Herring				nvidia,function = "i2s0";
763724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
764724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
765724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
766724ba675SRob Herring			};
767724ba675SRob Herring			dap1_din_pn1 {
768724ba675SRob Herring				nvidia,pins = "dap1_din_pn1";
769724ba675SRob Herring				nvidia,function = "i2s0";
770724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
771724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
772724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
773724ba675SRob Herring			};
774724ba675SRob Herring			dap1_dout_pn2 {
775724ba675SRob Herring				nvidia,pins = "dap1_dout_pn2";
776724ba675SRob Herring				nvidia,function = "i2s0";
777724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
778724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
779724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
780724ba675SRob Herring			};
781724ba675SRob Herring			dap1_sclk_pn3 {
782724ba675SRob Herring				nvidia,pins = "dap1_sclk_pn3";
783724ba675SRob Herring				nvidia,function = "i2s0";
784724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
785724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
786724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
787724ba675SRob Herring			};
788724ba675SRob Herring			lcd_cs0_n_pn4 {
789724ba675SRob Herring				nvidia,pins = "lcd_cs0_n_pn4";
790724ba675SRob Herring				nvidia,function = "displaya";
791724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
792724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
793724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
794724ba675SRob Herring			};
795724ba675SRob Herring			lcd_sdout_pn5 {
796724ba675SRob Herring				nvidia,pins = "lcd_sdout_pn5";
797724ba675SRob Herring				nvidia,function = "displaya";
798724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
799724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
800724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
801724ba675SRob Herring			};
802724ba675SRob Herring			lcd_dc0_pn6 {
803724ba675SRob Herring				nvidia,pins = "lcd_dc0_pn6";
804724ba675SRob Herring				nvidia,function = "displaya";
805724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
806724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
807724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
808724ba675SRob Herring			};
809724ba675SRob Herring			hdmi_int_pn7 {
810724ba675SRob Herring				nvidia,pins = "hdmi_int_pn7";
811724ba675SRob Herring				nvidia,function = "hdmi";
812724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
813724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
814724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
815724ba675SRob Herring			};
816724ba675SRob Herring			ulpi_data7_po0 {
817724ba675SRob Herring				nvidia,pins = "ulpi_data7_po0";
818724ba675SRob Herring				nvidia,function = "uarta";
819724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
820724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
821724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
822724ba675SRob Herring			};
823724ba675SRob Herring			ulpi_data0_po1 {
824724ba675SRob Herring				nvidia,pins = "ulpi_data0_po1";
825724ba675SRob Herring				nvidia,function = "uarta";
826724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
827724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
828724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
829724ba675SRob Herring			};
830724ba675SRob Herring			ulpi_data1_po2 {
831724ba675SRob Herring				nvidia,pins = "ulpi_data1_po2";
832724ba675SRob Herring				nvidia,function = "uarta";
833724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
834724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
835724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
836724ba675SRob Herring			};
837724ba675SRob Herring			ulpi_data2_po3 {
838724ba675SRob Herring				nvidia,pins = "ulpi_data2_po3";
839724ba675SRob Herring				nvidia,function = "uarta";
840724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
841724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
842724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
843724ba675SRob Herring			};
844724ba675SRob Herring			ulpi_data3_po4 {
845724ba675SRob Herring				nvidia,pins = "ulpi_data3_po4";
846724ba675SRob Herring				nvidia,function = "uarta";
847724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
848724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
849724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
850724ba675SRob Herring			};
851724ba675SRob Herring			ulpi_data4_po5 {
852724ba675SRob Herring				nvidia,pins = "ulpi_data4_po5";
853724ba675SRob Herring				nvidia,function = "uarta";
854724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
855724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
856724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
857724ba675SRob Herring			};
858724ba675SRob Herring			ulpi_data5_po6 {
859724ba675SRob Herring				nvidia,pins = "ulpi_data5_po6";
860724ba675SRob Herring				nvidia,function = "uarta";
861724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
862724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
863724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
864724ba675SRob Herring			};
865724ba675SRob Herring			ulpi_data6_po7 {
866724ba675SRob Herring				nvidia,pins = "ulpi_data6_po7";
867724ba675SRob Herring				nvidia,function = "uarta";
868724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
869724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
870724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
871724ba675SRob Herring			};
872724ba675SRob Herring			dap3_fs_pp0 {
873724ba675SRob Herring				nvidia,pins = "dap3_fs_pp0";
874724ba675SRob Herring				nvidia,function = "i2s2";
875724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
876724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
877724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
878724ba675SRob Herring			};
879724ba675SRob Herring			dap3_din_pp1 {
880724ba675SRob Herring				nvidia,pins = "dap3_din_pp1";
881724ba675SRob Herring				nvidia,function = "i2s2";
882724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
883724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
884724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
885724ba675SRob Herring			};
886724ba675SRob Herring			dap3_dout_pp2 {
887724ba675SRob Herring				nvidia,pins = "dap3_dout_pp2";
888724ba675SRob Herring				nvidia,function = "i2s2";
889724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
890724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
891724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
892724ba675SRob Herring			};
893724ba675SRob Herring			dap3_sclk_pp3 {
894724ba675SRob Herring				nvidia,pins = "dap3_sclk_pp3";
895724ba675SRob Herring				nvidia,function = "i2s2";
896724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
897724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
898724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
899724ba675SRob Herring			};
900724ba675SRob Herring			dap4_fs_pp4 {
901724ba675SRob Herring				nvidia,pins = "dap4_fs_pp4";
902724ba675SRob Herring				nvidia,function = "i2s3";
903724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
904724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
905724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
906724ba675SRob Herring			};
907724ba675SRob Herring			dap4_din_pp5 {
908724ba675SRob Herring				nvidia,pins = "dap4_din_pp5";
909724ba675SRob Herring				nvidia,function = "i2s3";
910724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
911724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
912724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
913724ba675SRob Herring			};
914724ba675SRob Herring			dap4_dout_pp6 {
915724ba675SRob Herring				nvidia,pins = "dap4_dout_pp6";
916724ba675SRob Herring				nvidia,function = "i2s3";
917724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
918724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
919724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
920724ba675SRob Herring			};
921724ba675SRob Herring			dap4_sclk_pp7 {
922724ba675SRob Herring				nvidia,pins = "dap4_sclk_pp7";
923724ba675SRob Herring				nvidia,function = "i2s3";
924724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
925724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
926724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
927724ba675SRob Herring			};
928724ba675SRob Herring			kb_col0_pq0 {
929724ba675SRob Herring				nvidia,pins = "kb_col0_pq0";
930724ba675SRob Herring				nvidia,function = "kbc";
931724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
932724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
933724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
934724ba675SRob Herring			};
935724ba675SRob Herring			kb_col1_pq1 {
936724ba675SRob Herring				nvidia,pins = "kb_col1_pq1";
937724ba675SRob Herring				nvidia,function = "kbc";
938724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
939724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
940724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
941724ba675SRob Herring			};
942724ba675SRob Herring			kb_col2_pq2 {
943724ba675SRob Herring				nvidia,pins = "kb_col2_pq2";
944724ba675SRob Herring				nvidia,function = "kbc";
945724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
946724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
947724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
948724ba675SRob Herring			};
949724ba675SRob Herring			kb_col3_pq3 {
950724ba675SRob Herring				nvidia,pins = "kb_col3_pq3";
951724ba675SRob Herring				nvidia,function = "kbc";
952724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
953724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
954724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
955724ba675SRob Herring			};
956724ba675SRob Herring			kb_col4_pq4 {
957724ba675SRob Herring				nvidia,pins = "kb_col4_pq4";
958724ba675SRob Herring				nvidia,function = "kbc";
959724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
960724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
961724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
962724ba675SRob Herring			};
963724ba675SRob Herring			kb_col5_pq5 {
964724ba675SRob Herring				nvidia,pins = "kb_col5_pq5";
965724ba675SRob Herring				nvidia,function = "kbc";
966724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
967724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
968724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
969724ba675SRob Herring			};
970724ba675SRob Herring			kb_col6_pq6 {
971724ba675SRob Herring				nvidia,pins = "kb_col6_pq6";
972724ba675SRob Herring				nvidia,function = "kbc";
973724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
974724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
975724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
976724ba675SRob Herring			};
977724ba675SRob Herring			kb_col7_pq7 {
978724ba675SRob Herring				nvidia,pins = "kb_col7_pq7";
979724ba675SRob Herring				nvidia,function = "kbc";
980724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
981724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
982724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
983724ba675SRob Herring			};
984724ba675SRob Herring			kb_row0_pr0 {
985724ba675SRob Herring				nvidia,pins = "kb_row0_pr0";
986724ba675SRob Herring				nvidia,function = "kbc";
987724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
988724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
989724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
990724ba675SRob Herring			};
991724ba675SRob Herring			kb_row1_pr1 {
992724ba675SRob Herring				nvidia,pins = "kb_row1_pr1";
993724ba675SRob Herring				nvidia,function = "kbc";
994724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
995724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
996724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
997724ba675SRob Herring			};
998724ba675SRob Herring			kb_row2_pr2 {
999724ba675SRob Herring				nvidia,pins = "kb_row2_pr2";
1000724ba675SRob Herring				nvidia,function = "kbc";
1001724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1002724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1003724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1004724ba675SRob Herring			};
1005724ba675SRob Herring			kb_row3_pr3 {
1006724ba675SRob Herring				nvidia,pins = "kb_row3_pr3";
1007724ba675SRob Herring				nvidia,function = "kbc";
1008724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1009724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1010724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1011724ba675SRob Herring			};
1012724ba675SRob Herring			kb_row4_pr4 {
1013724ba675SRob Herring				nvidia,pins = "kb_row4_pr4";
1014724ba675SRob Herring				nvidia,function = "kbc";
1015724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1016724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1017724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1018724ba675SRob Herring			};
1019724ba675SRob Herring			kb_row5_pr5 {
1020724ba675SRob Herring				nvidia,pins = "kb_row5_pr5";
1021724ba675SRob Herring				nvidia,function = "kbc";
1022724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1023724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1024724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1025724ba675SRob Herring			};
1026724ba675SRob Herring			kb_row6_pr6 {
1027724ba675SRob Herring				nvidia,pins = "kb_row6_pr6";
1028724ba675SRob Herring				nvidia,function = "kbc";
1029724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1030724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1031724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1032724ba675SRob Herring			};
1033724ba675SRob Herring			kb_row7_pr7 {
1034724ba675SRob Herring				nvidia,pins = "kb_row7_pr7";
1035724ba675SRob Herring				nvidia,function = "kbc";
1036724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1037724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1038724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1039724ba675SRob Herring			};
1040724ba675SRob Herring			kb_row8_ps0 {
1041724ba675SRob Herring				nvidia,pins = "kb_row8_ps0";
1042724ba675SRob Herring				nvidia,function = "kbc";
1043724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1044724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1045724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1046724ba675SRob Herring			};
1047724ba675SRob Herring			kb_row9_ps1 {
1048724ba675SRob Herring				nvidia,pins = "kb_row9_ps1";
1049724ba675SRob Herring				nvidia,function = "kbc";
1050724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1051724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1052724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1053724ba675SRob Herring			};
1054724ba675SRob Herring			kb_row10_ps2 {
1055724ba675SRob Herring				nvidia,pins = "kb_row10_ps2";
1056724ba675SRob Herring				nvidia,function = "kbc";
1057724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1058724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1059724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1060724ba675SRob Herring			};
1061724ba675SRob Herring			kb_row11_ps3 {
1062724ba675SRob Herring				nvidia,pins = "kb_row11_ps3";
1063724ba675SRob Herring				nvidia,function = "kbc";
1064724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1065724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1066724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1067724ba675SRob Herring			};
1068724ba675SRob Herring			kb_row12_ps4 {
1069724ba675SRob Herring				nvidia,pins = "kb_row12_ps4";
1070724ba675SRob Herring				nvidia,function = "kbc";
1071724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1072724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1073724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1074724ba675SRob Herring			};
1075724ba675SRob Herring			kb_row13_ps5 {
1076724ba675SRob Herring				nvidia,pins = "kb_row13_ps5";
1077724ba675SRob Herring				nvidia,function = "kbc";
1078724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1079724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1080724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1081724ba675SRob Herring			};
1082724ba675SRob Herring			kb_row14_ps6 {
1083724ba675SRob Herring				nvidia,pins = "kb_row14_ps6";
1084724ba675SRob Herring				nvidia,function = "kbc";
1085724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1086724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1087724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1088724ba675SRob Herring			};
1089724ba675SRob Herring			kb_row15_ps7 {
1090724ba675SRob Herring				nvidia,pins = "kb_row15_ps7";
1091724ba675SRob Herring				nvidia,function = "kbc";
1092724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1093724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1094724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1095724ba675SRob Herring			};
1096724ba675SRob Herring			vi_pclk_pt0 {
1097724ba675SRob Herring				nvidia,pins = "vi_pclk_pt0";
1098724ba675SRob Herring				nvidia,function = "rsvd1";
1099724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1100724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1101724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1102724ba675SRob Herring			};
1103724ba675SRob Herring			vi_mclk_pt1 {
1104724ba675SRob Herring				nvidia,pins = "vi_mclk_pt1";
1105724ba675SRob Herring				nvidia,function = "vi";
1106724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1107724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1108724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1109724ba675SRob Herring			};
1110724ba675SRob Herring			vi_d10_pt2 {
1111724ba675SRob Herring				nvidia,pins = "vi_d10_pt2";
1112724ba675SRob Herring				nvidia,function = "ddr";
1113724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1114724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1115724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1116724ba675SRob Herring			};
1117724ba675SRob Herring			vi_d11_pt3 {
1118724ba675SRob Herring				nvidia,pins = "vi_d11_pt3";
1119724ba675SRob Herring				nvidia,function = "ddr";
1120724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1121724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1122724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1123724ba675SRob Herring			};
1124724ba675SRob Herring			vi_d0_pt4 {
1125724ba675SRob Herring				nvidia,pins = "vi_d0_pt4";
1126724ba675SRob Herring				nvidia,function = "ddr";
1127724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1128724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1129724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1130724ba675SRob Herring			};
1131724ba675SRob Herring			gen2_i2c_scl_pt5 {
1132724ba675SRob Herring				nvidia,pins = "gen2_i2c_scl_pt5";
1133724ba675SRob Herring				nvidia,function = "i2c2";
1134724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1135724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1136724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1137724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1138724ba675SRob Herring			};
1139724ba675SRob Herring			gen2_i2c_sda_pt6 {
1140724ba675SRob Herring				nvidia,pins = "gen2_i2c_sda_pt6";
1141724ba675SRob Herring				nvidia,function = "i2c2";
1142724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1143724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1144724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1145724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1146724ba675SRob Herring			};
1147724ba675SRob Herring			sdmmc4_cmd_pt7 {
1148724ba675SRob Herring				nvidia,pins = "sdmmc4_cmd_pt7";
1149724ba675SRob Herring				nvidia,function = "sdmmc4";
1150724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1151724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1152724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1153724ba675SRob Herring			};
1154724ba675SRob Herring			pu0 {
1155724ba675SRob Herring				nvidia,pins = "pu0";
1156724ba675SRob Herring				nvidia,function = "owr";
1157724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1158724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1159724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1160724ba675SRob Herring			};
1161724ba675SRob Herring			pu1 {
1162724ba675SRob Herring				nvidia,pins = "pu1";
1163724ba675SRob Herring				nvidia,function = "rsvd1";
1164724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1165724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1166724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1167724ba675SRob Herring			};
1168724ba675SRob Herring			pu2 {
1169724ba675SRob Herring				nvidia,pins = "pu2";
1170724ba675SRob Herring				nvidia,function = "rsvd1";
1171724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1172724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1173724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1174724ba675SRob Herring			};
1175724ba675SRob Herring			pu3 {
1176724ba675SRob Herring				nvidia,pins = "pu3";
1177724ba675SRob Herring				nvidia,function = "pwm0";
1178724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1179724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1180724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1181724ba675SRob Herring			};
1182724ba675SRob Herring			pu4 {
1183724ba675SRob Herring				nvidia,pins = "pu4";
1184724ba675SRob Herring				nvidia,function = "pwm1";
1185724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1186724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1187724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1188724ba675SRob Herring			};
1189724ba675SRob Herring			pu5 {
1190724ba675SRob Herring				nvidia,pins = "pu5";
1191724ba675SRob Herring				nvidia,function = "pwm2";
1192724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1193724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1194724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1195724ba675SRob Herring			};
1196724ba675SRob Herring			pu6 {
1197724ba675SRob Herring				nvidia,pins = "pu6";
1198724ba675SRob Herring				nvidia,function = "pwm3";
1199724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1200724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1201724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1202724ba675SRob Herring			};
1203724ba675SRob Herring			jtag_rtck_pu7 {
1204724ba675SRob Herring				nvidia,pins = "jtag_rtck_pu7";
1205724ba675SRob Herring				nvidia,function = "rtck";
1206724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1207724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1208724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1209724ba675SRob Herring			};
1210724ba675SRob Herring			pv0 {
1211724ba675SRob Herring				nvidia,pins = "pv0";
1212724ba675SRob Herring				nvidia,function = "rsvd1";
1213724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1214724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1215724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1216724ba675SRob Herring			};
1217724ba675SRob Herring			pv2 {
1218724ba675SRob Herring				nvidia,pins = "pv2";
1219724ba675SRob Herring				nvidia,function = "owr";
1220724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1221724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1222724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1223724ba675SRob Herring			};
1224724ba675SRob Herring			pv3 {
1225724ba675SRob Herring				nvidia,pins = "pv3";
1226724ba675SRob Herring				nvidia,function = "clk_12m_out";
1227724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1228724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1229724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1230724ba675SRob Herring			};
1231724ba675SRob Herring			ddc_scl_pv4 {
1232724ba675SRob Herring				nvidia,pins = "ddc_scl_pv4";
1233724ba675SRob Herring				nvidia,function = "i2c4";
1234724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1235724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1236724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1237724ba675SRob Herring			};
1238724ba675SRob Herring			ddc_sda_pv5 {
1239724ba675SRob Herring				nvidia,pins = "ddc_sda_pv5";
1240724ba675SRob Herring				nvidia,function = "i2c4";
1241724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1242724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1243724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1244724ba675SRob Herring			};
1245724ba675SRob Herring			crt_hsync_pv6 {
1246724ba675SRob Herring				nvidia,pins = "crt_hsync_pv6";
1247724ba675SRob Herring				nvidia,function = "crt";
1248724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1249724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1250724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1251724ba675SRob Herring			};
1252724ba675SRob Herring			crt_vsync_pv7 {
1253724ba675SRob Herring				nvidia,pins = "crt_vsync_pv7";
1254724ba675SRob Herring				nvidia,function = "crt";
1255724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1256724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1257724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1258724ba675SRob Herring			};
1259724ba675SRob Herring			lcd_cs1_n_pw0 {
1260724ba675SRob Herring				nvidia,pins = "lcd_cs1_n_pw0";
1261724ba675SRob Herring				nvidia,function = "displaya";
1262724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1263724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1264724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1265724ba675SRob Herring			};
1266724ba675SRob Herring			lcd_m1_pw1 {
1267724ba675SRob Herring				nvidia,pins = "lcd_m1_pw1";
1268724ba675SRob Herring				nvidia,function = "displaya";
1269724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1270724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1271724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1272724ba675SRob Herring			};
1273724ba675SRob Herring			spi2_cs1_n_pw2 {
1274724ba675SRob Herring				nvidia,pins = "spi2_cs1_n_pw2";
1275724ba675SRob Herring				nvidia,function = "spi2";
1276724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1277724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1278724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1279724ba675SRob Herring			};
1280724ba675SRob Herring			clk1_out_pw4 {
1281724ba675SRob Herring				nvidia,pins = "clk1_out_pw4";
1282724ba675SRob Herring				nvidia,function = "extperiph1";
1283724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1284724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1285724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1286724ba675SRob Herring			};
1287724ba675SRob Herring			clk2_out_pw5 {
1288724ba675SRob Herring				nvidia,pins = "clk2_out_pw5";
1289724ba675SRob Herring				nvidia,function = "extperiph2";
1290724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1291724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1292724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1293724ba675SRob Herring			};
1294724ba675SRob Herring			uart3_txd_pw6 {
1295724ba675SRob Herring				nvidia,pins = "uart3_txd_pw6";
1296724ba675SRob Herring				nvidia,function = "uartc";
1297724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1298724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1299724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1300724ba675SRob Herring			};
1301724ba675SRob Herring			uart3_rxd_pw7 {
1302724ba675SRob Herring				nvidia,pins = "uart3_rxd_pw7";
1303724ba675SRob Herring				nvidia,function = "uartc";
1304724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1305724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1306724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1307724ba675SRob Herring			};
1308724ba675SRob Herring			spi2_sck_px2 {
1309724ba675SRob Herring				nvidia,pins = "spi2_sck_px2";
1310724ba675SRob Herring				nvidia,function = "gmi";
1311724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1312724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1313724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1314724ba675SRob Herring			};
1315724ba675SRob Herring			spi1_mosi_px4 {
1316724ba675SRob Herring				nvidia,pins = "spi1_mosi_px4";
1317724ba675SRob Herring				nvidia,function = "spi1";
1318724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1319724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1320724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1321724ba675SRob Herring			};
1322724ba675SRob Herring			spi1_sck_px5 {
1323724ba675SRob Herring				nvidia,pins = "spi1_sck_px5";
1324724ba675SRob Herring				nvidia,function = "spi1";
1325724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1326724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1327724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1328724ba675SRob Herring			};
1329724ba675SRob Herring			spi1_cs0_n_px6 {
1330724ba675SRob Herring				nvidia,pins = "spi1_cs0_n_px6";
1331724ba675SRob Herring				nvidia,function = "spi1";
1332724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1333724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1334724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1335724ba675SRob Herring			};
1336724ba675SRob Herring			spi1_miso_px7 {
1337724ba675SRob Herring				nvidia,pins = "spi1_miso_px7";
1338724ba675SRob Herring				nvidia,function = "spi1";
1339724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1340724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1341724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1342724ba675SRob Herring			};
1343724ba675SRob Herring			ulpi_clk_py0 {
1344724ba675SRob Herring				nvidia,pins = "ulpi_clk_py0";
1345724ba675SRob Herring				nvidia,function = "uartd";
1346724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1347724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1348724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1349724ba675SRob Herring			};
1350724ba675SRob Herring			ulpi_dir_py1 {
1351724ba675SRob Herring				nvidia,pins = "ulpi_dir_py1";
1352724ba675SRob Herring				nvidia,function = "uartd";
1353724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1354724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1355724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1356724ba675SRob Herring			};
1357724ba675SRob Herring			ulpi_nxt_py2 {
1358724ba675SRob Herring				nvidia,pins = "ulpi_nxt_py2";
1359724ba675SRob Herring				nvidia,function = "uartd";
1360724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1361724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1362724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1363724ba675SRob Herring			};
1364724ba675SRob Herring			ulpi_stp_py3 {
1365724ba675SRob Herring				nvidia,pins = "ulpi_stp_py3";
1366724ba675SRob Herring				nvidia,function = "uartd";
1367724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1368724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1369724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1370724ba675SRob Herring			};
1371724ba675SRob Herring			sdmmc1_dat3_py4 {
1372724ba675SRob Herring				nvidia,pins = "sdmmc1_dat3_py4";
1373724ba675SRob Herring				nvidia,function = "sdmmc1";
1374724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1375724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1376724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1377724ba675SRob Herring			};
1378724ba675SRob Herring			sdmmc1_dat2_py5 {
1379724ba675SRob Herring				nvidia,pins = "sdmmc1_dat2_py5";
1380724ba675SRob Herring				nvidia,function = "sdmmc1";
1381724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1382724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1383724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1384724ba675SRob Herring			};
1385724ba675SRob Herring			sdmmc1_dat1_py6 {
1386724ba675SRob Herring				nvidia,pins = "sdmmc1_dat1_py6";
1387724ba675SRob Herring				nvidia,function = "sdmmc1";
1388724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1389724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1390724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1391724ba675SRob Herring			};
1392724ba675SRob Herring			sdmmc1_dat0_py7 {
1393724ba675SRob Herring				nvidia,pins = "sdmmc1_dat0_py7";
1394724ba675SRob Herring				nvidia,function = "sdmmc1";
1395724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1396724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1397724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1398724ba675SRob Herring			};
1399724ba675SRob Herring			sdmmc1_clk_pz0 {
1400724ba675SRob Herring				nvidia,pins = "sdmmc1_clk_pz0";
1401724ba675SRob Herring				nvidia,function = "sdmmc1";
1402724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1403724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1404724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1405724ba675SRob Herring			};
1406724ba675SRob Herring			sdmmc1_cmd_pz1 {
1407724ba675SRob Herring				nvidia,pins = "sdmmc1_cmd_pz1";
1408724ba675SRob Herring				nvidia,function = "sdmmc1";
1409724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1410724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1411724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1412724ba675SRob Herring			};
1413724ba675SRob Herring			lcd_sdin_pz2 {
1414724ba675SRob Herring				nvidia,pins = "lcd_sdin_pz2";
1415724ba675SRob Herring				nvidia,function = "displaya";
1416724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1417724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1418724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1419724ba675SRob Herring			};
1420724ba675SRob Herring			lcd_wr_n_pz3 {
1421724ba675SRob Herring				nvidia,pins = "lcd_wr_n_pz3";
1422724ba675SRob Herring				nvidia,function = "displaya";
1423724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1424724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1425724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1426724ba675SRob Herring			};
1427724ba675SRob Herring			lcd_sck_pz4 {
1428724ba675SRob Herring				nvidia,pins = "lcd_sck_pz4";
1429724ba675SRob Herring				nvidia,function = "displaya";
1430724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1431724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1432724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1433724ba675SRob Herring			};
1434724ba675SRob Herring			sys_clk_req_pz5 {
1435724ba675SRob Herring				nvidia,pins = "sys_clk_req_pz5";
1436724ba675SRob Herring				nvidia,function = "sysclk";
1437724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1438724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1439724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1440724ba675SRob Herring			};
1441724ba675SRob Herring			pwr_i2c_scl_pz6 {
1442724ba675SRob Herring				nvidia,pins = "pwr_i2c_scl_pz6";
1443724ba675SRob Herring				nvidia,function = "i2cpwr";
1444724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1445724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1446724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1447724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1448724ba675SRob Herring			};
1449724ba675SRob Herring			pwr_i2c_sda_pz7 {
1450724ba675SRob Herring				nvidia,pins = "pwr_i2c_sda_pz7";
1451724ba675SRob Herring				nvidia,function = "i2cpwr";
1452724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1453724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1454724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1455724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1456724ba675SRob Herring			};
1457724ba675SRob Herring			sdmmc4_dat0_paa0 {
1458724ba675SRob Herring				nvidia,pins = "sdmmc4_dat0_paa0";
1459724ba675SRob Herring				nvidia,function = "sdmmc4";
1460724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1461724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1462724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1463724ba675SRob Herring			};
1464724ba675SRob Herring			sdmmc4_dat1_paa1 {
1465724ba675SRob Herring				nvidia,pins = "sdmmc4_dat1_paa1";
1466724ba675SRob Herring				nvidia,function = "sdmmc4";
1467724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1468724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1469724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1470724ba675SRob Herring			};
1471724ba675SRob Herring			sdmmc4_dat2_paa2 {
1472724ba675SRob Herring				nvidia,pins = "sdmmc4_dat2_paa2";
1473724ba675SRob Herring				nvidia,function = "sdmmc4";
1474724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1475724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1476724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1477724ba675SRob Herring			};
1478724ba675SRob Herring			sdmmc4_dat3_paa3 {
1479724ba675SRob Herring				nvidia,pins = "sdmmc4_dat3_paa3";
1480724ba675SRob Herring				nvidia,function = "sdmmc4";
1481724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1482724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1483724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1484724ba675SRob Herring			};
1485724ba675SRob Herring			sdmmc4_dat4_paa4 {
1486724ba675SRob Herring				nvidia,pins = "sdmmc4_dat4_paa4";
1487724ba675SRob Herring				nvidia,function = "sdmmc4";
1488724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1489724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1490724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1491724ba675SRob Herring			};
1492724ba675SRob Herring			sdmmc4_dat5_paa5 {
1493724ba675SRob Herring				nvidia,pins = "sdmmc4_dat5_paa5";
1494724ba675SRob Herring				nvidia,function = "sdmmc4";
1495724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1496724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1497724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1498724ba675SRob Herring			};
1499724ba675SRob Herring			sdmmc4_dat6_paa6 {
1500724ba675SRob Herring				nvidia,pins = "sdmmc4_dat6_paa6";
1501724ba675SRob Herring				nvidia,function = "sdmmc4";
1502724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1503724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1504724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1505724ba675SRob Herring			};
1506724ba675SRob Herring			sdmmc4_dat7_paa7 {
1507724ba675SRob Herring				nvidia,pins = "sdmmc4_dat7_paa7";
1508724ba675SRob Herring				nvidia,function = "sdmmc4";
1509724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1510724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1511724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1512724ba675SRob Herring			};
1513724ba675SRob Herring			pbb0 {
1514724ba675SRob Herring				nvidia,pins = "pbb0";
1515724ba675SRob Herring				nvidia,function = "i2s4";
1516724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1517724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1518724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1519724ba675SRob Herring			};
1520724ba675SRob Herring			cam_i2c_scl_pbb1 {
1521724ba675SRob Herring				nvidia,pins = "cam_i2c_scl_pbb1";
1522724ba675SRob Herring				nvidia,function = "i2c3";
1523724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1524724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1525724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1526724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1527724ba675SRob Herring			};
1528724ba675SRob Herring			cam_i2c_sda_pbb2 {
1529724ba675SRob Herring				nvidia,pins = "cam_i2c_sda_pbb2";
1530724ba675SRob Herring				nvidia,function = "i2c3";
1531724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1532724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1533724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1534724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
1535724ba675SRob Herring			};
1536724ba675SRob Herring			pbb3 {
1537724ba675SRob Herring				nvidia,pins = "pbb3";
1538724ba675SRob Herring				nvidia,function = "vgp3";
1539724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1540724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1541724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1542724ba675SRob Herring			};
1543724ba675SRob Herring			pbb4 {
1544724ba675SRob Herring				nvidia,pins = "pbb4";
1545724ba675SRob Herring				nvidia,function = "vgp4";
1546724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1547724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1548724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1549724ba675SRob Herring			};
1550724ba675SRob Herring			pbb5 {
1551724ba675SRob Herring				nvidia,pins = "pbb5";
1552724ba675SRob Herring				nvidia,function = "vgp5";
1553724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1554724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1555724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1556724ba675SRob Herring			};
1557724ba675SRob Herring			pbb6 {
1558724ba675SRob Herring				nvidia,pins = "pbb6";
1559724ba675SRob Herring				nvidia,function = "vgp6";
1560724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1561724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1562724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1563724ba675SRob Herring			};
1564724ba675SRob Herring			pbb7 {
1565724ba675SRob Herring				nvidia,pins = "pbb7";
1566724ba675SRob Herring				nvidia,function = "i2s4";
1567724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1568724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1569724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1570724ba675SRob Herring			};
1571724ba675SRob Herring			cam_mclk_pcc0 {
1572724ba675SRob Herring				nvidia,pins = "cam_mclk_pcc0";
1573724ba675SRob Herring				nvidia,function = "vi_alt3";
1574724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1575724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1576724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1577724ba675SRob Herring			};
1578724ba675SRob Herring			pcc1 {
1579724ba675SRob Herring				nvidia,pins = "pcc1";
1580724ba675SRob Herring				nvidia,function = "i2s4";
1581724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1582724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1583724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1584724ba675SRob Herring			};
1585724ba675SRob Herring			pcc2 {
1586724ba675SRob Herring				nvidia,pins = "pcc2";
1587724ba675SRob Herring				nvidia,function = "i2s4";
1588724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1589724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1590724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1591724ba675SRob Herring			};
1592724ba675SRob Herring			sdmmc4_rst_n_pcc3 {
1593724ba675SRob Herring				nvidia,pins = "sdmmc4_rst_n_pcc3";
1594724ba675SRob Herring				nvidia,function = "sdmmc4";
1595724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1596724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1597724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1598724ba675SRob Herring			};
1599724ba675SRob Herring			sdmmc4_clk_pcc4 {
1600724ba675SRob Herring				nvidia,pins = "sdmmc4_clk_pcc4";
1601724ba675SRob Herring				nvidia,function = "sdmmc4";
1602724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1603724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1604724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1605724ba675SRob Herring			};
1606724ba675SRob Herring			clk2_req_pcc5 {
1607724ba675SRob Herring				nvidia,pins = "clk2_req_pcc5";
1608724ba675SRob Herring				nvidia,function = "dap";
1609724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1610724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1611724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1612724ba675SRob Herring			};
1613724ba675SRob Herring			pex_l2_rst_n_pcc6 {
1614724ba675SRob Herring				nvidia,pins = "pex_l2_rst_n_pcc6";
1615724ba675SRob Herring				nvidia,function = "pcie";
1616724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1617724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1618724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1619724ba675SRob Herring			};
1620724ba675SRob Herring			pex_l2_clkreq_n_pcc7 {
1621724ba675SRob Herring				nvidia,pins = "pex_l2_clkreq_n_pcc7";
1622724ba675SRob Herring				nvidia,function = "pcie";
1623724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1624724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1625724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1626724ba675SRob Herring			};
1627724ba675SRob Herring			pex_l0_prsnt_n_pdd0 {
1628724ba675SRob Herring				nvidia,pins = "pex_l0_prsnt_n_pdd0";
1629724ba675SRob Herring				nvidia,function = "pcie";
1630724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1631724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1632724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1633724ba675SRob Herring			};
1634724ba675SRob Herring			pex_l0_rst_n_pdd1 {
1635724ba675SRob Herring				nvidia,pins = "pex_l0_rst_n_pdd1";
1636724ba675SRob Herring				nvidia,function = "pcie";
1637724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1638724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1639724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1640724ba675SRob Herring			};
1641724ba675SRob Herring			pex_l0_clkreq_n_pdd2 {
1642724ba675SRob Herring				nvidia,pins = "pex_l0_clkreq_n_pdd2";
1643724ba675SRob Herring				nvidia,function = "pcie";
1644724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1645724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1646724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1647724ba675SRob Herring			};
1648724ba675SRob Herring			pex_wake_n_pdd3 {
1649724ba675SRob Herring				nvidia,pins = "pex_wake_n_pdd3";
1650724ba675SRob Herring				nvidia,function = "pcie";
1651724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1652724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1653724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1654724ba675SRob Herring			};
1655724ba675SRob Herring			pex_l1_prsnt_n_pdd4 {
1656724ba675SRob Herring				nvidia,pins = "pex_l1_prsnt_n_pdd4";
1657724ba675SRob Herring				nvidia,function = "pcie";
1658724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1659724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1660724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1661724ba675SRob Herring			};
1662724ba675SRob Herring			pex_l1_rst_n_pdd5 {
1663724ba675SRob Herring				nvidia,pins = "pex_l1_rst_n_pdd5";
1664724ba675SRob Herring				nvidia,function = "pcie";
1665724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1666724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1667724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1668724ba675SRob Herring			};
1669724ba675SRob Herring			pex_l1_clkreq_n_pdd6 {
1670724ba675SRob Herring				nvidia,pins = "pex_l1_clkreq_n_pdd6";
1671724ba675SRob Herring				nvidia,function = "pcie";
1672724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1673724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1674724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1675724ba675SRob Herring			};
1676724ba675SRob Herring			pex_l2_prsnt_n_pdd7 {
1677724ba675SRob Herring				nvidia,pins = "pex_l2_prsnt_n_pdd7";
1678724ba675SRob Herring				nvidia,function = "pcie";
1679724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1680724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1681724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1682724ba675SRob Herring			};
1683724ba675SRob Herring			clk3_out_pee0 {
1684724ba675SRob Herring				nvidia,pins = "clk3_out_pee0";
1685724ba675SRob Herring				nvidia,function = "extperiph3";
1686724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1687724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1688724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1689724ba675SRob Herring			};
1690724ba675SRob Herring			clk3_req_pee1 {
1691724ba675SRob Herring				nvidia,pins = "clk3_req_pee1";
1692724ba675SRob Herring				nvidia,function = "dev3";
1693724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1694724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1695724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1696724ba675SRob Herring			};
1697724ba675SRob Herring			clk1_req_pee2 {
1698724ba675SRob Herring				nvidia,pins = "clk1_req_pee2";
1699724ba675SRob Herring				nvidia,function = "dap";
1700724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1701724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1702724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1703724ba675SRob Herring			};
1704724ba675SRob Herring			hdmi_cec_pee3 {
1705724ba675SRob Herring				nvidia,pins = "hdmi_cec_pee3";
1706724ba675SRob Herring				nvidia,function = "cec";
1707724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1708724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1709724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1710724ba675SRob Herring				nvidia,open-drain = <TEGRA_PIN_DISABLE>;
1711724ba675SRob Herring			};
1712724ba675SRob Herring			owr {
1713724ba675SRob Herring				nvidia,pins = "owr";
1714724ba675SRob Herring				nvidia,function = "owr";
1715724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1716724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1717724ba675SRob Herring				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1718724ba675SRob Herring			};
1719724ba675SRob Herring			sdio3 {
1720724ba675SRob Herring				nvidia,pins = "drive_sdio3";
1721724ba675SRob Herring				nvidia,high-speed-mode = <TEGRA_PIN_DISABLE>;
1722724ba675SRob Herring				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
1723724ba675SRob Herring				nvidia,pull-down-strength = <46>;
1724724ba675SRob Herring				nvidia,pull-up-strength = <42>;
1725724ba675SRob Herring				nvidia,slew-rate-rising = <1>;
1726724ba675SRob Herring				nvidia,slew-rate-falling = <1>;
1727724ba675SRob Herring			};
1728724ba675SRob Herring			gpv {
1729724ba675SRob Herring				nvidia,pins = "drive_gpv";
1730724ba675SRob Herring				nvidia,pull-up-strength = <16>;
1731724ba675SRob Herring			};
1732724ba675SRob Herring		};
1733724ba675SRob Herring	};
1734724ba675SRob Herring
1735724ba675SRob Herring	serial@70006000 {
1736*9766116aSThierry Reding		/delete-property/ dmas;
1737*9766116aSThierry Reding		/delete-property/ dma-names;
1738724ba675SRob Herring		status = "okay";
1739724ba675SRob Herring	};
1740724ba675SRob Herring
1741724ba675SRob Herring	i2c@7000c000 {
1742724ba675SRob Herring		status = "okay";
1743724ba675SRob Herring		clock-frequency = <100000>;
1744724ba675SRob Herring	};
1745724ba675SRob Herring
1746724ba675SRob Herring	i2c@7000c400 {
1747724ba675SRob Herring		status = "okay";
1748724ba675SRob Herring		clock-frequency = <100000>;
1749724ba675SRob Herring	};
1750724ba675SRob Herring
1751724ba675SRob Herring	i2c@7000c500 {
1752724ba675SRob Herring		status = "okay";
1753724ba675SRob Herring		clock-frequency = <100000>;
1754724ba675SRob Herring	};
1755724ba675SRob Herring
1756724ba675SRob Herring	hdmiddc: i2c@7000c700 {
1757724ba675SRob Herring		status = "okay";
1758724ba675SRob Herring		clock-frequency = <100000>;
1759724ba675SRob Herring	};
1760724ba675SRob Herring
1761724ba675SRob Herring	i2c@7000d000 {
1762724ba675SRob Herring		status = "okay";
1763724ba675SRob Herring		clock-frequency = <100000>;
1764724ba675SRob Herring
1765724ba675SRob Herring		rt5640: rt5640@1c {
1766724ba675SRob Herring			compatible = "realtek,rt5640";
1767724ba675SRob Herring			reg = <0x1c>;
1768724ba675SRob Herring			interrupt-parent = <&gpio>;
1769724ba675SRob Herring			interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_EDGE_FALLING>;
1770724ba675SRob Herring			realtek,ldo1-en-gpios =
1771724ba675SRob Herring				<&gpio TEGRA_GPIO(X, 2) GPIO_ACTIVE_HIGH>;
1772724ba675SRob Herring		};
1773724ba675SRob Herring
1774724ba675SRob Herring		pmic: tps65911@2d {
1775724ba675SRob Herring			compatible = "ti,tps65911";
1776724ba675SRob Herring			reg = <0x2d>;
1777724ba675SRob Herring
1778724ba675SRob Herring			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
1779724ba675SRob Herring			#interrupt-cells = <2>;
1780724ba675SRob Herring			interrupt-controller;
1781724ba675SRob Herring			wakeup-source;
1782724ba675SRob Herring
1783724ba675SRob Herring			ti,system-power-controller;
1784724ba675SRob Herring
1785724ba675SRob Herring			#gpio-cells = <2>;
1786724ba675SRob Herring			gpio-controller;
1787724ba675SRob Herring
1788724ba675SRob Herring			vcc1-supply = <&vdd_5v_in_reg>;
1789724ba675SRob Herring			vcc2-supply = <&vdd_5v_in_reg>;
1790724ba675SRob Herring			vcc3-supply = <&vio_reg>;
1791724ba675SRob Herring			vcc4-supply = <&vdd_5v_in_reg>;
1792724ba675SRob Herring			vcc5-supply = <&vdd_5v_in_reg>;
1793724ba675SRob Herring			vcc6-supply = <&vdd2_reg>;
1794724ba675SRob Herring			vcc7-supply = <&vdd_5v_in_reg>;
1795724ba675SRob Herring			vccio-supply = <&vdd_5v_in_reg>;
1796724ba675SRob Herring
1797724ba675SRob Herring			regulators {
1798724ba675SRob Herring				vdd1_reg: vdd1 {
1799724ba675SRob Herring					regulator-name = "vddio_ddr_1v2";
1800724ba675SRob Herring					regulator-min-microvolt = <1200000>;
1801724ba675SRob Herring					regulator-max-microvolt = <1200000>;
1802724ba675SRob Herring					regulator-always-on;
1803724ba675SRob Herring				};
1804724ba675SRob Herring
1805724ba675SRob Herring				vdd2_reg: vdd2 {
1806724ba675SRob Herring					regulator-name = "vdd_1v5_gen";
1807724ba675SRob Herring					regulator-min-microvolt = <1500000>;
1808724ba675SRob Herring					regulator-max-microvolt = <1500000>;
1809724ba675SRob Herring					regulator-always-on;
1810724ba675SRob Herring				};
1811724ba675SRob Herring
1812724ba675SRob Herring				vddctrl_reg: vddctrl {
1813724ba675SRob Herring					regulator-name = "vdd_cpu,vdd_sys";
1814724ba675SRob Herring					regulator-min-microvolt = <800000>;
1815724ba675SRob Herring					regulator-max-microvolt = <1250000>;
1816724ba675SRob Herring					regulator-coupled-with = <&core_vdd_reg>;
1817724ba675SRob Herring					regulator-coupled-max-spread = <300000>;
1818724ba675SRob Herring					regulator-max-step-microvolt = <100000>;
1819724ba675SRob Herring					regulator-always-on;
1820724ba675SRob Herring
1821724ba675SRob Herring					nvidia,tegra-cpu-regulator;
1822724ba675SRob Herring				};
1823724ba675SRob Herring
1824724ba675SRob Herring				vio_reg: vio {
1825724ba675SRob Herring					regulator-name = "vdd_1v8_gen";
1826724ba675SRob Herring					regulator-min-microvolt = <1800000>;
1827724ba675SRob Herring					regulator-max-microvolt = <1800000>;
1828724ba675SRob Herring					regulator-always-on;
1829724ba675SRob Herring				};
1830724ba675SRob Herring
1831724ba675SRob Herring				ldo1_reg: ldo1 {
1832724ba675SRob Herring					regulator-name = "vdd_pexa,vdd_pexb";
1833724ba675SRob Herring					regulator-min-microvolt = <1050000>;
1834724ba675SRob Herring					regulator-max-microvolt = <1050000>;
1835724ba675SRob Herring				};
1836724ba675SRob Herring
1837724ba675SRob Herring				ldo2_reg: ldo2 {
1838724ba675SRob Herring					regulator-name = "vdd_sata,avdd_plle";
1839724ba675SRob Herring					regulator-min-microvolt = <1050000>;
1840724ba675SRob Herring					regulator-max-microvolt = <1050000>;
1841724ba675SRob Herring				};
1842724ba675SRob Herring
1843724ba675SRob Herring				/* LDO3 is not connected to anything */
1844724ba675SRob Herring
1845724ba675SRob Herring				ldo4_reg: ldo4 {
1846724ba675SRob Herring					regulator-name = "vdd_rtc";
1847724ba675SRob Herring					regulator-min-microvolt = <1200000>;
1848724ba675SRob Herring					regulator-max-microvolt = <1200000>;
1849724ba675SRob Herring					regulator-always-on;
1850724ba675SRob Herring				};
1851724ba675SRob Herring
1852724ba675SRob Herring				ldo5_reg: ldo5 {
1853724ba675SRob Herring					regulator-name = "vddio_sdmmc,avdd_vdac";
1854724ba675SRob Herring					regulator-min-microvolt = <1800000>;
1855724ba675SRob Herring					regulator-max-microvolt = <3300000>;
1856724ba675SRob Herring					regulator-always-on;
1857724ba675SRob Herring				};
1858724ba675SRob Herring
1859724ba675SRob Herring				ldo6_reg: ldo6 {
1860724ba675SRob Herring					regulator-name = "avdd_dsi_csi,pwrdet_mipi";
1861724ba675SRob Herring					regulator-min-microvolt = <1200000>;
1862724ba675SRob Herring					regulator-max-microvolt = <1200000>;
1863724ba675SRob Herring				};
1864724ba675SRob Herring
1865724ba675SRob Herring				ldo7_reg: ldo7 {
1866724ba675SRob Herring					regulator-name = "vdd_pllm,x,u,a_p_c_s";
1867724ba675SRob Herring					regulator-min-microvolt = <1200000>;
1868724ba675SRob Herring					regulator-max-microvolt = <1200000>;
1869724ba675SRob Herring					regulator-always-on;
1870724ba675SRob Herring				};
1871724ba675SRob Herring
1872724ba675SRob Herring				ldo8_reg: ldo8 {
1873724ba675SRob Herring					regulator-name = "vdd_ddr_hs";
1874724ba675SRob Herring					regulator-min-microvolt = <1000000>;
1875724ba675SRob Herring					regulator-max-microvolt = <1000000>;
1876724ba675SRob Herring					regulator-always-on;
1877724ba675SRob Herring				};
1878724ba675SRob Herring			};
1879724ba675SRob Herring		};
1880724ba675SRob Herring
1881724ba675SRob Herring		core_vdd_reg: tps62361@60 {
1882724ba675SRob Herring			compatible = "ti,tps62361";
1883724ba675SRob Herring			reg = <0x60>;
1884724ba675SRob Herring
1885724ba675SRob Herring			regulator-name = "tps62361-vout";
1886724ba675SRob Herring			regulator-min-microvolt = <500000>;
1887724ba675SRob Herring			regulator-max-microvolt = <1500000>;
1888724ba675SRob Herring			regulator-coupled-with = <&vddctrl_reg>;
1889724ba675SRob Herring			regulator-coupled-max-spread = <300000>;
1890724ba675SRob Herring			regulator-max-step-microvolt = <100000>;
1891724ba675SRob Herring			regulator-boot-on;
1892724ba675SRob Herring			regulator-always-on;
1893724ba675SRob Herring			ti,vsel0-state-high;
1894724ba675SRob Herring			ti,vsel1-state-high;
1895724ba675SRob Herring
1896724ba675SRob Herring			nvidia,tegra-core-regulator;
1897724ba675SRob Herring		};
1898724ba675SRob Herring	};
1899724ba675SRob Herring
1900724ba675SRob Herring	spi@7000da00 {
1901724ba675SRob Herring		status = "okay";
1902724ba675SRob Herring		spi-max-frequency = <25000000>;
1903724ba675SRob Herring
1904724ba675SRob Herring		flash@1 {
1905724ba675SRob Herring			compatible = "winbond,w25q32", "jedec,spi-nor";
1906724ba675SRob Herring			reg = <1>;
1907724ba675SRob Herring			spi-max-frequency = <20000000>;
1908724ba675SRob Herring		};
1909724ba675SRob Herring	};
1910724ba675SRob Herring
1911724ba675SRob Herring	pmc@7000e400 {
1912724ba675SRob Herring		status = "okay";
1913724ba675SRob Herring		nvidia,invert-interrupt;
1914724ba675SRob Herring		nvidia,suspend-mode = <1>;
1915724ba675SRob Herring		nvidia,cpu-pwr-good-time = <2000>;
1916724ba675SRob Herring		nvidia,cpu-pwr-off-time = <200>;
1917724ba675SRob Herring		nvidia,core-pwr-good-time = <3845 3845>;
1918724ba675SRob Herring		nvidia,core-pwr-off-time = <0>;
1919724ba675SRob Herring		nvidia,core-power-req-active-high;
1920724ba675SRob Herring		nvidia,sys-clock-req-active-high;
1921724ba675SRob Herring		core-supply = <&core_vdd_reg>;
1922724ba675SRob Herring	};
1923724ba675SRob Herring
1924724ba675SRob Herring	ahub@70080000 {
1925724ba675SRob Herring		i2s@70080400 {
1926724ba675SRob Herring			status = "okay";
1927724ba675SRob Herring		};
1928724ba675SRob Herring	};
1929724ba675SRob Herring
1930724ba675SRob Herring	mmc@78000000 {
1931724ba675SRob Herring		status = "okay";
1932724ba675SRob Herring		vqmmc-supply = <&ldo5_reg>;
1933724ba675SRob Herring		cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
1934724ba675SRob Herring		wp-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
1935724ba675SRob Herring		power-gpios = <&gpio TEGRA_GPIO(D, 7) GPIO_ACTIVE_HIGH>;
1936724ba675SRob Herring		bus-width = <4>;
1937724ba675SRob Herring	};
1938724ba675SRob Herring
1939724ba675SRob Herring	mmc@78000600 {
1940724ba675SRob Herring		status = "okay";
1941724ba675SRob Herring		bus-width = <8>;
1942724ba675SRob Herring		non-removable;
1943724ba675SRob Herring	};
1944724ba675SRob Herring
1945724ba675SRob Herring	usb@7d000000 {
1946724ba675SRob Herring		compatible = "nvidia,tegra30-udc";
1947724ba675SRob Herring		status = "okay";
1948724ba675SRob Herring		dr_mode = "peripheral";
1949724ba675SRob Herring	};
1950724ba675SRob Herring
1951724ba675SRob Herring	usb-phy@7d000000 {
1952724ba675SRob Herring		status = "okay";
1953724ba675SRob Herring	};
1954724ba675SRob Herring
1955724ba675SRob Herring	usb@7d004000 {
1956724ba675SRob Herring		status = "okay";
1957724ba675SRob Herring	};
1958724ba675SRob Herring
1959724ba675SRob Herring	phy2: usb-phy@7d004000 {
1960724ba675SRob Herring		vbus-supply = <&sys_3v3_reg>;
1961724ba675SRob Herring		status = "okay";
1962724ba675SRob Herring	};
1963724ba675SRob Herring
1964724ba675SRob Herring	usb@7d008000 {
1965724ba675SRob Herring		status = "okay";
1966724ba675SRob Herring	};
1967724ba675SRob Herring
1968724ba675SRob Herring	usb-phy@7d008000 {
1969724ba675SRob Herring		vbus-supply = <&usb3_vbus_reg>;
1970724ba675SRob Herring		status = "okay";
1971724ba675SRob Herring	};
1972724ba675SRob Herring
1973724ba675SRob Herring	clk32k_in: clock-32k {
1974724ba675SRob Herring		compatible = "fixed-clock";
1975724ba675SRob Herring		clock-frequency = <32768>;
1976724ba675SRob Herring		#clock-cells = <0>;
1977724ba675SRob Herring	};
1978724ba675SRob Herring
1979724ba675SRob Herring	cpus {
1980724ba675SRob Herring		cpu0: cpu@0 {
1981724ba675SRob Herring			cpu-supply = <&vddctrl_reg>;
1982724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
1983724ba675SRob Herring		};
1984724ba675SRob Herring
1985724ba675SRob Herring		cpu@1 {
1986724ba675SRob Herring			cpu-supply = <&vddctrl_reg>;
1987724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
1988724ba675SRob Herring		};
1989724ba675SRob Herring
1990724ba675SRob Herring		cpu@2 {
1991724ba675SRob Herring			cpu-supply = <&vddctrl_reg>;
1992724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
1993724ba675SRob Herring		};
1994724ba675SRob Herring
1995724ba675SRob Herring		cpu@3 {
1996724ba675SRob Herring			cpu-supply = <&vddctrl_reg>;
1997724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
1998724ba675SRob Herring		};
1999724ba675SRob Herring	};
2000724ba675SRob Herring
2001724ba675SRob Herring	gpio-leds {
2002724ba675SRob Herring		compatible = "gpio-leds";
2003724ba675SRob Herring
2004724ba675SRob Herring		gpled1 {
2005724ba675SRob Herring			label = "LED1"; /* CR5A1 (blue) */
2006724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(L, 1) GPIO_ACTIVE_HIGH>;
2007724ba675SRob Herring		};
2008724ba675SRob Herring		gpled2 {
2009724ba675SRob Herring			label = "LED2"; /* CR4A2 (green) */
2010724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(L, 0) GPIO_ACTIVE_HIGH>;
2011724ba675SRob Herring		};
2012724ba675SRob Herring	};
2013724ba675SRob Herring
2014724ba675SRob Herring	vdd_5v_in_reg: regulator-5v0 {
2015724ba675SRob Herring		compatible = "regulator-fixed";
2016724ba675SRob Herring		regulator-name = "vdd_5v_in";
2017724ba675SRob Herring		regulator-min-microvolt = <5000000>;
2018724ba675SRob Herring		regulator-max-microvolt = <5000000>;
2019724ba675SRob Herring		regulator-always-on;
2020724ba675SRob Herring	};
2021724ba675SRob Herring
2022724ba675SRob Herring	chargepump_5v_reg: regulator-chargepump {
2023724ba675SRob Herring		compatible = "regulator-fixed";
2024724ba675SRob Herring		regulator-name = "chargepump_5v";
2025724ba675SRob Herring		regulator-min-microvolt = <5000000>;
2026724ba675SRob Herring		regulator-max-microvolt = <5000000>;
2027724ba675SRob Herring		regulator-boot-on;
2028724ba675SRob Herring		regulator-always-on;
2029724ba675SRob Herring		enable-active-high;
2030724ba675SRob Herring		gpio = <&pmic 0 GPIO_ACTIVE_HIGH>;
2031724ba675SRob Herring	};
2032724ba675SRob Herring
2033724ba675SRob Herring	ddr_reg: regulator-ddr {
2034724ba675SRob Herring		compatible = "regulator-fixed";
2035724ba675SRob Herring		regulator-name = "vdd_ddr";
2036724ba675SRob Herring		regulator-min-microvolt = <1500000>;
2037724ba675SRob Herring		regulator-max-microvolt = <1500000>;
2038724ba675SRob Herring		regulator-always-on;
2039724ba675SRob Herring		regulator-boot-on;
2040724ba675SRob Herring		enable-active-high;
2041724ba675SRob Herring		gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
2042724ba675SRob Herring		vin-supply = <&vdd_5v_in_reg>;
2043724ba675SRob Herring	};
2044724ba675SRob Herring
2045724ba675SRob Herring	vdd_5v_sata_reg: regulator-sata {
2046724ba675SRob Herring		compatible = "regulator-fixed";
2047724ba675SRob Herring		regulator-name = "vdd_5v_sata";
2048724ba675SRob Herring		regulator-min-microvolt = <5000000>;
2049724ba675SRob Herring		regulator-max-microvolt = <5000000>;
2050724ba675SRob Herring		regulator-always-on;
2051724ba675SRob Herring		regulator-boot-on;
2052724ba675SRob Herring		enable-active-high;
2053724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(D, 6) GPIO_ACTIVE_HIGH>;
2054724ba675SRob Herring		vin-supply = <&vdd_5v_in_reg>;
2055724ba675SRob Herring	};
2056724ba675SRob Herring
2057724ba675SRob Herring	usb1_vbus_reg: regulator-usb1 {
2058724ba675SRob Herring		compatible = "regulator-fixed";
2059724ba675SRob Herring		regulator-name = "usb1_vbus";
2060724ba675SRob Herring		regulator-min-microvolt = <5000000>;
2061724ba675SRob Herring		regulator-max-microvolt = <5000000>;
2062724ba675SRob Herring		enable-active-high;
2063724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(DD, 6) GPIO_ACTIVE_HIGH>;
2064724ba675SRob Herring		gpio-open-drain;
2065724ba675SRob Herring		vin-supply = <&vdd_5v_in_reg>;
2066724ba675SRob Herring	};
2067724ba675SRob Herring
2068724ba675SRob Herring	usb3_vbus_reg: regulator-usb3 {
2069724ba675SRob Herring		compatible = "regulator-fixed";
2070724ba675SRob Herring		regulator-name = "usb3_vbus";
2071724ba675SRob Herring		regulator-min-microvolt = <5000000>;
2072724ba675SRob Herring		regulator-max-microvolt = <5000000>;
2073724ba675SRob Herring		enable-active-high;
2074724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(DD, 4) GPIO_ACTIVE_HIGH>;
2075724ba675SRob Herring		gpio-open-drain;
2076724ba675SRob Herring		vin-supply = <&vdd_5v_in_reg>;
2077724ba675SRob Herring	};
2078724ba675SRob Herring
2079724ba675SRob Herring	sys_3v3_reg: regulator-3v3 {
2080724ba675SRob Herring		compatible = "regulator-fixed";
2081724ba675SRob Herring		regulator-name = "sys_3v3,vdd_3v3_alw";
2082724ba675SRob Herring		regulator-min-microvolt = <3300000>;
2083724ba675SRob Herring		regulator-max-microvolt = <3300000>;
2084724ba675SRob Herring		regulator-always-on;
2085724ba675SRob Herring		regulator-boot-on;
2086724ba675SRob Herring		enable-active-high;
2087724ba675SRob Herring		gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
2088724ba675SRob Herring		vin-supply = <&vdd_5v_in_reg>;
2089724ba675SRob Herring	};
2090724ba675SRob Herring
2091724ba675SRob Herring	sys_3v3_pexs_reg: regulator-pexs {
2092724ba675SRob Herring		compatible = "regulator-fixed";
2093724ba675SRob Herring		regulator-name = "sys_3v3_pexs";
2094724ba675SRob Herring		regulator-min-microvolt = <3300000>;
2095724ba675SRob Herring		regulator-max-microvolt = <3300000>;
2096724ba675SRob Herring		regulator-always-on;
2097724ba675SRob Herring		regulator-boot-on;
2098724ba675SRob Herring		enable-active-high;
2099724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(L, 7) GPIO_ACTIVE_HIGH>;
2100724ba675SRob Herring		vin-supply = <&sys_3v3_reg>;
2101724ba675SRob Herring	};
2102724ba675SRob Herring
2103724ba675SRob Herring	vdd_5v0_hdmi: regulator-hdmi {
2104724ba675SRob Herring		compatible = "regulator-fixed";
2105724ba675SRob Herring		regulator-name = "+VDD_5V_HDMI";
2106724ba675SRob Herring		regulator-min-microvolt = <5000000>;
2107724ba675SRob Herring		regulator-max-microvolt = <5000000>;
2108724ba675SRob Herring		regulator-always-on;
2109724ba675SRob Herring		regulator-boot-on;
2110724ba675SRob Herring		vin-supply = <&sys_3v3_reg>;
2111724ba675SRob Herring	};
2112724ba675SRob Herring
2113724ba675SRob Herring	sound {
2114724ba675SRob Herring		compatible = "nvidia,tegra-audio-rt5640-beaver",
2115724ba675SRob Herring			     "nvidia,tegra-audio-rt5640";
2116724ba675SRob Herring		nvidia,model = "NVIDIA Tegra Beaver";
2117724ba675SRob Herring
2118724ba675SRob Herring		nvidia,audio-routing =
2119724ba675SRob Herring			"Headphones", "HPOR",
2120724ba675SRob Herring			"Headphones", "HPOL",
2121724ba675SRob Herring			"Mic Jack", "MICBIAS1",
2122724ba675SRob Herring			"IN2P", "Mic Jack";
2123724ba675SRob Herring
2124724ba675SRob Herring		nvidia,i2s-controller = <&tegra_i2s1>;
2125724ba675SRob Herring		nvidia,audio-codec = <&rt5640>;
2126724ba675SRob Herring
2127724ba675SRob Herring		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
2128724ba675SRob Herring
2129724ba675SRob Herring		clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
2130724ba675SRob Herring			 <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
2131724ba675SRob Herring			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2132724ba675SRob Herring		clock-names = "pll_a", "pll_a_out0", "mclk";
2133724ba675SRob Herring
2134724ba675SRob Herring		assigned-clocks = <&tegra_car TEGRA30_CLK_EXTERN1>,
2135724ba675SRob Herring				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
2136724ba675SRob Herring
2137724ba675SRob Herring		assigned-clock-parents = <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,
2138724ba675SRob Herring					 <&tegra_car TEGRA30_CLK_EXTERN1>;
2139724ba675SRob Herring	};
2140724ba675SRob Herring};
2141