xref: /linux/scripts/dtc/include-prefixes/arm/nvidia/tegra20-paz00.dts (revision 3394cc0e38cb9be7367a8ebb4448dda5aa9d8250)
1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0
2724ba675SRob Herring/dts-v1/;
3724ba675SRob Herring
4724ba675SRob Herring#include <dt-bindings/input/input.h>
5724ba675SRob Herring#include <dt-bindings/thermal/thermal.h>
6724ba675SRob Herring
7724ba675SRob Herring#include "tegra20.dtsi"
8724ba675SRob Herring#include "tegra20-cpu-opp.dtsi"
9724ba675SRob Herring#include "tegra20-cpu-opp-microvolt.dtsi"
10724ba675SRob Herring
11724ba675SRob Herring/ {
12724ba675SRob Herring	model = "Toshiba AC100 / Dynabook AZ";
13724ba675SRob Herring	compatible = "compal,paz00", "nvidia,tegra20";
14724ba675SRob Herring
15724ba675SRob Herring	aliases {
16724ba675SRob Herring		mmc0 = &sdmmc4; /* eMMC */
17724ba675SRob Herring		mmc1 = &sdmmc1; /* MicroSD */
18724ba675SRob Herring		rtc0 = "/i2c@7000d000/tps6586x@34";
19724ba675SRob Herring		rtc1 = "/rtc@7000e000";
20724ba675SRob Herring		serial0 = &uarta;
21724ba675SRob Herring		serial1 = &uartc;
22724ba675SRob Herring	};
23724ba675SRob Herring
24724ba675SRob Herring	chosen {
25724ba675SRob Herring		stdout-path = "serial0:115200n8";
26724ba675SRob Herring	};
27724ba675SRob Herring
28724ba675SRob Herring	memory@0 {
29724ba675SRob Herring		reg = <0x00000000 0x20000000>;
30724ba675SRob Herring	};
31724ba675SRob Herring
32724ba675SRob Herring	host1x@50000000 {
33724ba675SRob Herring		dc@54200000 {
34724ba675SRob Herring			rgb {
35724ba675SRob Herring				status = "okay";
36724ba675SRob Herring
37724ba675SRob Herring				nvidia,panel = <&panel>;
38724ba675SRob Herring			};
39724ba675SRob Herring		};
40724ba675SRob Herring
41724ba675SRob Herring		hdmi@54280000 {
42724ba675SRob Herring			status = "okay";
43724ba675SRob Herring
44724ba675SRob Herring			vdd-supply = <&hdmi_vdd_reg>;
45724ba675SRob Herring			pll-supply = <&hdmi_pll_reg>;
46724ba675SRob Herring
47724ba675SRob Herring			nvidia,ddc-i2c-bus = <&hdmi_ddc>;
48724ba675SRob Herring			nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7)
49724ba675SRob Herring				GPIO_ACTIVE_HIGH>;
50724ba675SRob Herring		};
51724ba675SRob Herring	};
52724ba675SRob Herring
53724ba675SRob Herring	pinmux@70000014 {
54724ba675SRob Herring		pinctrl-names = "default";
55724ba675SRob Herring		pinctrl-0 = <&state_default>;
56724ba675SRob Herring
57724ba675SRob Herring		state_default: pinmux {
58724ba675SRob Herring			ata {
59724ba675SRob Herring				nvidia,pins = "ata", "atc", "atd", "ate",
60724ba675SRob Herring					"dap2", "gmb", "gmc", "gmd", "spia",
61724ba675SRob Herring					"spib", "spic", "spid", "spie";
62724ba675SRob Herring				nvidia,function = "gmi";
63724ba675SRob Herring			};
64724ba675SRob Herring			atb {
65724ba675SRob Herring				nvidia,pins = "atb", "gma", "gme";
66724ba675SRob Herring				nvidia,function = "sdio4";
67724ba675SRob Herring			};
68724ba675SRob Herring			cdev1 {
69724ba675SRob Herring				nvidia,pins = "cdev1";
70724ba675SRob Herring				nvidia,function = "plla_out";
71724ba675SRob Herring			};
72724ba675SRob Herring			cdev2 {
73724ba675SRob Herring				nvidia,pins = "cdev2";
74724ba675SRob Herring				nvidia,function = "pllp_out4";
75724ba675SRob Herring			};
76724ba675SRob Herring			crtp {
77724ba675SRob Herring				nvidia,pins = "crtp";
78724ba675SRob Herring				nvidia,function = "crt";
79724ba675SRob Herring			};
80724ba675SRob Herring			csus {
81724ba675SRob Herring				nvidia,pins = "csus";
82724ba675SRob Herring				nvidia,function = "pllc_out1";
83724ba675SRob Herring			};
84724ba675SRob Herring			dap1 {
85724ba675SRob Herring				nvidia,pins = "dap1";
86724ba675SRob Herring				nvidia,function = "dap1";
87724ba675SRob Herring			};
88724ba675SRob Herring			dap3 {
89724ba675SRob Herring				nvidia,pins = "dap3";
90724ba675SRob Herring				nvidia,function = "dap3";
91724ba675SRob Herring			};
92724ba675SRob Herring			dap4 {
93724ba675SRob Herring				nvidia,pins = "dap4";
94724ba675SRob Herring				nvidia,function = "dap4";
95724ba675SRob Herring			};
96724ba675SRob Herring			ddc {
97724ba675SRob Herring				nvidia,pins = "ddc";
98724ba675SRob Herring				nvidia,function = "i2c2";
99724ba675SRob Herring			};
100724ba675SRob Herring			dta {
101724ba675SRob Herring				nvidia,pins = "dta", "dtb", "dtc", "dtd", "dte";
102724ba675SRob Herring				nvidia,function = "rsvd1";
103724ba675SRob Herring			};
104724ba675SRob Herring			dtf {
105724ba675SRob Herring				nvidia,pins = "dtf";
106724ba675SRob Herring				nvidia,function = "i2c3";
107724ba675SRob Herring			};
108724ba675SRob Herring			gpu {
109724ba675SRob Herring				nvidia,pins = "gpu", "sdb", "sdd";
110724ba675SRob Herring				nvidia,function = "pwm";
111724ba675SRob Herring			};
112724ba675SRob Herring			gpu7 {
113724ba675SRob Herring				nvidia,pins = "gpu7";
114724ba675SRob Herring				nvidia,function = "rtck";
115724ba675SRob Herring			};
116724ba675SRob Herring			gpv {
117724ba675SRob Herring				nvidia,pins = "gpv", "slxa", "slxk";
118724ba675SRob Herring				nvidia,function = "pcie";
119724ba675SRob Herring			};
120724ba675SRob Herring			hdint {
121724ba675SRob Herring				nvidia,pins = "hdint", "pta";
122724ba675SRob Herring				nvidia,function = "hdmi";
123724ba675SRob Herring			};
124724ba675SRob Herring			i2cp {
125724ba675SRob Herring				nvidia,pins = "i2cp";
126724ba675SRob Herring				nvidia,function = "i2cp";
127724ba675SRob Herring			};
128724ba675SRob Herring			irrx {
129724ba675SRob Herring				nvidia,pins = "irrx", "irtx";
130724ba675SRob Herring				nvidia,function = "uarta";
131724ba675SRob Herring			};
132724ba675SRob Herring			kbca {
133724ba675SRob Herring				nvidia,pins = "kbca", "kbcc", "kbce", "kbcf";
134724ba675SRob Herring				nvidia,function = "kbc";
135724ba675SRob Herring			};
136724ba675SRob Herring			kbcb {
137724ba675SRob Herring				nvidia,pins = "kbcb", "kbcd";
138724ba675SRob Herring				nvidia,function = "sdio2";
139724ba675SRob Herring			};
140724ba675SRob Herring			lcsn {
141724ba675SRob Herring				nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
142724ba675SRob Herring					"ld3", "ld4", "ld5", "ld6", "ld7",
143724ba675SRob Herring					"ld8", "ld9", "ld10", "ld11", "ld12",
144724ba675SRob Herring					"ld13", "ld14", "ld15", "ld16", "ld17",
145724ba675SRob Herring					"ldc", "ldi", "lhp0", "lhp1", "lhp2",
146724ba675SRob Herring					"lhs", "lm0", "lm1", "lpp", "lpw0",
147724ba675SRob Herring					"lpw1", "lpw2", "lsc0", "lsc1", "lsck",
148724ba675SRob Herring					"lsda", "lsdi", "lspi", "lvp0", "lvp1",
149724ba675SRob Herring					"lvs";
150724ba675SRob Herring				nvidia,function = "displaya";
151724ba675SRob Herring			};
152724ba675SRob Herring			owc {
153724ba675SRob Herring				nvidia,pins = "owc";
154724ba675SRob Herring				nvidia,function = "owr";
155724ba675SRob Herring			};
156724ba675SRob Herring			pmc {
157724ba675SRob Herring				nvidia,pins = "pmc";
158724ba675SRob Herring				nvidia,function = "pwr_on";
159724ba675SRob Herring			};
160724ba675SRob Herring			rm {
161724ba675SRob Herring				nvidia,pins = "rm";
162724ba675SRob Herring				nvidia,function = "i2c1";
163724ba675SRob Herring			};
164724ba675SRob Herring			sdc {
165724ba675SRob Herring				nvidia,pins = "sdc";
166724ba675SRob Herring				nvidia,function = "twc";
167724ba675SRob Herring			};
168724ba675SRob Herring			sdio1 {
169724ba675SRob Herring				nvidia,pins = "sdio1";
170724ba675SRob Herring				nvidia,function = "sdio1";
171724ba675SRob Herring			};
172724ba675SRob Herring			slxc {
173724ba675SRob Herring				nvidia,pins = "slxc", "slxd";
174724ba675SRob Herring				nvidia,function = "spi4";
175724ba675SRob Herring			};
176724ba675SRob Herring			spdi {
177724ba675SRob Herring				nvidia,pins = "spdi", "spdo";
178724ba675SRob Herring				nvidia,function = "rsvd2";
179724ba675SRob Herring			};
180724ba675SRob Herring			spif {
181724ba675SRob Herring				nvidia,pins = "spif", "uac";
182724ba675SRob Herring				nvidia,function = "rsvd4";
183724ba675SRob Herring			};
184724ba675SRob Herring			spig {
185724ba675SRob Herring				nvidia,pins = "spig", "spih";
186724ba675SRob Herring				nvidia,function = "spi2_alt";
187724ba675SRob Herring			};
188724ba675SRob Herring			uaa {
189724ba675SRob Herring				nvidia,pins = "uaa", "uab", "uda";
190724ba675SRob Herring				nvidia,function = "ulpi";
191724ba675SRob Herring			};
192724ba675SRob Herring			uad {
193724ba675SRob Herring				nvidia,pins = "uad";
194724ba675SRob Herring				nvidia,function = "spdif";
195724ba675SRob Herring			};
196724ba675SRob Herring			uca {
197724ba675SRob Herring				nvidia,pins = "uca", "ucb";
198724ba675SRob Herring				nvidia,function = "uartc";
199724ba675SRob Herring			};
200724ba675SRob Herring			conf_ata {
201724ba675SRob Herring				nvidia,pins = "ata", "atb", "atc", "atd", "ate",
202724ba675SRob Herring					"cdev1", "cdev2", "dap1", "dap2", "dtf",
203724ba675SRob Herring					"gma", "gmb", "gmc", "gmd", "gme",
204724ba675SRob Herring					"gpu", "gpu7", "gpv", "i2cp", "pta",
205724ba675SRob Herring					"rm", "sdio1", "slxk", "spdo", "uac",
206724ba675SRob Herring					"uda";
207724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
208724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
209724ba675SRob Herring			};
210724ba675SRob Herring			conf_ck32 {
211724ba675SRob Herring				nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
212724ba675SRob Herring					"pmcc", "pmcd", "pmce", "xm2c", "xm2d";
213724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214724ba675SRob Herring			};
215724ba675SRob Herring			conf_crtp {
216724ba675SRob Herring				nvidia,pins = "crtp", "dap3", "dap4", "dtb",
217724ba675SRob Herring					"dtc", "dte", "slxa", "slxc", "slxd",
218724ba675SRob Herring					"spdi";
219724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
220724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
221724ba675SRob Herring			};
222724ba675SRob Herring			conf_csus {
223724ba675SRob Herring				nvidia,pins = "csus", "spia", "spib", "spid",
224724ba675SRob Herring					"spif";
225724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
226724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
227724ba675SRob Herring			};
228724ba675SRob Herring			conf_ddc {
229724ba675SRob Herring				nvidia,pins = "ddc", "irrx", "irtx", "kbca",
230724ba675SRob Herring					"kbcb", "kbcc", "kbcd", "kbce", "kbcf",
231724ba675SRob Herring					"spic", "spig", "uaa", "uab";
232724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
233724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
234724ba675SRob Herring			};
235724ba675SRob Herring			conf_dta {
236724ba675SRob Herring				nvidia,pins = "dta", "dtd", "owc", "sdc", "sdd",
237724ba675SRob Herring					"spie", "spih", "uad", "uca", "ucb";
238724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
239724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
240724ba675SRob Herring			};
241724ba675SRob Herring			conf_hdint {
242724ba675SRob Herring				nvidia,pins = "hdint", "ld0", "ld1", "ld2",
243724ba675SRob Herring					"ld3", "ld4", "ld5", "ld6", "ld7",
244724ba675SRob Herring					"ld8", "ld9", "ld10", "ld11", "ld12",
245724ba675SRob Herring					"ld13", "ld14", "ld15", "ld16", "ld17",
246724ba675SRob Herring					"ldc", "ldi", "lhs", "lsc0", "lspi",
247724ba675SRob Herring					"lvs", "pmc";
248724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_DISABLE>;
249724ba675SRob Herring			};
250724ba675SRob Herring			conf_lc {
251724ba675SRob Herring				nvidia,pins = "lc", "ls";
252724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_UP>;
253724ba675SRob Herring			};
254724ba675SRob Herring			conf_lcsn {
255724ba675SRob Herring				nvidia,pins = "lcsn", "lhp0", "lhp1", "lhp2",
256724ba675SRob Herring					"lm0", "lm1", "lpp", "lpw0", "lpw1",
257724ba675SRob Herring					"lpw2", "lsc1", "lsck", "lsda", "lsdi",
258724ba675SRob Herring					"lvp0", "lvp1", "sdb";
259724ba675SRob Herring				nvidia,tristate = <TEGRA_PIN_ENABLE>;
260724ba675SRob Herring			};
261724ba675SRob Herring			conf_ld17_0 {
262724ba675SRob Herring				nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
263724ba675SRob Herring					"ld23_22";
264724ba675SRob Herring				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
265724ba675SRob Herring			};
266724ba675SRob Herring		};
267724ba675SRob Herring	};
268724ba675SRob Herring
269724ba675SRob Herring	spdif@70002400 {
270724ba675SRob Herring		status = "okay";
271724ba675SRob Herring
272724ba675SRob Herring		nvidia,fixed-parent-rate;
273724ba675SRob Herring	};
274724ba675SRob Herring
275724ba675SRob Herring	i2s@70002800 {
276724ba675SRob Herring		status = "okay";
277724ba675SRob Herring
278724ba675SRob Herring		nvidia,fixed-parent-rate;
279724ba675SRob Herring	};
280724ba675SRob Herring
281724ba675SRob Herring	serial@70006000 {
2829766116aSThierry Reding		/delete-property/ dmas;
2839766116aSThierry Reding		/delete-property/ dma-names;
284724ba675SRob Herring		status = "okay";
285724ba675SRob Herring	};
286724ba675SRob Herring
287724ba675SRob Herring	serial@70006200 {
2889766116aSThierry Reding		/delete-property/ dmas;
2899766116aSThierry Reding		/delete-property/ dma-names;
290724ba675SRob Herring		status = "okay";
291724ba675SRob Herring	};
292724ba675SRob Herring
293724ba675SRob Herring	pwm: pwm@7000a000 {
294724ba675SRob Herring		status = "okay";
295724ba675SRob Herring	};
296724ba675SRob Herring
297724ba675SRob Herring	lvds_ddc: i2c@7000c000 {
298724ba675SRob Herring		status = "okay";
299724ba675SRob Herring		clock-frequency = <400000>;
300724ba675SRob Herring
301724ba675SRob Herring		alc5632: alc5632@1e {
302724ba675SRob Herring			compatible = "realtek,alc5632";
303724ba675SRob Herring			reg = <0x1e>;
304724ba675SRob Herring			gpio-controller;
305724ba675SRob Herring			#gpio-cells = <2>;
306724ba675SRob Herring		};
307724ba675SRob Herring	};
308724ba675SRob Herring
309724ba675SRob Herring	hdmi_ddc: i2c@7000c400 {
310724ba675SRob Herring		status = "okay";
311724ba675SRob Herring		clock-frequency = <100000>;
312724ba675SRob Herring	};
313724ba675SRob Herring
314ba9858c5SThierry Reding	i2c@7000c500 {
315724ba675SRob Herring		compatible = "nvidia,nvec";
316ba9858c5SThierry Reding
317ba9858c5SThierry Reding		/delete-property/ #address-cells;
318ba9858c5SThierry Reding		/delete-property/ #size-cells;
319ba9858c5SThierry Reding		/delete-property/ dmas;
320ba9858c5SThierry Reding		/delete-property/ dma-names;
321ba9858c5SThierry Reding
322724ba675SRob Herring		clock-frequency = <80000>;
323724ba675SRob Herring		request-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_HIGH>;
324724ba675SRob Herring		slave-addr = <138>;
325ba9858c5SThierry Reding
326ba9858c5SThierry Reding		status = "okay";
327724ba675SRob Herring	};
328724ba675SRob Herring
329724ba675SRob Herring	i2c@7000d000 {
330724ba675SRob Herring		status = "okay";
331724ba675SRob Herring		clock-frequency = <400000>;
332724ba675SRob Herring
333724ba675SRob Herring		pmic: tps6586x@34 {
334724ba675SRob Herring			compatible = "ti,tps6586x";
335724ba675SRob Herring			reg = <0x34>;
336724ba675SRob Herring			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
337724ba675SRob Herring
338724ba675SRob Herring			#gpio-cells = <2>;
339724ba675SRob Herring			gpio-controller;
340724ba675SRob Herring
341724ba675SRob Herring			sys-supply = <&p5valw_reg>;
342724ba675SRob Herring			vin-sm0-supply = <&sys_reg>;
343724ba675SRob Herring			vin-sm1-supply = <&sys_reg>;
344724ba675SRob Herring			vin-sm2-supply = <&sys_reg>;
345724ba675SRob Herring			vinldo01-supply = <&sm2_reg>;
346724ba675SRob Herring			vinldo23-supply = <&sm2_reg>;
347724ba675SRob Herring			vinldo4-supply = <&sm2_reg>;
348724ba675SRob Herring			vinldo678-supply = <&sm2_reg>;
349724ba675SRob Herring			vinldo9-supply = <&sm2_reg>;
350724ba675SRob Herring
351724ba675SRob Herring			regulators {
352724ba675SRob Herring				sys_reg: sys {
353724ba675SRob Herring					regulator-name = "vdd_sys";
354724ba675SRob Herring					regulator-always-on;
355724ba675SRob Herring				};
356724ba675SRob Herring
357724ba675SRob Herring				core_vdd_reg: sm0 {
358724ba675SRob Herring					regulator-name = "+1.2vs_sm0,vdd_core";
359724ba675SRob Herring					regulator-min-microvolt = <950000>;
360724ba675SRob Herring					regulator-max-microvolt = <1300000>;
361724ba675SRob Herring					regulator-coupled-with = <&rtc_vdd_reg &cpu_vdd_reg>;
362724ba675SRob Herring					regulator-coupled-max-spread = <170000 550000>;
363724ba675SRob Herring					regulator-always-on;
364724ba675SRob Herring
365724ba675SRob Herring					nvidia,tegra-core-regulator;
366724ba675SRob Herring				};
367724ba675SRob Herring
368724ba675SRob Herring				cpu_vdd_reg: sm1 {
369724ba675SRob Herring					regulator-name = "+1.0vs_sm1,vdd_cpu";
370724ba675SRob Herring					regulator-min-microvolt = <750000>;
371724ba675SRob Herring					regulator-max-microvolt = <1100000>;
372724ba675SRob Herring					regulator-coupled-with = <&core_vdd_reg &rtc_vdd_reg>;
373724ba675SRob Herring					regulator-coupled-max-spread = <550000 550000>;
374724ba675SRob Herring					regulator-always-on;
375724ba675SRob Herring
376724ba675SRob Herring					nvidia,tegra-cpu-regulator;
377724ba675SRob Herring				};
378724ba675SRob Herring
379724ba675SRob Herring				sm2_reg: sm2 {
380724ba675SRob Herring					regulator-name = "+3.7vs_sm2,vin_ldo*";
381724ba675SRob Herring					regulator-min-microvolt = <3700000>;
382724ba675SRob Herring					regulator-max-microvolt = <3700000>;
383724ba675SRob Herring					regulator-always-on;
384724ba675SRob Herring				};
385724ba675SRob Herring
386724ba675SRob Herring				/* LDO0 is not connected to anything */
387724ba675SRob Herring
388724ba675SRob Herring				ldo1 {
389724ba675SRob Herring					regulator-name = "+1.1vs_ldo1,avdd_pll*";
390724ba675SRob Herring					regulator-min-microvolt = <1100000>;
391724ba675SRob Herring					regulator-max-microvolt = <1100000>;
392724ba675SRob Herring					regulator-always-on;
393724ba675SRob Herring				};
394724ba675SRob Herring
395724ba675SRob Herring				rtc_vdd_reg: ldo2 {
396724ba675SRob Herring					regulator-name = "+1.2vs_ldo2,vdd_rtc";
397724ba675SRob Herring					regulator-min-microvolt = <950000>;
398724ba675SRob Herring					regulator-max-microvolt = <1300000>;
399724ba675SRob Herring					regulator-coupled-with = <&core_vdd_reg &cpu_vdd_reg>;
400724ba675SRob Herring					regulator-coupled-max-spread = <170000 550000>;
401724ba675SRob Herring					regulator-always-on;
402724ba675SRob Herring
403724ba675SRob Herring					nvidia,tegra-rtc-regulator;
404724ba675SRob Herring				};
405724ba675SRob Herring
406724ba675SRob Herring				ldo3 {
407724ba675SRob Herring					regulator-name = "+3.3vs_ldo3,avdd_usb*";
408724ba675SRob Herring					regulator-min-microvolt = <3300000>;
409724ba675SRob Herring					regulator-max-microvolt = <3300000>;
410724ba675SRob Herring					regulator-always-on;
411724ba675SRob Herring				};
412724ba675SRob Herring
413724ba675SRob Herring				ldo4 {
414724ba675SRob Herring					regulator-name = "+1.8vs_ldo4,avdd_osc,vddio_sys";
415724ba675SRob Herring					regulator-min-microvolt = <1800000>;
416724ba675SRob Herring					regulator-max-microvolt = <1800000>;
417724ba675SRob Herring					regulator-always-on;
418724ba675SRob Herring				};
419724ba675SRob Herring
420724ba675SRob Herring				ldo5 {
421724ba675SRob Herring					regulator-name = "+2.85vs_ldo5,vcore_mmc";
422724ba675SRob Herring					regulator-min-microvolt = <2850000>;
423724ba675SRob Herring					regulator-max-microvolt = <2850000>;
424724ba675SRob Herring					regulator-always-on;
425724ba675SRob Herring				};
426724ba675SRob Herring
427724ba675SRob Herring				ldo6 {
428724ba675SRob Herring					/*
429724ba675SRob Herring					 * Research indicates this should be
430724ba675SRob Herring					 * 1.8v; other boards that use this
431724ba675SRob Herring					 * rail for the same purpose need it
432724ba675SRob Herring					 * set to 1.8v. The schematic signal
433724ba675SRob Herring					 * name is incorrect; perhaps copied
434724ba675SRob Herring					 * from an incorrect NVIDIA reference.
435724ba675SRob Herring					 */
436724ba675SRob Herring					regulator-name = "+2.85vs_ldo6,avdd_vdac";
437724ba675SRob Herring					regulator-min-microvolt = <1800000>;
438724ba675SRob Herring					regulator-max-microvolt = <1800000>;
439724ba675SRob Herring				};
440724ba675SRob Herring
441724ba675SRob Herring				hdmi_vdd_reg: ldo7 {
442724ba675SRob Herring					regulator-name = "+3.3vs_ldo7,avdd_hdmi";
443724ba675SRob Herring					regulator-min-microvolt = <3300000>;
444724ba675SRob Herring					regulator-max-microvolt = <3300000>;
445724ba675SRob Herring				};
446724ba675SRob Herring
447724ba675SRob Herring				hdmi_pll_reg: ldo8 {
448724ba675SRob Herring					regulator-name = "+1.8vs_ldo8,avdd_hdmi_pll";
449724ba675SRob Herring					regulator-min-microvolt = <1800000>;
450724ba675SRob Herring					regulator-max-microvolt = <1800000>;
451724ba675SRob Herring				};
452724ba675SRob Herring
453724ba675SRob Herring				ldo9 {
454724ba675SRob Herring					regulator-name = "+2.85vs_ldo9,vdd_ddr_rx";
455724ba675SRob Herring					regulator-min-microvolt = <2850000>;
456724ba675SRob Herring					regulator-max-microvolt = <2850000>;
457724ba675SRob Herring					regulator-always-on;
458724ba675SRob Herring				};
459724ba675SRob Herring
460724ba675SRob Herring				ldo_rtc {
461724ba675SRob Herring					regulator-name = "+3.3vs_rtc";
462724ba675SRob Herring					regulator-min-microvolt = <3300000>;
463724ba675SRob Herring					regulator-max-microvolt = <3300000>;
464724ba675SRob Herring					regulator-always-on;
465724ba675SRob Herring				};
466724ba675SRob Herring			};
467724ba675SRob Herring		};
468724ba675SRob Herring
469724ba675SRob Herring		adt7461: temperature-sensor@4c {
470724ba675SRob Herring			compatible = "adi,adt7461";
471724ba675SRob Herring			reg = <0x4c>;
472724ba675SRob Herring
473724ba675SRob Herring			interrupt-parent = <&gpio>;
474724ba675SRob Herring			interrupts = <TEGRA_GPIO(N, 6) IRQ_TYPE_EDGE_FALLING>;
475724ba675SRob Herring
476724ba675SRob Herring			#thermal-sensor-cells = <1>;
477724ba675SRob Herring		};
478724ba675SRob Herring	};
479724ba675SRob Herring
480724ba675SRob Herring	pmc@7000e400 {
481724ba675SRob Herring		nvidia,invert-interrupt;
482724ba675SRob Herring		nvidia,suspend-mode = <1>;
483724ba675SRob Herring		nvidia,cpu-pwr-good-time = <2000>;
484724ba675SRob Herring		nvidia,cpu-pwr-off-time = <0>;
485724ba675SRob Herring		nvidia,core-pwr-good-time = <3845 3845>;
486724ba675SRob Herring		nvidia,core-pwr-off-time = <0>;
487724ba675SRob Herring		nvidia,sys-clock-req-active-high;
488724ba675SRob Herring		core-supply = <&core_vdd_reg>;
489724ba675SRob Herring	};
490724ba675SRob Herring
491724ba675SRob Herring	memory-controller@7000f400 {
492724ba675SRob Herring		nvidia,use-ram-code;
493724ba675SRob Herring
494724ba675SRob Herring		emc-tables@0 {
495724ba675SRob Herring			nvidia,ram-code = <0x0>;
496724ba675SRob Herring			#address-cells = <1>;
497724ba675SRob Herring			#size-cells = <0>;
498724ba675SRob Herring			reg = <0>;
499724ba675SRob Herring
500724ba675SRob Herring			emc-table@166500 {
501724ba675SRob Herring				reg = <166500>;
502724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
503724ba675SRob Herring				clock-frequency = <166500>;
504724ba675SRob Herring				nvidia,emc-registers = <0x0000000a 0x00000016
505724ba675SRob Herring					0x00000008 0x00000003 0x00000004 0x00000004
506724ba675SRob Herring					0x00000002 0x0000000c 0x00000003 0x00000003
507724ba675SRob Herring					0x00000002 0x00000001 0x00000004 0x00000005
508724ba675SRob Herring					0x00000004 0x00000009 0x0000000d 0x000004df
509724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000003
510724ba675SRob Herring					0x00000003 0x00000001 0x0000000a 0x000000c8
511724ba675SRob Herring					0x00000003 0x00000006 0x00000004 0x00000008
512724ba675SRob Herring					0x00000002 0x00000000 0x00000000 0x00000002
513724ba675SRob Herring					0x00000000 0x00000000 0x00000083 0xe03b0323
514724ba675SRob Herring					0x007fe010 0x00001414 0x00000000 0x00000000
515724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
516724ba675SRob Herring			};
517724ba675SRob Herring
518724ba675SRob Herring			emc-table@333000 {
519724ba675SRob Herring				reg = <333000>;
520724ba675SRob Herring				compatible = "nvidia,tegra20-emc-table";
521724ba675SRob Herring				clock-frequency = <333000>;
522724ba675SRob Herring				nvidia,emc-registers = <0x00000018 0x00000033
523724ba675SRob Herring					0x00000012 0x00000004 0x00000004 0x00000005
524724ba675SRob Herring					0x00000003 0x0000000c 0x00000006 0x00000006
525724ba675SRob Herring					0x00000003 0x00000001 0x00000004 0x00000005
526724ba675SRob Herring					0x00000004 0x00000009 0x0000000d 0x00000bff
527724ba675SRob Herring					0x00000000 0x00000003 0x00000003 0x00000006
528724ba675SRob Herring					0x00000006 0x00000001 0x00000011 0x000000c8
529724ba675SRob Herring					0x00000003 0x0000000e 0x00000007 0x00000008
530724ba675SRob Herring					0x00000002 0x00000000 0x00000000 0x00000002
531724ba675SRob Herring					0x00000000 0x00000000 0x00000083 0xf0440303
532724ba675SRob Herring					0x007fe010 0x00001414 0x00000000 0x00000000
533724ba675SRob Herring					0x00000000 0x00000000 0x00000000 0x00000000>;
534724ba675SRob Herring			};
535724ba675SRob Herring		};
536*3394cc0eSNicolas Chauvet
537*3394cc0eSNicolas Chauvet		emc-tables@1 {
538*3394cc0eSNicolas Chauvet			nvidia,ram-code = <0x1>;
539*3394cc0eSNicolas Chauvet			#address-cells = <1>;
540*3394cc0eSNicolas Chauvet			#size-cells = <0>;
541*3394cc0eSNicolas Chauvet			reg = <1>;
542*3394cc0eSNicolas Chauvet
543*3394cc0eSNicolas Chauvet			emc-table@166500 {
544*3394cc0eSNicolas Chauvet				reg = <166500>;
545*3394cc0eSNicolas Chauvet				compatible = "nvidia,tegra20-emc-table";
546*3394cc0eSNicolas Chauvet				clock-frequency = <166500>;
547*3394cc0eSNicolas Chauvet				nvidia,emc-registers = <0x0000000a 0x00000016
548*3394cc0eSNicolas Chauvet					0x00000008 0x00000003 0x00000004 0x00000004
549*3394cc0eSNicolas Chauvet					0x00000002 0x0000000c 0x00000003 0x00000003
550*3394cc0eSNicolas Chauvet					0x00000002 0x00000001 0x00000004 0x00000005
551*3394cc0eSNicolas Chauvet					0x00000004 0x00000009 0x0000000d 0x000004df
552*3394cc0eSNicolas Chauvet					0x00000000 0x00000003 0x00000003 0x00000003
553*3394cc0eSNicolas Chauvet					0x00000003 0x00000001 0x0000000a 0x000000c8
554*3394cc0eSNicolas Chauvet					0x00000003 0x00000006 0x00000004 0x00000008
555*3394cc0eSNicolas Chauvet					0x00000002 0x00000000 0x00000000 0x00000002
556*3394cc0eSNicolas Chauvet					0x00000000 0x00000000 0x00000083 0xe03b0323
557*3394cc0eSNicolas Chauvet					0x007fe010 0x00001414 0x00000000 0x00000000
558*3394cc0eSNicolas Chauvet					0x00000000 0x00000000 0x00000000 0x00000000>;
559*3394cc0eSNicolas Chauvet			};
560*3394cc0eSNicolas Chauvet
561*3394cc0eSNicolas Chauvet			emc-table@333000 {
562*3394cc0eSNicolas Chauvet				reg = <333000>;
563*3394cc0eSNicolas Chauvet				compatible = "nvidia,tegra20-emc-table";
564*3394cc0eSNicolas Chauvet				clock-frequency = <333000>;
565*3394cc0eSNicolas Chauvet				nvidia,emc-registers = <0x00000018 0x00000033
566*3394cc0eSNicolas Chauvet					0x00000012 0x00000004 0x00000004 0x00000005
567*3394cc0eSNicolas Chauvet					0x00000003 0x0000000c 0x00000006 0x00000006
568*3394cc0eSNicolas Chauvet					0x00000003 0x00000001 0x00000004 0x00000005
569*3394cc0eSNicolas Chauvet					0x00000004 0x00000009 0x0000000d 0x00000bff
570*3394cc0eSNicolas Chauvet					0x00000000 0x00000003 0x00000003 0x00000006
571*3394cc0eSNicolas Chauvet					0x00000006 0x00000001 0x00000011 0x000000c8
572*3394cc0eSNicolas Chauvet					0x00000003 0x0000000e 0x00000007 0x00000008
573*3394cc0eSNicolas Chauvet					0x00000002 0x00000000 0x00000000 0x00000002
574*3394cc0eSNicolas Chauvet					0x00000000 0x00000000 0x00000083 0xf0440303
575*3394cc0eSNicolas Chauvet					0x007fe010 0x00001414 0x00000000 0x00000000
576*3394cc0eSNicolas Chauvet					0x00000000 0x00000000 0x00000000 0x00000000>;
577*3394cc0eSNicolas Chauvet			};
578*3394cc0eSNicolas Chauvet		};
579724ba675SRob Herring	};
580724ba675SRob Herring
581724ba675SRob Herring	usb@c5000000 {
582724ba675SRob Herring		compatible = "nvidia,tegra20-udc";
583724ba675SRob Herring		status = "okay";
584724ba675SRob Herring		dr_mode = "peripheral";
585724ba675SRob Herring	};
586724ba675SRob Herring
587724ba675SRob Herring	usb-phy@c5000000 {
588724ba675SRob Herring		status = "okay";
589724ba675SRob Herring	};
590724ba675SRob Herring
591724ba675SRob Herring	usb@c5004000 {
592724ba675SRob Herring		status = "okay";
593724ba675SRob Herring	};
594724ba675SRob Herring
595724ba675SRob Herring	usb-phy@c5004000 {
596724ba675SRob Herring		status = "okay";
597724ba675SRob Herring		nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 0)
598724ba675SRob Herring			GPIO_ACTIVE_LOW>;
599724ba675SRob Herring	};
600724ba675SRob Herring
601724ba675SRob Herring	usb@c5008000 {
602724ba675SRob Herring		status = "okay";
603724ba675SRob Herring	};
604724ba675SRob Herring
605724ba675SRob Herring	usb-phy@c5008000 {
606724ba675SRob Herring		status = "okay";
607724ba675SRob Herring	};
608724ba675SRob Herring
609724ba675SRob Herring	sdmmc1: mmc@c8000000 {
610724ba675SRob Herring		status = "okay";
611724ba675SRob Herring		cd-gpios = <&gpio TEGRA_GPIO(V, 5) GPIO_ACTIVE_LOW>;
612724ba675SRob Herring		wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
613724ba675SRob Herring		power-gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
614724ba675SRob Herring		bus-width = <4>;
615724ba675SRob Herring	};
616724ba675SRob Herring
617724ba675SRob Herring	sdmmc4: mmc@c8000600 {
618724ba675SRob Herring		status = "okay";
619724ba675SRob Herring		bus-width = <8>;
620724ba675SRob Herring		non-removable;
621724ba675SRob Herring	};
622724ba675SRob Herring
623724ba675SRob Herring	backlight: backlight {
624724ba675SRob Herring		compatible = "pwm-backlight";
625724ba675SRob Herring
626724ba675SRob Herring		enable-gpios = <&gpio TEGRA_GPIO(U, 4) GPIO_ACTIVE_HIGH>;
627724ba675SRob Herring		pwms = <&pwm 0 5000000>;
628724ba675SRob Herring
629724ba675SRob Herring		brightness-levels = <0 16 32 48 64 80 96 112 128 144 160 176 192 208 224 240 255>;
630724ba675SRob Herring		default-brightness-level = <10>;
631724ba675SRob Herring
632724ba675SRob Herring		/* close enough */
633724ba675SRob Herring		power-supply = <&vdd_pnl_reg>;
634724ba675SRob Herring	};
635724ba675SRob Herring
636724ba675SRob Herring	clk32k_in: clock-32k {
637724ba675SRob Herring		compatible = "fixed-clock";
638724ba675SRob Herring		clock-frequency = <32768>;
639724ba675SRob Herring		#clock-cells = <0>;
640724ba675SRob Herring	};
641724ba675SRob Herring
642724ba675SRob Herring	cpus {
643724ba675SRob Herring		cpu0: cpu@0 {
644724ba675SRob Herring			cpu-supply = <&cpu_vdd_reg>;
645724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
646724ba675SRob Herring			#cooling-cells = <2>;
647724ba675SRob Herring		};
648724ba675SRob Herring
649724ba675SRob Herring		cpu1: cpu@1 {
650724ba675SRob Herring			cpu-supply = <&cpu_vdd_reg>;
651724ba675SRob Herring			operating-points-v2 = <&cpu0_opp_table>;
652724ba675SRob Herring			#cooling-cells = <2>;
653724ba675SRob Herring		};
654724ba675SRob Herring	};
655724ba675SRob Herring
656724ba675SRob Herring	gpio-keys {
657724ba675SRob Herring		compatible = "gpio-keys";
658724ba675SRob Herring
659724ba675SRob Herring		key-wakeup {
660724ba675SRob Herring			label = "Wakeup";
661724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
662724ba675SRob Herring			linux,code = <KEY_WAKEUP>;
663724ba675SRob Herring			wakeup-source;
664724ba675SRob Herring		};
665724ba675SRob Herring	};
666724ba675SRob Herring
667724ba675SRob Herring	gpio-leds {
668724ba675SRob Herring		compatible = "gpio-leds";
669724ba675SRob Herring
670724ba675SRob Herring		led-0 {
671724ba675SRob Herring			label = "wifi-led";
672724ba675SRob Herring			gpios = <&gpio TEGRA_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
673724ba675SRob Herring			linux,default-trigger = "rfkill0";
674724ba675SRob Herring		};
675724ba675SRob Herring	};
676724ba675SRob Herring
677724ba675SRob Herring	opp-table-emc {
678724ba675SRob Herring		/delete-node/ opp-760000000;
679724ba675SRob Herring	};
680724ba675SRob Herring
681724ba675SRob Herring	panel: panel {
682724ba675SRob Herring		compatible = "samsung,ltn101nt05";
683724ba675SRob Herring
684724ba675SRob Herring		ddc-i2c-bus = <&lvds_ddc>;
685724ba675SRob Herring		power-supply = <&vdd_pnl_reg>;
686724ba675SRob Herring		enable-gpios = <&gpio TEGRA_GPIO(M, 6) GPIO_ACTIVE_HIGH>;
687724ba675SRob Herring
688724ba675SRob Herring		backlight = <&backlight>;
689724ba675SRob Herring	};
690724ba675SRob Herring
691724ba675SRob Herring	p5valw_reg: regulator-5v0alw {
692724ba675SRob Herring		compatible = "regulator-fixed";
693724ba675SRob Herring		regulator-name = "+5valw";
694724ba675SRob Herring		regulator-min-microvolt = <5000000>;
695724ba675SRob Herring		regulator-max-microvolt = <5000000>;
696724ba675SRob Herring		regulator-always-on;
697724ba675SRob Herring	};
698724ba675SRob Herring
699724ba675SRob Herring	vdd_pnl_reg: regulator-3v0 {
700724ba675SRob Herring		compatible = "regulator-fixed";
701724ba675SRob Herring		regulator-name = "+3VS,vdd_pnl";
702724ba675SRob Herring		regulator-min-microvolt = <3300000>;
703724ba675SRob Herring		regulator-max-microvolt = <3300000>;
704724ba675SRob Herring		regulator-boot-on;
705724ba675SRob Herring		gpio = <&gpio TEGRA_GPIO(A, 4) GPIO_ACTIVE_HIGH>;
706724ba675SRob Herring		enable-active-high;
707724ba675SRob Herring	};
708724ba675SRob Herring
709724ba675SRob Herring	sound {
710724ba675SRob Herring		compatible = "nvidia,tegra-audio-alc5632-paz00",
711724ba675SRob Herring			"nvidia,tegra-audio-alc5632";
712724ba675SRob Herring
713724ba675SRob Herring		nvidia,model = "Compal PAZ00";
714724ba675SRob Herring
715724ba675SRob Herring		nvidia,audio-routing =
716724ba675SRob Herring			"Int Spk", "SPKOUT",
717724ba675SRob Herring			"Int Spk", "SPKOUTN",
718724ba675SRob Herring			"Headset Mic", "MICBIAS1",
719724ba675SRob Herring			"MIC1", "Headset Mic",
720724ba675SRob Herring			"Headset Stereophone", "HPR",
721724ba675SRob Herring			"Headset Stereophone", "HPL",
722724ba675SRob Herring			"DMICDAT", "Digital Mic";
723724ba675SRob Herring
724724ba675SRob Herring		nvidia,audio-codec = <&alc5632>;
725724ba675SRob Herring		nvidia,i2s-controller = <&tegra_i2s1>;
726724ba675SRob Herring		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
727724ba675SRob Herring			GPIO_ACTIVE_HIGH>;
728724ba675SRob Herring
729724ba675SRob Herring		clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
730724ba675SRob Herring			 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
731724ba675SRob Herring			 <&tegra_car TEGRA20_CLK_CDEV1>;
732724ba675SRob Herring		clock-names = "pll_a", "pll_a_out0", "mclk";
733724ba675SRob Herring	};
734724ba675SRob Herring
735724ba675SRob Herring	thermal-zones {
736724ba675SRob Herring		cpu-thermal {
737724ba675SRob Herring			polling-delay-passive = <500>; /* milliseconds */
738724ba675SRob Herring			polling-delay = <1500>; /* milliseconds */
739724ba675SRob Herring
740724ba675SRob Herring			thermal-sensors = <&adt7461 1>;
741724ba675SRob Herring
742724ba675SRob Herring			trips {
743724ba675SRob Herring				trip0: cpu-alert0 {
744724ba675SRob Herring					/* start throttling at 80C */
745724ba675SRob Herring					temperature = <80000>;
746724ba675SRob Herring					hysteresis = <200>;
747724ba675SRob Herring					type = "passive";
748724ba675SRob Herring				};
749724ba675SRob Herring
750724ba675SRob Herring				trip1: cpu-crit {
751724ba675SRob Herring					/* shut down at 85C */
752724ba675SRob Herring					temperature = <85000>;
753724ba675SRob Herring					hysteresis = <2000>;
754724ba675SRob Herring					type = "critical";
755724ba675SRob Herring				};
756724ba675SRob Herring			};
757724ba675SRob Herring
758724ba675SRob Herring			cooling-maps {
759724ba675SRob Herring				map0 {
760724ba675SRob Herring					trip = <&trip0>;
761724ba675SRob Herring					cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
762724ba675SRob Herring							 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
763724ba675SRob Herring				};
764724ba675SRob Herring			};
765724ba675SRob Herring		};
766724ba675SRob Herring	};
767724ba675SRob Herring};
768