1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2724ba675SRob Herring/* 3724ba675SRob Herring * This dts file supports Dalmore A04. 4724ba675SRob Herring * Other board revisions are not supported 5724ba675SRob Herring */ 6724ba675SRob Herring 7724ba675SRob Herring/dts-v1/; 8724ba675SRob Herring 9724ba675SRob Herring#include <dt-bindings/input/input.h> 10724ba675SRob Herring#include "tegra114.dtsi" 11724ba675SRob Herring 12724ba675SRob Herring/ { 13724ba675SRob Herring model = "NVIDIA Tegra114 Dalmore evaluation board"; 14724ba675SRob Herring compatible = "nvidia,dalmore", "nvidia,tegra114"; 15724ba675SRob Herring 16724ba675SRob Herring aliases { 17724ba675SRob Herring rtc0 = "/i2c@7000d000/tps65913@58"; 18724ba675SRob Herring rtc1 = "/rtc@7000e000"; 19724ba675SRob Herring serial0 = &uartd; 20724ba675SRob Herring }; 21724ba675SRob Herring 22724ba675SRob Herring chosen { 23724ba675SRob Herring stdout-path = "serial0:115200n8"; 24724ba675SRob Herring }; 25724ba675SRob Herring 26724ba675SRob Herring memory@80000000 { 27724ba675SRob Herring reg = <0x80000000 0x40000000>; 28724ba675SRob Herring }; 29724ba675SRob Herring 30724ba675SRob Herring host1x@50000000 { 31724ba675SRob Herring hdmi@54280000 { 32724ba675SRob Herring status = "okay"; 33724ba675SRob Herring 34724ba675SRob Herring hdmi-supply = <&vdd_5v0_hdmi>; 35724ba675SRob Herring vdd-supply = <&vdd_hdmi_reg>; 36724ba675SRob Herring pll-supply = <&palmas_smps3_reg>; 37724ba675SRob Herring 38724ba675SRob Herring nvidia,ddc-i2c-bus = <&hdmi_ddc>; 39724ba675SRob Herring nvidia,hpd-gpio = 40724ba675SRob Herring <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; 41724ba675SRob Herring }; 42724ba675SRob Herring 43724ba675SRob Herring dsi@54300000 { 44724ba675SRob Herring status = "okay"; 45724ba675SRob Herring 46724ba675SRob Herring avdd-dsi-csi-supply = <&avdd_1v2_reg>; 47724ba675SRob Herring 48724ba675SRob Herring panel@0 { 49724ba675SRob Herring compatible = "panasonic,vvx10f004b00"; 50724ba675SRob Herring reg = <0>; 51724ba675SRob Herring 52724ba675SRob Herring power-supply = <&avdd_lcd_reg>; 53724ba675SRob Herring backlight = <&backlight>; 54724ba675SRob Herring }; 55724ba675SRob Herring }; 56724ba675SRob Herring }; 57724ba675SRob Herring 58724ba675SRob Herring pinmux@70000868 { 59724ba675SRob Herring pinctrl-names = "default"; 60724ba675SRob Herring pinctrl-0 = <&state_default>; 61724ba675SRob Herring 62724ba675SRob Herring state_default: pinmux { 63724ba675SRob Herring clk1_out_pw4 { 64724ba675SRob Herring nvidia,pins = "clk1_out_pw4"; 65724ba675SRob Herring nvidia,function = "extperiph1"; 66724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 67724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 68724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 69724ba675SRob Herring }; 70724ba675SRob Herring dap1_din_pn1 { 71724ba675SRob Herring nvidia,pins = "dap1_din_pn1"; 72724ba675SRob Herring nvidia,function = "i2s0"; 73724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 74724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 75724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 76724ba675SRob Herring }; 77724ba675SRob Herring dap1_dout_pn2 { 78724ba675SRob Herring nvidia,pins = "dap1_dout_pn2", 79724ba675SRob Herring "dap1_fs_pn0", 80724ba675SRob Herring "dap1_sclk_pn3"; 81724ba675SRob Herring nvidia,function = "i2s0"; 82724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 83724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 84724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 85724ba675SRob Herring }; 86724ba675SRob Herring dap2_din_pa4 { 87724ba675SRob Herring nvidia,pins = "dap2_din_pa4"; 88724ba675SRob Herring nvidia,function = "i2s1"; 89724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 90724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 91724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 92724ba675SRob Herring }; 93724ba675SRob Herring dap2_dout_pa5 { 94724ba675SRob Herring nvidia,pins = "dap2_dout_pa5", 95724ba675SRob Herring "dap2_fs_pa2", 96724ba675SRob Herring "dap2_sclk_pa3"; 97724ba675SRob Herring nvidia,function = "i2s1"; 98724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 99724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 100724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 101724ba675SRob Herring }; 102724ba675SRob Herring dap4_din_pp5 { 103724ba675SRob Herring nvidia,pins = "dap4_din_pp5", 104724ba675SRob Herring "dap4_dout_pp6", 105724ba675SRob Herring "dap4_fs_pp4", 106724ba675SRob Herring "dap4_sclk_pp7"; 107724ba675SRob Herring nvidia,function = "i2s3"; 108724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 109724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 110724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 111724ba675SRob Herring }; 112724ba675SRob Herring dvfs_pwm_px0 { 113724ba675SRob Herring nvidia,pins = "dvfs_pwm_px0", 114724ba675SRob Herring "dvfs_clk_px2"; 115724ba675SRob Herring nvidia,function = "cldvfs"; 116724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 117724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 118724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 119724ba675SRob Herring }; 120724ba675SRob Herring ulpi_clk_py0 { 121724ba675SRob Herring nvidia,pins = "ulpi_clk_py0", 122724ba675SRob Herring "ulpi_data0_po1", 123724ba675SRob Herring "ulpi_data1_po2", 124724ba675SRob Herring "ulpi_data2_po3", 125724ba675SRob Herring "ulpi_data3_po4", 126724ba675SRob Herring "ulpi_data4_po5", 127724ba675SRob Herring "ulpi_data5_po6", 128724ba675SRob Herring "ulpi_data6_po7", 129724ba675SRob Herring "ulpi_data7_po0"; 130724ba675SRob Herring nvidia,function = "ulpi"; 131724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 132724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 133724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 134724ba675SRob Herring }; 135724ba675SRob Herring ulpi_dir_py1 { 136724ba675SRob Herring nvidia,pins = "ulpi_dir_py1", 137724ba675SRob Herring "ulpi_nxt_py2"; 138724ba675SRob Herring nvidia,function = "ulpi"; 139724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 140724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 141724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 142724ba675SRob Herring }; 143724ba675SRob Herring ulpi_stp_py3 { 144724ba675SRob Herring nvidia,pins = "ulpi_stp_py3"; 145724ba675SRob Herring nvidia,function = "ulpi"; 146724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 147724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 148724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 149724ba675SRob Herring }; 150724ba675SRob Herring cam_i2c_scl_pbb1 { 151724ba675SRob Herring nvidia,pins = "cam_i2c_scl_pbb1", 152724ba675SRob Herring "cam_i2c_sda_pbb2"; 153724ba675SRob Herring nvidia,function = "i2c3"; 154724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 155724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 156724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 157724ba675SRob Herring nvidia,lock = <TEGRA_PIN_DISABLE>; 158724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_DISABLE>; 159724ba675SRob Herring }; 160724ba675SRob Herring cam_mclk_pcc0 { 161724ba675SRob Herring nvidia,pins = "cam_mclk_pcc0", 162724ba675SRob Herring "pbb0"; 163724ba675SRob Herring nvidia,function = "vi_alt3"; 164724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 165724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 166724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 167724ba675SRob Herring nvidia,lock = <TEGRA_PIN_DISABLE>; 168724ba675SRob Herring }; 169724ba675SRob Herring gen2_i2c_scl_pt5 { 170724ba675SRob Herring nvidia,pins = "gen2_i2c_scl_pt5", 171724ba675SRob Herring "gen2_i2c_sda_pt6"; 172724ba675SRob Herring nvidia,function = "i2c2"; 173724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 174724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 175724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 176724ba675SRob Herring nvidia,lock = <TEGRA_PIN_DISABLE>; 177724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_DISABLE>; 178724ba675SRob Herring }; 179724ba675SRob Herring gmi_a16_pj7 { 180724ba675SRob Herring nvidia,pins = "gmi_a16_pj7"; 181724ba675SRob Herring nvidia,function = "uartd"; 182724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 183724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 184724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 185724ba675SRob Herring }; 186724ba675SRob Herring gmi_a17_pb0 { 187724ba675SRob Herring nvidia,pins = "gmi_a17_pb0", 188724ba675SRob Herring "gmi_a18_pb1"; 189724ba675SRob Herring nvidia,function = "uartd"; 190724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 191724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 192724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 193724ba675SRob Herring }; 194724ba675SRob Herring gmi_a19_pk7 { 195724ba675SRob Herring nvidia,pins = "gmi_a19_pk7"; 196724ba675SRob Herring nvidia,function = "uartd"; 197724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 198724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 199724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 200724ba675SRob Herring }; 201724ba675SRob Herring gmi_ad5_pg5 { 202724ba675SRob Herring nvidia,pins = "gmi_ad5_pg5", 203724ba675SRob Herring "gmi_cs6_n_pi3", 204724ba675SRob Herring "gmi_wr_n_pi0"; 205724ba675SRob Herring nvidia,function = "spi4"; 206724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 207724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 208724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 209724ba675SRob Herring }; 210724ba675SRob Herring gmi_ad6_pg6 { 211724ba675SRob Herring nvidia,pins = "gmi_ad6_pg6", 212724ba675SRob Herring "gmi_ad7_pg7"; 213724ba675SRob Herring nvidia,function = "spi4"; 214724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 215724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 216724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 217724ba675SRob Herring }; 218724ba675SRob Herring gmi_ad12_ph4 { 219724ba675SRob Herring nvidia,pins = "gmi_ad12_ph4"; 220724ba675SRob Herring nvidia,function = "rsvd4"; 221724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 222724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 223724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 224724ba675SRob Herring }; 225724ba675SRob Herring gmi_ad9_ph1 { 226724ba675SRob Herring nvidia,pins = "gmi_ad9_ph1"; 227724ba675SRob Herring nvidia,function = "pwm1"; 228724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 229724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 230724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 231724ba675SRob Herring }; 232724ba675SRob Herring gmi_cs1_n_pj2 { 233724ba675SRob Herring nvidia,pins = "gmi_cs1_n_pj2", 234724ba675SRob Herring "gmi_oe_n_pi1"; 235724ba675SRob Herring nvidia,function = "soc"; 236724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 237724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 238724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 239724ba675SRob Herring }; 240724ba675SRob Herring clk2_out_pw5 { 241724ba675SRob Herring nvidia,pins = "clk2_out_pw5"; 242724ba675SRob Herring nvidia,function = "extperiph2"; 243724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 244724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 245724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 246724ba675SRob Herring }; 247724ba675SRob Herring sdmmc1_clk_pz0 { 248724ba675SRob Herring nvidia,pins = "sdmmc1_clk_pz0"; 249724ba675SRob Herring nvidia,function = "sdmmc1"; 250724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 251724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 252724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 253724ba675SRob Herring }; 254724ba675SRob Herring sdmmc1_cmd_pz1 { 255724ba675SRob Herring nvidia,pins = "sdmmc1_cmd_pz1", 256724ba675SRob Herring "sdmmc1_dat0_py7", 257724ba675SRob Herring "sdmmc1_dat1_py6", 258724ba675SRob Herring "sdmmc1_dat2_py5", 259724ba675SRob Herring "sdmmc1_dat3_py4"; 260724ba675SRob Herring nvidia,function = "sdmmc1"; 261724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 262724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 263724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 264724ba675SRob Herring }; 265724ba675SRob Herring sdmmc1_wp_n_pv3 { 266724ba675SRob Herring nvidia,pins = "sdmmc1_wp_n_pv3"; 267724ba675SRob Herring nvidia,function = "spi4"; 268724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 269724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 270724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 271724ba675SRob Herring }; 272724ba675SRob Herring sdmmc3_clk_pa6 { 273724ba675SRob Herring nvidia,pins = "sdmmc3_clk_pa6"; 274724ba675SRob Herring nvidia,function = "sdmmc3"; 275724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 276724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 277724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 278724ba675SRob Herring }; 279724ba675SRob Herring sdmmc3_cmd_pa7 { 280724ba675SRob Herring nvidia,pins = "sdmmc3_cmd_pa7", 281724ba675SRob Herring "sdmmc3_dat0_pb7", 282724ba675SRob Herring "sdmmc3_dat1_pb6", 283724ba675SRob Herring "sdmmc3_dat2_pb5", 284724ba675SRob Herring "sdmmc3_dat3_pb4", 285724ba675SRob Herring "kb_col4_pq4", 286724ba675SRob Herring "sdmmc3_clk_lb_out_pee4", 287724ba675SRob Herring "sdmmc3_clk_lb_in_pee5"; 288724ba675SRob Herring nvidia,function = "sdmmc3"; 289724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 290724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 291724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 292724ba675SRob Herring }; 293724ba675SRob Herring sdmmc4_clk_pcc4 { 294724ba675SRob Herring nvidia,pins = "sdmmc4_clk_pcc4"; 295724ba675SRob Herring nvidia,function = "sdmmc4"; 296724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 297724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 298724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 299724ba675SRob Herring }; 300724ba675SRob Herring sdmmc4_cmd_pt7 { 301724ba675SRob Herring nvidia,pins = "sdmmc4_cmd_pt7", 302724ba675SRob Herring "sdmmc4_dat0_paa0", 303724ba675SRob Herring "sdmmc4_dat1_paa1", 304724ba675SRob Herring "sdmmc4_dat2_paa2", 305724ba675SRob Herring "sdmmc4_dat3_paa3", 306724ba675SRob Herring "sdmmc4_dat4_paa4", 307724ba675SRob Herring "sdmmc4_dat5_paa5", 308724ba675SRob Herring "sdmmc4_dat6_paa6", 309724ba675SRob Herring "sdmmc4_dat7_paa7"; 310724ba675SRob Herring nvidia,function = "sdmmc4"; 311724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 312724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 313724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 314724ba675SRob Herring }; 315724ba675SRob Herring clk_32k_out_pa0 { 316724ba675SRob Herring nvidia,pins = "clk_32k_out_pa0"; 317724ba675SRob Herring nvidia,function = "blink"; 318724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 319724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 320724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 321724ba675SRob Herring }; 322724ba675SRob Herring kb_col0_pq0 { 323724ba675SRob Herring nvidia,pins = "kb_col0_pq0", 324724ba675SRob Herring "kb_col1_pq1", 325724ba675SRob Herring "kb_col2_pq2", 326724ba675SRob Herring "kb_row0_pr0", 327724ba675SRob Herring "kb_row1_pr1", 328724ba675SRob Herring "kb_row2_pr2"; 329724ba675SRob Herring nvidia,function = "kbc"; 330724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 331724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 332724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 333724ba675SRob Herring }; 334724ba675SRob Herring dap3_din_pp1 { 335724ba675SRob Herring nvidia,pins = "dap3_din_pp1", 336724ba675SRob Herring "dap3_sclk_pp3"; 337724ba675SRob Herring nvidia,function = "displayb"; 338724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 339724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 340724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 341724ba675SRob Herring }; 342724ba675SRob Herring pv0 { 343724ba675SRob Herring nvidia,pins = "pv0"; 344724ba675SRob Herring nvidia,function = "rsvd4"; 345724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 346724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 347724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 348724ba675SRob Herring }; 349724ba675SRob Herring kb_row7_pr7 { 350724ba675SRob Herring nvidia,pins = "kb_row7_pr7"; 351724ba675SRob Herring nvidia,function = "rsvd2"; 352724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 353724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 354724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 355724ba675SRob Herring }; 356724ba675SRob Herring kb_row10_ps2 { 357724ba675SRob Herring nvidia,pins = "kb_row10_ps2"; 358724ba675SRob Herring nvidia,function = "uarta"; 359724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 360724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 361724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 362724ba675SRob Herring }; 363724ba675SRob Herring kb_row9_ps1 { 364724ba675SRob Herring nvidia,pins = "kb_row9_ps1"; 365724ba675SRob Herring nvidia,function = "uarta"; 366724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 367724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 368724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 369724ba675SRob Herring }; 370724ba675SRob Herring pwr_i2c_scl_pz6 { 371724ba675SRob Herring nvidia,pins = "pwr_i2c_scl_pz6", 372724ba675SRob Herring "pwr_i2c_sda_pz7"; 373724ba675SRob Herring nvidia,function = "i2cpwr"; 374724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 375724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 376724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 377724ba675SRob Herring nvidia,lock = <TEGRA_PIN_DISABLE>; 378724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_DISABLE>; 379724ba675SRob Herring }; 380724ba675SRob Herring sys_clk_req_pz5 { 381724ba675SRob Herring nvidia,pins = "sys_clk_req_pz5"; 382724ba675SRob Herring nvidia,function = "sysclk"; 383724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 384724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 385724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 386724ba675SRob Herring }; 387724ba675SRob Herring core_pwr_req { 388724ba675SRob Herring nvidia,pins = "core_pwr_req"; 389724ba675SRob Herring nvidia,function = "pwron"; 390724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 391724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 392724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 393724ba675SRob Herring }; 394724ba675SRob Herring cpu_pwr_req { 395724ba675SRob Herring nvidia,pins = "cpu_pwr_req"; 396724ba675SRob Herring nvidia,function = "cpu"; 397724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 398724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 399724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 400724ba675SRob Herring }; 401724ba675SRob Herring pwr_int_n { 402724ba675SRob Herring nvidia,pins = "pwr_int_n"; 403724ba675SRob Herring nvidia,function = "pmi"; 404724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 405724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 406724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 407724ba675SRob Herring }; 408724ba675SRob Herring reset_out_n { 409724ba675SRob Herring nvidia,pins = "reset_out_n"; 410724ba675SRob Herring nvidia,function = "reset_out_n"; 411724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 412724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 413724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 414724ba675SRob Herring }; 415724ba675SRob Herring clk3_out_pee0 { 416724ba675SRob Herring nvidia,pins = "clk3_out_pee0"; 417724ba675SRob Herring nvidia,function = "extperiph3"; 418724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 419724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 420724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 421724ba675SRob Herring }; 422724ba675SRob Herring gen1_i2c_scl_pc4 { 423724ba675SRob Herring nvidia,pins = "gen1_i2c_scl_pc4", 424724ba675SRob Herring "gen1_i2c_sda_pc5"; 425724ba675SRob Herring nvidia,function = "i2c1"; 426724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 427724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 428724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 429724ba675SRob Herring nvidia,lock = <TEGRA_PIN_DISABLE>; 430724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_DISABLE>; 431724ba675SRob Herring }; 432724ba675SRob Herring uart2_cts_n_pj5 { 433724ba675SRob Herring nvidia,pins = "uart2_cts_n_pj5"; 434724ba675SRob Herring nvidia,function = "uartb"; 435724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 436724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 437724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 438724ba675SRob Herring }; 439724ba675SRob Herring uart2_rts_n_pj6 { 440724ba675SRob Herring nvidia,pins = "uart2_rts_n_pj6"; 441724ba675SRob Herring nvidia,function = "uartb"; 442724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 443724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 444724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 445724ba675SRob Herring }; 446724ba675SRob Herring uart2_rxd_pc3 { 447724ba675SRob Herring nvidia,pins = "uart2_rxd_pc3"; 448724ba675SRob Herring nvidia,function = "irda"; 449724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 450724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 451724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 452724ba675SRob Herring }; 453724ba675SRob Herring uart2_txd_pc2 { 454724ba675SRob Herring nvidia,pins = "uart2_txd_pc2"; 455724ba675SRob Herring nvidia,function = "irda"; 456724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 457724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 458724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 459724ba675SRob Herring }; 460724ba675SRob Herring uart3_cts_n_pa1 { 461724ba675SRob Herring nvidia,pins = "uart3_cts_n_pa1", 462724ba675SRob Herring "uart3_rxd_pw7"; 463724ba675SRob Herring nvidia,function = "uartc"; 464724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 465724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 466724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 467724ba675SRob Herring }; 468724ba675SRob Herring uart3_rts_n_pc0 { 469724ba675SRob Herring nvidia,pins = "uart3_rts_n_pc0", 470724ba675SRob Herring "uart3_txd_pw6"; 471724ba675SRob Herring nvidia,function = "uartc"; 472724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 473724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 474724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 475724ba675SRob Herring }; 476724ba675SRob Herring owr { 477724ba675SRob Herring nvidia,pins = "owr"; 478724ba675SRob Herring nvidia,function = "owr"; 479724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 480724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 481724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 482724ba675SRob Herring }; 483724ba675SRob Herring hdmi_cec_pee3 { 484724ba675SRob Herring nvidia,pins = "hdmi_cec_pee3"; 485724ba675SRob Herring nvidia,function = "cec"; 486724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 487724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 488724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 489724ba675SRob Herring nvidia,lock = <TEGRA_PIN_DISABLE>; 490724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_DISABLE>; 491724ba675SRob Herring }; 492724ba675SRob Herring ddc_scl_pv4 { 493724ba675SRob Herring nvidia,pins = "ddc_scl_pv4", 494724ba675SRob Herring "ddc_sda_pv5"; 495724ba675SRob Herring nvidia,function = "i2c4"; 496724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 497724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 498724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 499724ba675SRob Herring nvidia,lock = <TEGRA_PIN_DISABLE>; 500724ba675SRob Herring nvidia,rcv-sel = <TEGRA_PIN_ENABLE>; 501724ba675SRob Herring }; 502724ba675SRob Herring spdif_in_pk6 { 503724ba675SRob Herring nvidia,pins = "spdif_in_pk6"; 504724ba675SRob Herring nvidia,function = "usb"; 505724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 506724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 507724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 508724ba675SRob Herring nvidia,lock = <TEGRA_PIN_DISABLE>; 509724ba675SRob Herring }; 510724ba675SRob Herring usb_vbus_en0_pn4 { 511724ba675SRob Herring nvidia,pins = "usb_vbus_en0_pn4"; 512724ba675SRob Herring nvidia,function = "usb"; 513724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 514724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 515724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 516724ba675SRob Herring nvidia,lock = <TEGRA_PIN_DISABLE>; 517724ba675SRob Herring nvidia,open-drain = <TEGRA_PIN_ENABLE>; 518724ba675SRob Herring }; 519724ba675SRob Herring gpio_x6_aud_px6 { 520724ba675SRob Herring nvidia,pins = "gpio_x6_aud_px6"; 521724ba675SRob Herring nvidia,function = "spi6"; 522724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 523724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 524724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 525724ba675SRob Herring }; 526724ba675SRob Herring gpio_x4_aud_px4 { 527724ba675SRob Herring nvidia,pins = "gpio_x4_aud_px4", 528724ba675SRob Herring "gpio_x7_aud_px7"; 529724ba675SRob Herring nvidia,function = "rsvd1"; 530724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 531724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 532724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 533724ba675SRob Herring }; 534724ba675SRob Herring gpio_x5_aud_px5 { 535724ba675SRob Herring nvidia,pins = "gpio_x5_aud_px5"; 536724ba675SRob Herring nvidia,function = "rsvd1"; 537724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 538724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 539724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 540724ba675SRob Herring }; 541724ba675SRob Herring gpio_w2_aud_pw2 { 542724ba675SRob Herring nvidia,pins = "gpio_w2_aud_pw2"; 543724ba675SRob Herring nvidia,function = "rsvd2"; 544724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 545724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 546724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 547724ba675SRob Herring }; 548724ba675SRob Herring gpio_w3_aud_pw3 { 549724ba675SRob Herring nvidia,pins = "gpio_w3_aud_pw3"; 550724ba675SRob Herring nvidia,function = "spi6"; 551724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 552724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 553724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 554724ba675SRob Herring }; 555724ba675SRob Herring gpio_x1_aud_px1 { 556724ba675SRob Herring nvidia,pins = "gpio_x1_aud_px1"; 557724ba675SRob Herring nvidia,function = "rsvd4"; 558724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 559724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 560724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 561724ba675SRob Herring }; 562724ba675SRob Herring gpio_x3_aud_px3 { 563724ba675SRob Herring nvidia,pins = "gpio_x3_aud_px3"; 564724ba675SRob Herring nvidia,function = "rsvd4"; 565724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 566724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 567724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 568724ba675SRob Herring }; 569724ba675SRob Herring dap3_fs_pp0 { 570724ba675SRob Herring nvidia,pins = "dap3_fs_pp0"; 571724ba675SRob Herring nvidia,function = "i2s2"; 572724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 573724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 574724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 575724ba675SRob Herring }; 576724ba675SRob Herring dap3_dout_pp2 { 577724ba675SRob Herring nvidia,pins = "dap3_dout_pp2"; 578724ba675SRob Herring nvidia,function = "i2s2"; 579724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 580724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 581724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 582724ba675SRob Herring }; 583724ba675SRob Herring pv1 { 584724ba675SRob Herring nvidia,pins = "pv1"; 585724ba675SRob Herring nvidia,function = "rsvd1"; 586724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 587724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 588724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 589724ba675SRob Herring }; 590724ba675SRob Herring pbb3 { 591724ba675SRob Herring nvidia,pins = "pbb3", 592724ba675SRob Herring "pbb5", 593724ba675SRob Herring "pbb6", 594724ba675SRob Herring "pbb7"; 595724ba675SRob Herring nvidia,function = "rsvd4"; 596724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 597724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 598724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 599724ba675SRob Herring }; 600724ba675SRob Herring pcc1 { 601724ba675SRob Herring nvidia,pins = "pcc1", 602724ba675SRob Herring "pcc2"; 603724ba675SRob Herring nvidia,function = "rsvd4"; 604724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 605724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 606724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 607724ba675SRob Herring }; 608724ba675SRob Herring gmi_ad0_pg0 { 609724ba675SRob Herring nvidia,pins = "gmi_ad0_pg0", 610724ba675SRob Herring "gmi_ad1_pg1"; 611724ba675SRob Herring nvidia,function = "gmi"; 612724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 613724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 614724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 615724ba675SRob Herring }; 616724ba675SRob Herring gmi_ad10_ph2 { 617724ba675SRob Herring nvidia,pins = "gmi_ad10_ph2", 618724ba675SRob Herring "gmi_ad11_ph3", 619724ba675SRob Herring "gmi_ad13_ph5", 620724ba675SRob Herring "gmi_ad8_ph0", 621724ba675SRob Herring "gmi_clk_pk1"; 622724ba675SRob Herring nvidia,function = "gmi"; 623724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 624724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 625724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 626724ba675SRob Herring }; 627724ba675SRob Herring gmi_ad2_pg2 { 628724ba675SRob Herring nvidia,pins = "gmi_ad2_pg2", 629724ba675SRob Herring "gmi_ad3_pg3"; 630724ba675SRob Herring nvidia,function = "gmi"; 631724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 632724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 633724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 634724ba675SRob Herring }; 635724ba675SRob Herring gmi_adv_n_pk0 { 636724ba675SRob Herring nvidia,pins = "gmi_adv_n_pk0", 637724ba675SRob Herring "gmi_cs0_n_pj0", 638724ba675SRob Herring "gmi_cs2_n_pk3", 639724ba675SRob Herring "gmi_cs4_n_pk2", 640724ba675SRob Herring "gmi_cs7_n_pi6", 641724ba675SRob Herring "gmi_dqs_p_pj3", 642724ba675SRob Herring "gmi_iordy_pi5", 643724ba675SRob Herring "gmi_wp_n_pc7"; 644724ba675SRob Herring nvidia,function = "gmi"; 645724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 646724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 647724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 648724ba675SRob Herring }; 649724ba675SRob Herring gmi_cs3_n_pk4 { 650724ba675SRob Herring nvidia,pins = "gmi_cs3_n_pk4"; 651724ba675SRob Herring nvidia,function = "gmi"; 652724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 653724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 654724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 655724ba675SRob Herring }; 656724ba675SRob Herring clk2_req_pcc5 { 657724ba675SRob Herring nvidia,pins = "clk2_req_pcc5"; 658724ba675SRob Herring nvidia,function = "rsvd4"; 659724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 660724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 661724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 662724ba675SRob Herring }; 663724ba675SRob Herring kb_col3_pq3 { 664724ba675SRob Herring nvidia,pins = "kb_col3_pq3", 665724ba675SRob Herring "kb_col6_pq6", 666724ba675SRob Herring "kb_col7_pq7"; 667724ba675SRob Herring nvidia,function = "kbc"; 668724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 669724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 670724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 671724ba675SRob Herring }; 672724ba675SRob Herring kb_col5_pq5 { 673724ba675SRob Herring nvidia,pins = "kb_col5_pq5"; 674724ba675SRob Herring nvidia,function = "kbc"; 675724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 676724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 677724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 678724ba675SRob Herring }; 679724ba675SRob Herring kb_row3_pr3 { 680724ba675SRob Herring nvidia,pins = "kb_row3_pr3", 681724ba675SRob Herring "kb_row4_pr4", 682724ba675SRob Herring "kb_row6_pr6", 683724ba675SRob Herring "kb_row8_ps0"; 684724ba675SRob Herring nvidia,function = "kbc"; 685724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 686724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 687724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 688724ba675SRob Herring }; 689724ba675SRob Herring clk3_req_pee1 { 690724ba675SRob Herring nvidia,pins = "clk3_req_pee1"; 691724ba675SRob Herring nvidia,function = "rsvd4"; 692724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 693724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 694724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 695724ba675SRob Herring }; 696724ba675SRob Herring pu4 { 697724ba675SRob Herring nvidia,pins = "pu4"; 698724ba675SRob Herring nvidia,function = "displayb"; 699724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 700724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 701724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 702724ba675SRob Herring }; 703724ba675SRob Herring pu5 { 704724ba675SRob Herring nvidia,pins = "pu5", 705724ba675SRob Herring "pu6"; 706724ba675SRob Herring nvidia,function = "displayb"; 707724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 708724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 709724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 710724ba675SRob Herring }; 711724ba675SRob Herring hdmi_int_pn7 { 712724ba675SRob Herring nvidia,pins = "hdmi_int_pn7"; 713724ba675SRob Herring nvidia,function = "rsvd1"; 714724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 715724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 716724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 717724ba675SRob Herring }; 718724ba675SRob Herring clk1_req_pee2 { 719724ba675SRob Herring nvidia,pins = "clk1_req_pee2", 720724ba675SRob Herring "usb_vbus_en1_pn5"; 721724ba675SRob Herring nvidia,function = "rsvd4"; 722724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 723724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 724724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 725724ba675SRob Herring }; 726724ba675SRob Herring 727724ba675SRob Herring drive_sdio1 { 728724ba675SRob Herring nvidia,pins = "drive_sdio1"; 729724ba675SRob Herring nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 730724ba675SRob Herring nvidia,schmitt = <TEGRA_PIN_DISABLE>; 731724ba675SRob Herring nvidia,pull-down-strength = <36>; 732724ba675SRob Herring nvidia,pull-up-strength = <20>; 733724ba675SRob Herring nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>; 734724ba675SRob Herring nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>; 735724ba675SRob Herring }; 736724ba675SRob Herring drive_sdio3 { 737724ba675SRob Herring nvidia,pins = "drive_sdio3"; 738724ba675SRob Herring nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 739724ba675SRob Herring nvidia,schmitt = <TEGRA_PIN_DISABLE>; 740724ba675SRob Herring nvidia,pull-down-strength = <22>; 741724ba675SRob Herring nvidia,pull-up-strength = <36>; 742724ba675SRob Herring nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 743724ba675SRob Herring nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 744724ba675SRob Herring }; 745724ba675SRob Herring drive_gma { 746724ba675SRob Herring nvidia,pins = "drive_gma"; 747724ba675SRob Herring nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 748724ba675SRob Herring nvidia,schmitt = <TEGRA_PIN_DISABLE>; 749724ba675SRob Herring nvidia,pull-down-strength = <2>; 750724ba675SRob Herring nvidia,pull-up-strength = <1>; 751724ba675SRob Herring nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 752724ba675SRob Herring nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 753724ba675SRob Herring }; 754724ba675SRob Herring }; 755724ba675SRob Herring }; 756724ba675SRob Herring 757724ba675SRob Herring serial@70006300 { 758*9766116aSThierry Reding /delete-property/ dmas; 759*9766116aSThierry Reding /delete-property/ dma-names; 760724ba675SRob Herring status = "okay"; 761724ba675SRob Herring }; 762724ba675SRob Herring 763724ba675SRob Herring pwm@7000a000 { 764724ba675SRob Herring status = "okay"; 765724ba675SRob Herring }; 766724ba675SRob Herring 767724ba675SRob Herring i2c@7000c000 { 768724ba675SRob Herring status = "okay"; 769724ba675SRob Herring clock-frequency = <100000>; 770724ba675SRob Herring 771724ba675SRob Herring battery: smart-battery@b { 772724ba675SRob Herring compatible = "ti,bq20z45", "sbs,sbs-battery"; 773724ba675SRob Herring reg = <0xb>; 774724ba675SRob Herring sbs,i2c-retry-count = <2>; 775724ba675SRob Herring sbs,poll-retry-count = <100>; 776724ba675SRob Herring power-supplies = <&charger>; 777724ba675SRob Herring }; 778724ba675SRob Herring 779724ba675SRob Herring rt5640: rt5640@1c { 780724ba675SRob Herring compatible = "realtek,rt5640"; 781724ba675SRob Herring reg = <0x1c>; 782724ba675SRob Herring interrupt-parent = <&gpio>; 783724ba675SRob Herring interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>; 784724ba675SRob Herring realtek,ldo1-en-gpios = 785724ba675SRob Herring <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>; 786724ba675SRob Herring }; 787724ba675SRob Herring 788724ba675SRob Herring temperature-sensor@4c { 789724ba675SRob Herring compatible = "onnn,nct1008"; 790724ba675SRob Herring reg = <0x4c>; 791724ba675SRob Herring vcc-supply = <&palmas_ldo6_reg>; 792724ba675SRob Herring interrupt-parent = <&gpio>; 793724ba675SRob Herring interrupts = <TEGRA_GPIO(O, 4) IRQ_TYPE_EDGE_FALLING>; 794724ba675SRob Herring }; 795724ba675SRob Herring }; 796724ba675SRob Herring 797724ba675SRob Herring hdmi_ddc: i2c@7000c700 { 798724ba675SRob Herring status = "okay"; 799724ba675SRob Herring }; 800724ba675SRob Herring 801724ba675SRob Herring i2c@7000d000 { 802724ba675SRob Herring status = "okay"; 803724ba675SRob Herring clock-frequency = <400000>; 804724ba675SRob Herring 805724ba675SRob Herring tps51632@43 { 806724ba675SRob Herring compatible = "ti,tps51632"; 807724ba675SRob Herring reg = <0x43>; 808724ba675SRob Herring regulator-name = "vdd-cpu"; 809724ba675SRob Herring regulator-min-microvolt = <500000>; 810724ba675SRob Herring regulator-max-microvolt = <1520000>; 811724ba675SRob Herring regulator-boot-on; 812724ba675SRob Herring regulator-always-on; 813724ba675SRob Herring }; 814724ba675SRob Herring 815724ba675SRob Herring tps65090@48 { 816724ba675SRob Herring compatible = "ti,tps65090"; 817724ba675SRob Herring reg = <0x48>; 818724ba675SRob Herring interrupt-parent = <&gpio>; 819724ba675SRob Herring interrupts = <TEGRA_GPIO(J, 0) IRQ_TYPE_LEVEL_HIGH>; 820724ba675SRob Herring 821724ba675SRob Herring vsys1-supply = <&vdd_ac_bat_reg>; 822724ba675SRob Herring vsys2-supply = <&vdd_ac_bat_reg>; 823724ba675SRob Herring vsys3-supply = <&vdd_ac_bat_reg>; 824724ba675SRob Herring infet1-supply = <&vdd_ac_bat_reg>; 825724ba675SRob Herring infet2-supply = <&vdd_ac_bat_reg>; 826724ba675SRob Herring infet3-supply = <&tps65090_dcdc2_reg>; 827724ba675SRob Herring infet4-supply = <&tps65090_dcdc2_reg>; 828724ba675SRob Herring infet5-supply = <&tps65090_dcdc2_reg>; 829724ba675SRob Herring infet6-supply = <&tps65090_dcdc2_reg>; 830724ba675SRob Herring infet7-supply = <&tps65090_dcdc2_reg>; 831724ba675SRob Herring vsys-l1-supply = <&vdd_ac_bat_reg>; 832724ba675SRob Herring vsys-l2-supply = <&vdd_ac_bat_reg>; 833724ba675SRob Herring 834724ba675SRob Herring charger: charger { 835724ba675SRob Herring compatible = "ti,tps65090-charger"; 836724ba675SRob Herring ti,enable-low-current-chrg; 837724ba675SRob Herring }; 838724ba675SRob Herring 839724ba675SRob Herring regulators { 840724ba675SRob Herring tps65090_dcdc1_reg: dcdc1 { 841724ba675SRob Herring regulator-name = "vdd-sys-5v0"; 842724ba675SRob Herring regulator-always-on; 843724ba675SRob Herring regulator-boot-on; 844724ba675SRob Herring }; 845724ba675SRob Herring 846724ba675SRob Herring tps65090_dcdc2_reg: dcdc2 { 847724ba675SRob Herring regulator-name = "vdd-sys-3v3"; 848724ba675SRob Herring regulator-always-on; 849724ba675SRob Herring regulator-boot-on; 850724ba675SRob Herring }; 851724ba675SRob Herring 852724ba675SRob Herring tps65090_dcdc3_reg: dcdc3 { 853724ba675SRob Herring regulator-name = "vdd-ao"; 854724ba675SRob Herring regulator-always-on; 855724ba675SRob Herring regulator-boot-on; 856724ba675SRob Herring }; 857724ba675SRob Herring 858724ba675SRob Herring vdd_bl_reg: fet1 { 859724ba675SRob Herring regulator-name = "vdd-lcd-bl"; 860724ba675SRob Herring }; 861724ba675SRob Herring 862724ba675SRob Herring fet3 { 863724ba675SRob Herring regulator-name = "vdd-modem-3v3"; 864724ba675SRob Herring }; 865724ba675SRob Herring 866724ba675SRob Herring avdd_lcd_reg: fet4 { 867724ba675SRob Herring regulator-name = "avdd-lcd"; 868724ba675SRob Herring }; 869724ba675SRob Herring 870724ba675SRob Herring fet5 { 871724ba675SRob Herring regulator-name = "vdd-lvds"; 872724ba675SRob Herring }; 873724ba675SRob Herring 874724ba675SRob Herring fet6 { 875724ba675SRob Herring regulator-name = "vdd-sd-slot"; 876724ba675SRob Herring regulator-always-on; 877724ba675SRob Herring regulator-boot-on; 878724ba675SRob Herring }; 879724ba675SRob Herring 880724ba675SRob Herring fet7 { 881724ba675SRob Herring regulator-name = "vdd-com-3v3"; 882724ba675SRob Herring }; 883724ba675SRob Herring 884724ba675SRob Herring ldo1 { 885724ba675SRob Herring regulator-name = "vdd-sby-5v0"; 886724ba675SRob Herring regulator-always-on; 887724ba675SRob Herring regulator-boot-on; 888724ba675SRob Herring }; 889724ba675SRob Herring 890724ba675SRob Herring ldo2 { 891724ba675SRob Herring regulator-name = "vdd-sby-3v3"; 892724ba675SRob Herring regulator-always-on; 893724ba675SRob Herring regulator-boot-on; 894724ba675SRob Herring }; 895724ba675SRob Herring }; 896724ba675SRob Herring }; 897724ba675SRob Herring 898724ba675SRob Herring palmas: tps65913@58 { 899724ba675SRob Herring compatible = "ti,tps65913", "ti,palmas"; 900724ba675SRob Herring reg = <0x58>; 901724ba675SRob Herring interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; 902724ba675SRob Herring 903724ba675SRob Herring #interrupt-cells = <2>; 904724ba675SRob Herring interrupt-controller; 905724ba675SRob Herring 906724ba675SRob Herring ti,system-power-controller; 907724ba675SRob Herring 908724ba675SRob Herring palmas_gpio: gpio { 909724ba675SRob Herring compatible = "ti,palmas-gpio"; 910724ba675SRob Herring gpio-controller; 911724ba675SRob Herring #gpio-cells = <2>; 912724ba675SRob Herring }; 913724ba675SRob Herring 914724ba675SRob Herring pinmux { 915724ba675SRob Herring compatible = "ti,tps65913-pinctrl"; 916724ba675SRob Herring pinctrl-names = "default"; 917724ba675SRob Herring pinctrl-0 = <&palmas_default>; 918724ba675SRob Herring 919724ba675SRob Herring palmas_default: pinmux { 920724ba675SRob Herring pin_gpio6 { 921724ba675SRob Herring pins = "gpio6"; 922724ba675SRob Herring function = "gpio"; 923724ba675SRob Herring }; 924724ba675SRob Herring }; 925724ba675SRob Herring }; 926724ba675SRob Herring 927724ba675SRob Herring pmic { 928724ba675SRob Herring compatible = "ti,tps65913-pmic", "ti,palmas-pmic"; 929724ba675SRob Herring smps1-in-supply = <&tps65090_dcdc3_reg>; 930724ba675SRob Herring smps3-in-supply = <&tps65090_dcdc3_reg>; 931724ba675SRob Herring smps4-in-supply = <&tps65090_dcdc2_reg>; 932724ba675SRob Herring smps7-in-supply = <&tps65090_dcdc2_reg>; 933724ba675SRob Herring smps8-in-supply = <&tps65090_dcdc2_reg>; 934724ba675SRob Herring smps9-in-supply = <&tps65090_dcdc2_reg>; 935724ba675SRob Herring ldo1-in-supply = <&tps65090_dcdc2_reg>; 936724ba675SRob Herring ldo2-in-supply = <&tps65090_dcdc2_reg>; 937724ba675SRob Herring ldo3-in-supply = <&palmas_smps3_reg>; 938724ba675SRob Herring ldo4-in-supply = <&tps65090_dcdc2_reg>; 939724ba675SRob Herring ldo5-in-supply = <&vdd_ac_bat_reg>; 940724ba675SRob Herring ldo6-in-supply = <&tps65090_dcdc2_reg>; 941724ba675SRob Herring ldo7-in-supply = <&tps65090_dcdc2_reg>; 942724ba675SRob Herring ldo8-in-supply = <&tps65090_dcdc3_reg>; 943724ba675SRob Herring ldo9-in-supply = <&palmas_smps9_reg>; 944724ba675SRob Herring ldoln-in-supply = <&tps65090_dcdc1_reg>; 945724ba675SRob Herring ldousb-in-supply = <&tps65090_dcdc1_reg>; 946724ba675SRob Herring 947724ba675SRob Herring regulators { 948724ba675SRob Herring smps12 { 949724ba675SRob Herring regulator-name = "vddio-ddr"; 950724ba675SRob Herring regulator-min-microvolt = <1350000>; 951724ba675SRob Herring regulator-max-microvolt = <1350000>; 952724ba675SRob Herring regulator-always-on; 953724ba675SRob Herring regulator-boot-on; 954724ba675SRob Herring }; 955724ba675SRob Herring 956724ba675SRob Herring palmas_smps3_reg: smps3 { 957724ba675SRob Herring regulator-name = "vddio-1v8"; 958724ba675SRob Herring regulator-min-microvolt = <1800000>; 959724ba675SRob Herring regulator-max-microvolt = <1800000>; 960724ba675SRob Herring regulator-always-on; 961724ba675SRob Herring regulator-boot-on; 962724ba675SRob Herring }; 963724ba675SRob Herring 964724ba675SRob Herring smps45 { 965724ba675SRob Herring regulator-name = "vdd-core"; 966724ba675SRob Herring regulator-min-microvolt = <900000>; 967724ba675SRob Herring regulator-max-microvolt = <1400000>; 968724ba675SRob Herring regulator-always-on; 969724ba675SRob Herring regulator-boot-on; 970724ba675SRob Herring }; 971724ba675SRob Herring 972724ba675SRob Herring smps457 { 973724ba675SRob Herring regulator-name = "vdd-core"; 974724ba675SRob Herring regulator-min-microvolt = <900000>; 975724ba675SRob Herring regulator-max-microvolt = <1400000>; 976724ba675SRob Herring regulator-always-on; 977724ba675SRob Herring regulator-boot-on; 978724ba675SRob Herring }; 979724ba675SRob Herring 980724ba675SRob Herring smps8 { 981724ba675SRob Herring regulator-name = "avdd-pll"; 982724ba675SRob Herring regulator-min-microvolt = <1050000>; 983724ba675SRob Herring regulator-max-microvolt = <1050000>; 984724ba675SRob Herring regulator-always-on; 985724ba675SRob Herring regulator-boot-on; 986724ba675SRob Herring }; 987724ba675SRob Herring 988724ba675SRob Herring palmas_smps9_reg: smps9 { 989724ba675SRob Herring regulator-name = "sdhci-vdd-sd-slot"; 990724ba675SRob Herring regulator-min-microvolt = <2800000>; 991724ba675SRob Herring regulator-max-microvolt = <2800000>; 992724ba675SRob Herring regulator-always-on; 993724ba675SRob Herring }; 994724ba675SRob Herring 995724ba675SRob Herring ldo1 { 996724ba675SRob Herring regulator-name = "avdd-cam1"; 997724ba675SRob Herring regulator-min-microvolt = <2800000>; 998724ba675SRob Herring regulator-max-microvolt = <2800000>; 999724ba675SRob Herring }; 1000724ba675SRob Herring 1001724ba675SRob Herring ldo2 { 1002724ba675SRob Herring regulator-name = "avdd-cam2"; 1003724ba675SRob Herring regulator-min-microvolt = <2800000>; 1004724ba675SRob Herring regulator-max-microvolt = <2800000>; 1005724ba675SRob Herring }; 1006724ba675SRob Herring 1007724ba675SRob Herring avdd_1v2_reg: ldo3 { 1008724ba675SRob Herring regulator-name = "avdd-dsi-csi"; 1009724ba675SRob Herring regulator-min-microvolt = <1200000>; 1010724ba675SRob Herring regulator-max-microvolt = <1200000>; 1011724ba675SRob Herring }; 1012724ba675SRob Herring 1013724ba675SRob Herring ldo4 { 1014724ba675SRob Herring regulator-name = "vpp-fuse"; 1015724ba675SRob Herring regulator-min-microvolt = <1800000>; 1016724ba675SRob Herring regulator-max-microvolt = <1800000>; 1017724ba675SRob Herring }; 1018724ba675SRob Herring 1019724ba675SRob Herring palmas_ldo6_reg: ldo6 { 1020724ba675SRob Herring regulator-name = "vdd-sensor-2v85"; 1021724ba675SRob Herring regulator-min-microvolt = <2850000>; 1022724ba675SRob Herring regulator-max-microvolt = <2850000>; 1023724ba675SRob Herring }; 1024724ba675SRob Herring 1025724ba675SRob Herring ldo7 { 1026724ba675SRob Herring regulator-name = "vdd-af-cam1"; 1027724ba675SRob Herring regulator-min-microvolt = <2800000>; 1028724ba675SRob Herring regulator-max-microvolt = <2800000>; 1029724ba675SRob Herring }; 1030724ba675SRob Herring 1031724ba675SRob Herring ldo8 { 1032724ba675SRob Herring regulator-name = "vdd-rtc"; 1033724ba675SRob Herring regulator-min-microvolt = <900000>; 1034724ba675SRob Herring regulator-max-microvolt = <900000>; 1035724ba675SRob Herring regulator-always-on; 1036724ba675SRob Herring regulator-boot-on; 1037724ba675SRob Herring ti,enable-ldo8-tracking; 1038724ba675SRob Herring }; 1039724ba675SRob Herring 1040724ba675SRob Herring ldo9 { 1041724ba675SRob Herring regulator-name = "vddio-sdmmc-2"; 1042724ba675SRob Herring regulator-min-microvolt = <1800000>; 1043724ba675SRob Herring regulator-max-microvolt = <3300000>; 1044724ba675SRob Herring regulator-always-on; 1045724ba675SRob Herring regulator-boot-on; 1046724ba675SRob Herring }; 1047724ba675SRob Herring 1048724ba675SRob Herring ldoln { 1049724ba675SRob Herring regulator-name = "hvdd-usb"; 1050724ba675SRob Herring regulator-min-microvolt = <3300000>; 1051724ba675SRob Herring regulator-max-microvolt = <3300000>; 1052724ba675SRob Herring }; 1053724ba675SRob Herring 1054724ba675SRob Herring ldousb { 1055724ba675SRob Herring regulator-name = "avdd-usb"; 1056724ba675SRob Herring regulator-min-microvolt = <3300000>; 1057724ba675SRob Herring regulator-max-microvolt = <3300000>; 1058724ba675SRob Herring regulator-always-on; 1059724ba675SRob Herring regulator-boot-on; 1060724ba675SRob Herring }; 1061724ba675SRob Herring 1062724ba675SRob Herring regen1 { 1063724ba675SRob Herring regulator-name = "rail-3v3"; 1064724ba675SRob Herring regulator-max-microvolt = <3300000>; 1065724ba675SRob Herring regulator-always-on; 1066724ba675SRob Herring regulator-boot-on; 1067724ba675SRob Herring }; 1068724ba675SRob Herring 1069724ba675SRob Herring regen2 { 1070724ba675SRob Herring regulator-name = "rail-5v0"; 1071724ba675SRob Herring regulator-max-microvolt = <5000000>; 1072724ba675SRob Herring regulator-always-on; 1073724ba675SRob Herring regulator-boot-on; 1074724ba675SRob Herring }; 1075724ba675SRob Herring }; 1076724ba675SRob Herring }; 1077724ba675SRob Herring 1078724ba675SRob Herring rtc { 1079724ba675SRob Herring compatible = "ti,palmas-rtc"; 1080724ba675SRob Herring interrupt-parent = <&palmas>; 1081724ba675SRob Herring interrupts = <8 0>; 1082724ba675SRob Herring }; 1083724ba675SRob Herring }; 1084724ba675SRob Herring }; 1085724ba675SRob Herring 1086724ba675SRob Herring spi@7000da00 { 1087724ba675SRob Herring status = "okay"; 1088724ba675SRob Herring spi-max-frequency = <25000000>; 1089724ba675SRob Herring 1090724ba675SRob Herring flash@0 { 1091724ba675SRob Herring compatible = "winbond,w25q32dw", "jedec,spi-nor"; 1092724ba675SRob Herring reg = <0>; 1093724ba675SRob Herring spi-max-frequency = <20000000>; 1094724ba675SRob Herring }; 1095724ba675SRob Herring }; 1096724ba675SRob Herring 1097724ba675SRob Herring pmc@7000e400 { 1098724ba675SRob Herring nvidia,invert-interrupt; 1099724ba675SRob Herring nvidia,suspend-mode = <1>; 1100724ba675SRob Herring nvidia,cpu-pwr-good-time = <500>; 1101724ba675SRob Herring nvidia,cpu-pwr-off-time = <300>; 1102724ba675SRob Herring nvidia,core-pwr-good-time = <641 3845>; 1103724ba675SRob Herring nvidia,core-pwr-off-time = <61036>; 1104724ba675SRob Herring nvidia,core-power-req-active-high; 1105724ba675SRob Herring nvidia,sys-clock-req-active-high; 1106724ba675SRob Herring }; 1107724ba675SRob Herring 1108724ba675SRob Herring ahub@70080000 { 1109724ba675SRob Herring i2s@70080400 { 1110724ba675SRob Herring status = "okay"; 1111724ba675SRob Herring }; 1112724ba675SRob Herring }; 1113724ba675SRob Herring 1114724ba675SRob Herring mmc@78000400 { 1115724ba675SRob Herring cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; 1116724ba675SRob Herring wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>; 1117724ba675SRob Herring bus-width = <4>; 1118724ba675SRob Herring status = "okay"; 1119724ba675SRob Herring }; 1120724ba675SRob Herring 1121724ba675SRob Herring mmc@78000600 { 1122724ba675SRob Herring bus-width = <8>; 1123724ba675SRob Herring status = "okay"; 1124724ba675SRob Herring non-removable; 1125724ba675SRob Herring }; 1126724ba675SRob Herring 1127724ba675SRob Herring usb@7d000000 { 1128724ba675SRob Herring compatible = "nvidia,tegra114-udc"; 1129724ba675SRob Herring status = "okay"; 1130724ba675SRob Herring dr_mode = "peripheral"; 1131724ba675SRob Herring }; 1132724ba675SRob Herring 1133724ba675SRob Herring usb-phy@7d000000 { 1134724ba675SRob Herring status = "okay"; 1135724ba675SRob Herring }; 1136724ba675SRob Herring 1137724ba675SRob Herring usb@7d008000 { 1138724ba675SRob Herring status = "okay"; 1139724ba675SRob Herring }; 1140724ba675SRob Herring 1141724ba675SRob Herring usb-phy@7d008000 { 1142724ba675SRob Herring status = "okay"; 1143724ba675SRob Herring vbus-supply = <&usb3_vbus_reg>; 1144724ba675SRob Herring }; 1145724ba675SRob Herring 1146724ba675SRob Herring backlight: backlight { 1147724ba675SRob Herring compatible = "pwm-backlight"; 1148724ba675SRob Herring 1149724ba675SRob Herring enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; 1150724ba675SRob Herring power-supply = <&vdd_bl_reg>; 1151724ba675SRob Herring pwms = <&pwm 1 1000000>; 1152724ba675SRob Herring 1153724ba675SRob Herring brightness-levels = <0 4 8 16 32 64 128 255>; 1154724ba675SRob Herring default-brightness-level = <6>; 1155724ba675SRob Herring }; 1156724ba675SRob Herring 1157724ba675SRob Herring clk32k_in: clock-32k { 1158724ba675SRob Herring compatible = "fixed-clock"; 1159724ba675SRob Herring clock-frequency = <32768>; 1160724ba675SRob Herring #clock-cells = <0>; 1161724ba675SRob Herring }; 1162724ba675SRob Herring 1163724ba675SRob Herring gpio-keys { 1164724ba675SRob Herring compatible = "gpio-keys"; 1165724ba675SRob Herring 1166724ba675SRob Herring key-home { 1167724ba675SRob Herring label = "Home"; 1168724ba675SRob Herring gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; 1169724ba675SRob Herring linux,code = <KEY_HOME>; 1170724ba675SRob Herring }; 1171724ba675SRob Herring 1172724ba675SRob Herring key-power { 1173724ba675SRob Herring label = "Power"; 1174724ba675SRob Herring gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; 1175724ba675SRob Herring linux,code = <KEY_POWER>; 1176724ba675SRob Herring wakeup-source; 1177724ba675SRob Herring }; 1178724ba675SRob Herring 1179724ba675SRob Herring key-volume-down { 1180724ba675SRob Herring label = "Volume Down"; 1181724ba675SRob Herring gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>; 1182724ba675SRob Herring linux,code = <KEY_VOLUMEDOWN>; 1183724ba675SRob Herring }; 1184724ba675SRob Herring 1185724ba675SRob Herring key-volume-up { 1186724ba675SRob Herring label = "Volume Up"; 1187724ba675SRob Herring gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>; 1188724ba675SRob Herring linux,code = <KEY_VOLUMEUP>; 1189724ba675SRob Herring }; 1190724ba675SRob Herring }; 1191724ba675SRob Herring 1192724ba675SRob Herring vdd_ac_bat_reg: regulator-acbat { 1193724ba675SRob Herring compatible = "regulator-fixed"; 1194724ba675SRob Herring regulator-name = "vdd_ac_bat"; 1195724ba675SRob Herring regulator-min-microvolt = <5000000>; 1196724ba675SRob Herring regulator-max-microvolt = <5000000>; 1197724ba675SRob Herring regulator-always-on; 1198724ba675SRob Herring }; 1199724ba675SRob Herring 1200724ba675SRob Herring dvdd_ts_reg: regulator-ts { 1201724ba675SRob Herring compatible = "regulator-fixed"; 1202724ba675SRob Herring regulator-name = "dvdd_ts"; 1203724ba675SRob Herring regulator-min-microvolt = <1800000>; 1204724ba675SRob Herring regulator-max-microvolt = <1800000>; 1205724ba675SRob Herring enable-active-high; 1206724ba675SRob Herring gpio = <&gpio TEGRA_GPIO(H, 5) GPIO_ACTIVE_HIGH>; 1207724ba675SRob Herring }; 1208724ba675SRob Herring 1209724ba675SRob Herring usb1_vbus_reg: regulator-usb1 { 1210724ba675SRob Herring compatible = "regulator-fixed"; 1211724ba675SRob Herring regulator-name = "usb1_vbus"; 1212724ba675SRob Herring regulator-min-microvolt = <5000000>; 1213724ba675SRob Herring regulator-max-microvolt = <5000000>; 1214724ba675SRob Herring enable-active-high; 1215724ba675SRob Herring gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>; 1216724ba675SRob Herring gpio-open-drain; 1217724ba675SRob Herring vin-supply = <&tps65090_dcdc1_reg>; 1218724ba675SRob Herring }; 1219724ba675SRob Herring 1220724ba675SRob Herring usb3_vbus_reg: regulator-usb3 { 1221724ba675SRob Herring compatible = "regulator-fixed"; 1222724ba675SRob Herring regulator-name = "usb2_vbus"; 1223724ba675SRob Herring regulator-min-microvolt = <5000000>; 1224724ba675SRob Herring regulator-max-microvolt = <5000000>; 1225724ba675SRob Herring enable-active-high; 1226724ba675SRob Herring gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; 1227724ba675SRob Herring gpio-open-drain; 1228724ba675SRob Herring vin-supply = <&tps65090_dcdc1_reg>; 1229724ba675SRob Herring }; 1230724ba675SRob Herring 1231724ba675SRob Herring vdd_hdmi_reg: regulator-hdmi { 1232724ba675SRob Herring compatible = "regulator-fixed"; 1233724ba675SRob Herring regulator-name = "vdd_hdmi_5v0"; 1234724ba675SRob Herring regulator-min-microvolt = <5000000>; 1235724ba675SRob Herring regulator-max-microvolt = <5000000>; 1236724ba675SRob Herring vin-supply = <&tps65090_dcdc1_reg>; 1237724ba675SRob Herring }; 1238724ba675SRob Herring 1239724ba675SRob Herring vdd_cam_1v8_reg: regulator-cam { 1240724ba675SRob Herring compatible = "regulator-fixed"; 1241724ba675SRob Herring regulator-name = "vdd_cam_1v8_reg"; 1242724ba675SRob Herring regulator-min-microvolt = <1800000>; 1243724ba675SRob Herring regulator-max-microvolt = <1800000>; 1244724ba675SRob Herring enable-active-high; 1245724ba675SRob Herring gpio = <&palmas_gpio 6 0>; 1246724ba675SRob Herring }; 1247724ba675SRob Herring 1248724ba675SRob Herring vdd_5v0_hdmi: regulator-hdmicon { 1249724ba675SRob Herring compatible = "regulator-fixed"; 1250724ba675SRob Herring regulator-name = "VDD_5V0_HDMI_CON"; 1251724ba675SRob Herring regulator-min-microvolt = <5000000>; 1252724ba675SRob Herring regulator-max-microvolt = <5000000>; 1253724ba675SRob Herring gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; 1254724ba675SRob Herring enable-active-high; 1255724ba675SRob Herring vin-supply = <&tps65090_dcdc1_reg>; 1256724ba675SRob Herring }; 1257724ba675SRob Herring 1258724ba675SRob Herring sound { 1259724ba675SRob Herring compatible = "nvidia,tegra-audio-rt5640-dalmore", 1260724ba675SRob Herring "nvidia,tegra-audio-rt5640"; 1261724ba675SRob Herring nvidia,model = "NVIDIA Tegra Dalmore"; 1262724ba675SRob Herring 1263724ba675SRob Herring nvidia,audio-routing = 1264724ba675SRob Herring "Headphones", "HPOR", 1265724ba675SRob Herring "Headphones", "HPOL", 1266724ba675SRob Herring "Speakers", "SPORP", 1267724ba675SRob Herring "Speakers", "SPORN", 1268724ba675SRob Herring "Speakers", "SPOLP", 1269724ba675SRob Herring "Speakers", "SPOLN", 1270724ba675SRob Herring "Mic Jack", "MICBIAS1", 1271724ba675SRob Herring "IN2P", "Mic Jack"; 1272724ba675SRob Herring 1273724ba675SRob Herring nvidia,i2s-controller = <&tegra_i2s1>; 1274724ba675SRob Herring nvidia,audio-codec = <&rt5640>; 1275724ba675SRob Herring 1276724ba675SRob Herring nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>; 1277724ba675SRob Herring 1278724ba675SRob Herring clocks = <&tegra_car TEGRA114_CLK_PLL_A>, 1279724ba675SRob Herring <&tegra_car TEGRA114_CLK_PLL_A_OUT0>, 1280724ba675SRob Herring <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1281724ba675SRob Herring clock-names = "pll_a", "pll_a_out0", "mclk"; 1282724ba675SRob Herring 1283724ba675SRob Herring assigned-clocks = <&tegra_car TEGRA114_CLK_EXTERN1>, 1284724ba675SRob Herring <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1285724ba675SRob Herring 1286724ba675SRob Herring assigned-clock-parents = <&tegra_car TEGRA114_CLK_PLL_A_OUT0>, 1287724ba675SRob Herring <&tegra_car TEGRA114_CLK_EXTERN1>; 1288724ba675SRob Herring }; 1289724ba675SRob Herring}; 1290