xref: /linux/scripts/dtc/include-prefixes/arm/nvidia/tegra114-asus-tf701t.dts (revision 6ca426a0950496193a25df9754d78ab4bfd5e8b7)
1// SPDX-License-Identifier: GPL-2.0
2
3/dts-v1/;
4
5#include <dt-bindings/input/gpio-keys.h>
6#include <dt-bindings/input/input.h>
7
8#include "tegra114.dtsi"
9
10/ {
11	model = "Asus Transformer Pad TF701T";
12	compatible = "asus,tf701t", "nvidia,tegra114";
13	chassis-type = "convertible";
14
15	aliases {
16		mmc0 = "/mmc@78000600"; /* eMMC */
17		mmc1 = "/mmc@78000400"; /* uSD slot */
18		mmc2 = "/mmc@78000000"; /* WiFi */
19
20		rtc0 = &palmas;
21		rtc1 = "/rtc@7000e000";
22
23		serial0 = &uartd; /* Console */
24		serial1 = &uartc; /* Bluetooth */
25		serial2 = &uartb; /* GPS */
26	};
27
28	firmware {
29		trusted-foundations {
30			compatible = "tlm,trusted-foundations";
31			tlm,version-major = <2>;
32			tlm,version-minor = <8>;
33		};
34	};
35
36	memory@80000000 {
37		reg = <0x80000000 0x80000000>;
38	};
39
40	reserved-memory {
41		#address-cells = <1>;
42		#size-cells = <1>;
43		ranges;
44
45		linux,cma@80000000 {
46			compatible = "shared-dma-pool";
47			alloc-ranges = <0x80000000 0x30000000>;
48			size = <0x10000000>;
49			linux,cma-default;
50			reusable;
51		};
52
53		trustzone@bfe00000 {
54			reg = <0xbfe00000 0x200000>;
55			no-map;
56		};
57	};
58
59	host1x@50000000 {
60		hdmi@54280000 {
61			status = "okay";
62
63			hdmi-supply = <&hdmi_5v0_sys>;
64			pll-supply = <&avdd_hdmi_pll>;
65			vdd-supply = <&avdd_hdmi>;
66
67			port {
68				hdmi_out: endpoint {
69					remote-endpoint = <&connector_in>;
70				};
71			};
72		};
73
74		dsi@54300000 {
75			status = "okay";
76
77			avdd-dsi-csi-supply = <&avdd_dsi_csi>;
78
79			nvidia,ganged-mode = <&dsib>;
80
81			panel_primary: panel@0 {
82				compatible = "sharp,lq101r1sx01";
83				reg = <0>;
84
85				link2 = <&panel_secondary>;
86
87				power-supply = <&dvdd_1v8_lcd>;
88				backlight = <&backlight>;
89			};
90		};
91
92		dsi@54400000 {
93			status = "okay";
94
95			avdd-dsi-csi-supply = <&avdd_dsi_csi>;
96
97			panel_secondary: panel@0 {
98				compatible = "sharp,lq101r1sx01";
99				reg = <0>;
100			};
101		};
102	};
103
104	vde@6001a000 {
105		assigned-clocks = <&tegra_car TEGRA114_CLK_VDE>;
106		assigned-clock-parents = <&tegra_car TEGRA114_CLK_PLL_P>;
107		assigned-clock-rates = <408000000>;
108	};
109
110	pinmux@70000868 {
111		pinctrl-names = "default";
112		pinctrl-0 = <&state_default>;
113
114		state_default: pinmux {
115			/* WLAN SDIO pinmux */
116			sdmmc1-clk {
117				nvidia,pins = "sdmmc1_clk_pz0";
118				nvidia,function = "sdmmc1";
119				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
120				nvidia,tristate = <TEGRA_PIN_DISABLE>;
121				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
122			};
123
124			sdmmc1-cmd {
125				nvidia,pins = "sdmmc1_cmd_pz1",
126					      "sdmmc1_dat0_py7",
127					      "sdmmc1_dat1_py6",
128					      "sdmmc1_dat2_py5",
129					      "sdmmc1_dat3_py4";
130				nvidia,function = "sdmmc1";
131				nvidia,pull = <TEGRA_PIN_PULL_UP>;
132				nvidia,tristate = <TEGRA_PIN_DISABLE>;
133				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
134			};
135
136			wlan-power {
137				nvidia,pins = "clk2_req_pcc5";
138				nvidia,function = "rsvd2";
139				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
140				nvidia,tristate = <TEGRA_PIN_DISABLE>;
141				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
142			};
143
144			wlan-reset {
145				nvidia,pins = "gpio_x7_aud_px7";
146				nvidia,function = "rsvd1";
147				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
148				nvidia,tristate = <TEGRA_PIN_DISABLE>;
149				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
150			};
151
152			wlan-host-wake {
153				nvidia,pins = "pu5";
154				nvidia,function = "pwm2";
155				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
156				nvidia,tristate = <TEGRA_PIN_DISABLE>;
157				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
158			};
159
160			wlan-3v3-com {
161				nvidia,pins = "pu1";
162				nvidia,function = "rsvd1";
163				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
164				nvidia,tristate = <TEGRA_PIN_DISABLE>;
165				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
166			};
167
168			/* UART-A pinmux */
169			uarta-cts {
170				nvidia,pins = "kb_row10_ps2";
171				nvidia,function = "uarta";
172				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
173				nvidia,tristate = <TEGRA_PIN_DISABLE>;
174				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
175			};
176
177			uarta-rts {
178				nvidia,pins = "kb_row9_ps1";
179				nvidia,function = "uarta";
180				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
181				nvidia,tristate = <TEGRA_PIN_DISABLE>;
182				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
183			};
184
185			/* GNSS UART-B pinmux */
186			uartb-cts {
187				nvidia,pins = "uart2_cts_n_pj5";
188				nvidia,function = "uartb";
189				nvidia,pull = <TEGRA_PIN_PULL_UP>;
190				nvidia,tristate = <TEGRA_PIN_DISABLE>;
191				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
192			};
193
194			uartb-rts {
195				nvidia,pins = "uart2_rts_n_pj6";
196				nvidia,function = "uartb";
197				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
198				nvidia,tristate = <TEGRA_PIN_DISABLE>;
199				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
200			};
201
202			uartb-rxd {
203				nvidia,pins = "uart2_rxd_pc3";
204				nvidia,function = "irda";
205				nvidia,pull = <TEGRA_PIN_PULL_UP>;
206				nvidia,tristate = <TEGRA_PIN_DISABLE>;
207				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
208			};
209
210			uartb-txd {
211				nvidia,pins = "uart2_txd_pc2";
212				nvidia,function = "irda";
213				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
214				nvidia,tristate = <TEGRA_PIN_DISABLE>;
215				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
216			};
217
218			/* Bluetooth UART-C pinmux */
219			uartc-cts-rxd {
220				nvidia,pins = "uart3_cts_n_pa1",
221					      "uart3_rxd_pw7";
222				nvidia,function = "uartc";
223				nvidia,pull = <TEGRA_PIN_PULL_UP>;
224				nvidia,tristate = <TEGRA_PIN_DISABLE>;
225				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
226			};
227
228			uartc-rts-txd {
229				nvidia,pins = "uart3_rts_n_pc0",
230					      "uart3_txd_pw6";
231				nvidia,function = "uartc";
232				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
233				nvidia,tristate = <TEGRA_PIN_DISABLE>;
234				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
235			};
236
237			bt-shutdown {
238				nvidia,pins = "kb_col6_pq6",
239					      "kb_col7_pq7";
240				nvidia,function = "rsvd2";
241				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
242				nvidia,tristate = <TEGRA_PIN_DISABLE>;
243				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
244			};
245
246			bt-dev-wake {
247				nvidia,pins = "clk3_req_pee1";
248				nvidia,function = "rsvd2";
249				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
250				nvidia,tristate = <TEGRA_PIN_DISABLE>;
251				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
252			};
253
254			bt-host-wake {
255				nvidia,pins = "pu6";
256				nvidia,function = "pwm3";
257				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
258				nvidia,tristate = <TEGRA_PIN_DISABLE>;
259				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
260			};
261
262			bt-pcm-dap4-out {
263				nvidia,pins = "dap4_fs_pp4",
264					      "dap4_dout_pp6",
265					      "dap4_sclk_pp7";
266				nvidia,function = "i2s3";
267				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
268				nvidia,tristate = <TEGRA_PIN_DISABLE>;
269				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
270			};
271
272			bt-pcm-dap4-in {
273				nvidia,pins = "dap4_din_pp5";
274				nvidia,function = "i2s3";
275				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
276				nvidia,tristate = <TEGRA_PIN_DISABLE>;
277				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
278			};
279
280			/* UART-D pinmux */
281			uartd-cts {
282				nvidia,pins = "gmi_a17_pb0";
283				nvidia,function = "uartd";
284				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
285				nvidia,tristate = <TEGRA_PIN_DISABLE>;
286				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
287			};
288
289			uartd-rts {
290				nvidia,pins = "gmi_a16_pj7",
291					      "gmi_a19_pk7";
292				nvidia,function = "uartd";
293				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
294				nvidia,tristate = <TEGRA_PIN_DISABLE>;
295				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
296			};
297
298			/* MicroSD pinmux */
299			sdmmc3-clk {
300				nvidia,pins = "sdmmc3_clk_pa6";
301				nvidia,function = "sdmmc3";
302				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
303				nvidia,tristate = <TEGRA_PIN_DISABLE>;
304				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
305			};
306
307			sdmmc3-data {
308				nvidia,pins = "sdmmc3_cmd_pa7",
309					      "sdmmc3_dat0_pb7",
310					      "sdmmc3_dat1_pb6",
311					      "sdmmc3_dat2_pb5",
312					      "sdmmc3_dat3_pb4",
313					      "kb_col4_pq4",
314					      "sdmmc3_cd_n_pv2",
315					      "sdmmc3_clk_lb_out_pee4",
316					      "sdmmc3_clk_lb_in_pee5";
317				nvidia,function = "sdmmc3";
318				nvidia,pull = <TEGRA_PIN_PULL_UP>;
319				nvidia,tristate = <TEGRA_PIN_DISABLE>;
320				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
321			};
322
323			microsd-pwr {
324				nvidia,pins = "gmi_clk_pk1";
325				nvidia,function = "gmi";
326				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
327				nvidia,tristate = <TEGRA_PIN_DISABLE>;
328				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
329			};
330
331			/* EMMC pinmux */
332			sdmmc4-clk-cmd {
333				nvidia,pins = "sdmmc4_clk_pcc4";
334				nvidia,function = "sdmmc4";
335				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
336				nvidia,tristate = <TEGRA_PIN_DISABLE>;
337				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
338			};
339
340			sdmmc4-data {
341				nvidia,pins = "sdmmc4_cmd_pt7",
342					      "sdmmc4_dat0_paa0",
343					      "sdmmc4_dat1_paa1",
344					      "sdmmc4_dat2_paa2",
345					      "sdmmc4_dat3_paa3",
346					      "sdmmc4_dat4_paa4",
347					      "sdmmc4_dat5_paa5",
348					      "sdmmc4_dat6_paa6",
349					      "sdmmc4_dat7_paa7";
350				nvidia,function = "sdmmc4";
351				nvidia,pull = <TEGRA_PIN_PULL_UP>;
352				nvidia,tristate = <TEGRA_PIN_DISABLE>;
353				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
354			};
355
356			/* I2C pinmux */
357			gen1-i2c {
358				nvidia,pins = "gen1_i2c_scl_pc4",
359					      "gen1_i2c_sda_pc5";
360				nvidia,function = "i2c1";
361				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
362				nvidia,tristate = <TEGRA_PIN_DISABLE>;
363				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
364				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
365				nvidia,lock = <TEGRA_PIN_DISABLE>;
366			};
367
368			gen2-i2c {
369				nvidia,pins = "gen2_i2c_scl_pt5",
370					      "gen2_i2c_sda_pt6";
371				nvidia,function = "i2c2";
372				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
373				nvidia,tristate = <TEGRA_PIN_DISABLE>;
374				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
375				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
376				nvidia,lock = <TEGRA_PIN_DISABLE>;
377			};
378
379			cam-i2c {
380				nvidia,pins = "cam_i2c_scl_pbb1",
381					      "cam_i2c_sda_pbb2";
382				nvidia,function = "i2c3";
383				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
384				nvidia,tristate = <TEGRA_PIN_DISABLE>;
385				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
386				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
387				nvidia,lock = <TEGRA_PIN_DISABLE>;
388			};
389
390			ddc-i2c {
391				nvidia,pins = "ddc_scl_pv4",
392					      "ddc_sda_pv5";
393				nvidia,function = "i2c4";
394				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
395				nvidia,tristate = <TEGRA_PIN_DISABLE>;
396				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
397				nvidia,lock = <TEGRA_PIN_DISABLE>;
398			};
399
400			pwr-i2c {
401				nvidia,pins = "pwr_i2c_scl_pz6",
402					      "pwr_i2c_sda_pz7";
403				nvidia,function = "i2cpwr";
404				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
405				nvidia,tristate = <TEGRA_PIN_DISABLE>;
406				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
407				nvidia,open-drain = <TEGRA_PIN_ENABLE>;
408				nvidia,lock = <TEGRA_PIN_DISABLE>;
409			};
410
411			/* SPI pinmux */
412			spi1-out {
413				nvidia,pins = "ulpi_clk_py0",
414					      "ulpi_nxt_py2",
415					      "ulpi_stp_py3";
416				nvidia,function = "spi1";
417				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
418				nvidia,tristate = <TEGRA_PIN_DISABLE>;
419				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
420			};
421
422			spi1-in {
423				nvidia,pins = "ulpi_dir_py1";
424				nvidia,function = "spi1";
425				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
426				nvidia,tristate = <TEGRA_PIN_DISABLE>;
427				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
428			};
429
430			spi2 {
431				nvidia,pins = "ulpi_data4_po5",
432					      "ulpi_data7_po0";
433				nvidia,function = "spi2";
434				nvidia,pull = <TEGRA_PIN_PULL_UP>;
435				nvidia,tristate = <TEGRA_PIN_DISABLE>;
436				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
437			};
438
439			spi4-out {
440				nvidia,pins = "gmi_ad6_pg6",
441					      "gmi_wr_n_pi0";
442				nvidia,function = "spi4";
443				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
444				nvidia,tristate = <TEGRA_PIN_DISABLE>;
445				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
446			};
447
448			spi4-in {
449				nvidia,pins = "gmi_ad5_pg5",
450					      "gmi_ad7_pg7";
451				nvidia,function = "spi4";
452				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
453				nvidia,tristate = <TEGRA_PIN_DISABLE>;
454				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
455			};
456
457			/* GPIO keys pinmux */
458			hall-switch {
459				nvidia,pins = "ulpi_data4_po5";
460				nvidia,function = "spi2";
461				nvidia,pull = <TEGRA_PIN_PULL_UP>;
462				nvidia,tristate = <TEGRA_PIN_DISABLE>;
463				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
464			};
465
466			lineout-switch {
467				nvidia,pins = "gpio_x5_aud_px5";
468				nvidia,function = "rsvd1";
469				nvidia,pull = <TEGRA_PIN_PULL_UP>;
470				nvidia,tristate = <TEGRA_PIN_DISABLE>;
471				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
472			};
473
474			power-key {
475				nvidia,pins = "kb_col0_pq0";
476				nvidia,function = "kbc";
477				nvidia,pull = <TEGRA_PIN_PULL_UP>;
478				nvidia,tristate = <TEGRA_PIN_ENABLE>;
479				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
480			};
481
482			volume-keys {
483				nvidia,pins = "kb_row1_pr1",
484					      "kb_row2_pr2";
485				nvidia,function = "rsvd2";
486				nvidia,pull = <TEGRA_PIN_PULL_UP>;
487				nvidia,tristate = <TEGRA_PIN_ENABLE>;
488				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
489			};
490
491			/* Sensors pinmux */
492			nct-irq {
493				nvidia,pins = "ulpi_data3_po4";
494				nvidia,function = "ulpi";
495				nvidia,pull = <TEGRA_PIN_PULL_UP>;
496				nvidia,tristate = <TEGRA_PIN_DISABLE>;
497				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
498			};
499
500			mpu-irq {
501				nvidia,pins = "kb_row3_pr3";
502				nvidia,function = "rsvd3";
503				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
504				nvidia,tristate = <TEGRA_PIN_DISABLE>;
505				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
506			};
507
508			/* HDMI pinmux */
509			hdmi-hpd {
510				nvidia,pins = "hdmi_int_pn7";
511				nvidia,function = "rsvd1";
512				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
513				nvidia,tristate = <TEGRA_PIN_DISABLE>;
514				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
515			};
516
517			hdmi-en {
518				nvidia,pins = "dap3_dout_pp2";
519				nvidia,function = "i2s2";
520				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
521				nvidia,tristate = <TEGRA_PIN_DISABLE>;
522				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
523			};
524
525			hdmi-cec {
526				nvidia,pins = "hdmi_cec_pee3";
527				nvidia,function = "cec";
528				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
529				nvidia,tristate = <TEGRA_PIN_DISABLE>;
530				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
531			};
532
533			/* LED pinmux */
534			backlight-pwm {
535				nvidia,pins = "gmi_ad9_ph1";
536				nvidia,function = "pwm1";
537				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
538				nvidia,tristate = <TEGRA_PIN_DISABLE>;
539				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
540			};
541
542			backlight-en {
543				nvidia,pins = "gmi_ad10_ph2";
544				nvidia,function = "gmi";
545				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
546				nvidia,tristate = <TEGRA_PIN_DISABLE>;
547				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
548			};
549
550			/* Touchscreen pinmux */
551			touch-irq {
552				nvidia,pins = "gmi_cs4_n_pk2";
553				nvidia,function = "gmi";
554				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
555				nvidia,tristate = <TEGRA_PIN_DISABLE>;
556				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
557			};
558
559			touch-rst {
560				nvidia,pins = "gmi_cs3_n_pk4";
561				nvidia,function = "gmi";
562				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
563				nvidia,tristate = <TEGRA_PIN_DISABLE>;
564				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
565			};
566
567			touch-pwr {
568				nvidia,pins = "gmi_ad8_ph0";
569				nvidia,function = "gmi";
570				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
571				nvidia,tristate = <TEGRA_PIN_DISABLE>;
572				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
573			};
574
575			touch-vio {
576				nvidia,pins = "gmi_ad12_ph4";
577				nvidia,function = "rsvd4";
578				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
579				nvidia,tristate = <TEGRA_PIN_DISABLE>;
580				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
581			};
582
583			/* AUDIO pinmux */
584			audio-ldo1 {
585				nvidia,pins = "sdmmc1_wp_n_pv3";
586				nvidia,function = "sdmmc1";
587				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
588				nvidia,tristate = <TEGRA_PIN_DISABLE>;
589				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
590			};
591
592			hp-detect {
593				nvidia,pins = "kb_row7_pr7";
594				nvidia,function = "rsvd2";
595				nvidia,pull = <TEGRA_PIN_PULL_UP>;
596				nvidia,tristate = <TEGRA_PIN_DISABLE>;
597				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
598			};
599
600			dap-i2s0-in {
601				nvidia,pins = "dap1_din_pn1";
602				nvidia,function = "i2s0";
603				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
604				nvidia,tristate = <TEGRA_PIN_DISABLE>;
605				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
606			};
607
608			dap-i2s0-out {
609				nvidia,pins = "dap1_dout_pn2",
610					      "dap1_fs_pn0",
611					      "dap1_sclk_pn3";
612				nvidia,function = "i2s0";
613				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
614				nvidia,tristate = <TEGRA_PIN_DISABLE>;
615				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
616			};
617
618			dap-i2s1-in {
619				nvidia,pins = "dap2_din_pa4";
620				nvidia,function = "i2s1";
621				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
622				nvidia,tristate = <TEGRA_PIN_DISABLE>;
623				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
624			};
625
626			dap-i2s1-out {
627				nvidia,pins = "dap2_dout_pa5",
628					      "dap2_fs_pa2",
629					      "dap2_sclk_pa3";
630				nvidia,function = "i2s1";
631				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
632				nvidia,tristate = <TEGRA_PIN_DISABLE>;
633				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
634			};
635
636			dap-i2s2-in {
637				nvidia,pins = "dap3_fs_pp0",
638					      "dap3_sclk_pp3";
639				nvidia,function = "i2s2";
640				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
641				nvidia,tristate = <TEGRA_PIN_ENABLE>;
642				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
643			};
644
645			dap-i2s2-out {
646				nvidia,pins = "dap3_din_pp1";
647				nvidia,function = "i2s2";
648				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
649				nvidia,tristate = <TEGRA_PIN_DISABLE>;
650				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
651			};
652
653			spdif-in {
654				nvidia,pins = "spdif_in_pk6";
655				nvidia,function = "rsvd3";
656				nvidia,pull = <TEGRA_PIN_PULL_UP>;
657				nvidia,tristate = <TEGRA_PIN_DISABLE>;
658				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
659			};
660
661			spdif-out {
662				nvidia,pins = "spdif_out_pk5";
663				nvidia,function = "rsvd2";
664				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
665				nvidia,tristate = <TEGRA_PIN_ENABLE>;
666				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
667			};
668
669			/* AsusEC pinmux */
670			ec-irq {
671				nvidia,pins = "kb_col5_pq5";
672				nvidia,function = "kbc";
673				nvidia,pull = <TEGRA_PIN_PULL_UP>;
674				nvidia,tristate = <TEGRA_PIN_DISABLE>;
675				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
676			};
677
678			ec-req {
679				nvidia,pins = "kb_col2_pq2";
680				nvidia,function = "kbc";
681				nvidia,pull = <TEGRA_PIN_PULL_UP>;
682				nvidia,tristate = <TEGRA_PIN_DISABLE>;
683				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
684			};
685
686			hotplug-i2c {
687				nvidia,pins = "ulpi_data7_po0";
688				nvidia,function = "spi2";
689				nvidia,pull = <TEGRA_PIN_PULL_UP>;
690				nvidia,tristate = <TEGRA_PIN_DISABLE>;
691				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
692			};
693
694			ps2-irq {
695				nvidia,pins = "gpio_w2_aud_pw2";
696				nvidia,function = "spi6";
697				nvidia,pull = <TEGRA_PIN_PULL_UP>;
698				nvidia,tristate = <TEGRA_PIN_DISABLE>;
699				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
700			};
701
702			kbd-irq {
703				nvidia,pins = "gmi_cs0_n_pj0";
704				nvidia,function = "rsvd1";
705				nvidia,pull = <TEGRA_PIN_PULL_UP>;
706				nvidia,tristate = <TEGRA_PIN_DISABLE>;
707				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
708			};
709
710			dvfs-pin {
711				nvidia,pins = "dvfs_pwm_px0",
712					      "dvfs_clk_px2";
713				nvidia,function = "cldvfs";
714				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
715				nvidia,tristate = <TEGRA_PIN_DISABLE>;
716				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
717			};
718
719			/* Core pinmux */
720			clk-32k-out {
721				nvidia,pins = "clk_32k_out_pa0";
722				nvidia,function = "soc";
723				nvidia,pull = <TEGRA_PIN_PULL_UP>;
724				nvidia,tristate = <TEGRA_PIN_DISABLE>;
725				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
726			};
727
728			sys-clk-req {
729				nvidia,pins = "sys_clk_req_pz5";
730				nvidia,function = "sysclk";
731				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
732				nvidia,tristate = <TEGRA_PIN_DISABLE>;
733				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
734			};
735
736			core-pwr-req {
737				nvidia,pins = "core_pwr_req";
738				nvidia,function = "pwron";
739				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
740				nvidia,tristate = <TEGRA_PIN_DISABLE>;
741				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
742			};
743
744			cpu-pwr-req {
745				nvidia,pins = "cpu_pwr_req";
746				nvidia,function = "cpu";
747				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
748				nvidia,tristate = <TEGRA_PIN_DISABLE>;
749				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
750			};
751
752			pwr-int-n {
753				nvidia,pins = "pwr_int_n";
754				nvidia,function = "pmi";
755				nvidia,pull = <TEGRA_PIN_PULL_UP>;
756				nvidia,tristate = <TEGRA_PIN_DISABLE>;
757				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
758			};
759
760			clk-32k-in {
761				nvidia,pins = "clk_32k_in";
762				nvidia,function = "clk";
763				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
764				nvidia,tristate = <TEGRA_PIN_DISABLE>;
765				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
766			};
767
768			owr {
769				nvidia,pins = "owr";
770				nvidia,function = "rsvd2";
771				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
772				nvidia,tristate = <TEGRA_PIN_ENABLE>;
773				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
774			};
775
776			reset-out-n {
777				nvidia,pins = "reset_out_n";
778				nvidia,function = "reset_out_n";
779				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
780				nvidia,tristate = <TEGRA_PIN_DISABLE>;
781				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
782			};
783
784			/* ULPI pinmux */
785			ulpi-data0-6 {
786				nvidia,pins = "ulpi_data0_po1",
787					      "ulpi_data6_po7";
788				nvidia,function = "ulpi";
789				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
790				nvidia,tristate = <TEGRA_PIN_DISABLE>;
791				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
792			};
793
794			ulpi-data1-5 {
795				nvidia,pins = "ulpi_data1_po2",
796					      "ulpi_data5_po6";
797				nvidia,function = "ulpi";
798				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
799				nvidia,tristate = <TEGRA_PIN_ENABLE>;
800				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
801			};
802
803			ulpi-data2-3 {
804				nvidia,pins = "ulpi_data2_po3",
805					      "ulpi_data3_po4";
806				nvidia,function = "ulpi";
807				nvidia,pull = <TEGRA_PIN_PULL_UP>;
808				nvidia,tristate = <TEGRA_PIN_DISABLE>;
809				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
810			};
811
812			/* PORT V */
813			pv0-gpio {
814				nvidia,pins = "pv0";
815				nvidia,function = "rsvd2";
816				nvidia,pull = <TEGRA_PIN_PULL_UP>;
817				nvidia,tristate = <TEGRA_PIN_DISABLE>;
818				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
819			};
820
821			pv1-gpio {
822				nvidia,pins = "pv1";
823				nvidia,function = "rsvd1";
824				nvidia,pull = <TEGRA_PIN_PULL_UP>;
825				nvidia,tristate = <TEGRA_PIN_DISABLE>;
826				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
827			};
828
829			/* PORT U */
830			pu0-gpio {
831				nvidia,pins = "pu0";
832				nvidia,function = "rsvd3";
833				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
834				nvidia,tristate = <TEGRA_PIN_DISABLE>;
835				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
836			};
837
838			pu2-gpio {
839				nvidia,pins = "pu2";
840				nvidia,function = "rsvd1";
841				nvidia,pull = <TEGRA_PIN_PULL_UP>;
842				nvidia,tristate = <TEGRA_PIN_DISABLE>;
843				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
844			};
845
846			/* PWM pinmux */
847			pwm0 {
848				nvidia,pins = "pu3";
849				nvidia,function = "pwm0";
850				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
851				nvidia,tristate = <TEGRA_PIN_DISABLE>;
852				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
853			};
854
855			pwm1 {
856				nvidia,pins = "pu4";
857				nvidia,function = "pwm1";
858				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
859				nvidia,tristate = <TEGRA_PIN_DISABLE>;
860				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
861			};
862
863			/* EXTPERIPH pinmux */
864			clk1-out {
865				nvidia,pins = "clk1_out_pw4";
866				nvidia,function = "extperiph1";
867				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
868				nvidia,tristate = <TEGRA_PIN_DISABLE>;
869				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
870			};
871
872			clk2-out {
873				nvidia,pins = "clk2_out_pw5";
874				nvidia,function = "extperiph2";
875				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
876				nvidia,tristate = <TEGRA_PIN_DISABLE>;
877				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
878			};
879
880			clk3-out {
881				nvidia,pins = "clk3_out_pee0";
882				nvidia,function = "extperiph3";
883				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
884				nvidia,tristate = <TEGRA_PIN_DISABLE>;
885				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
886			};
887
888			clk1-req {
889				nvidia,pins = "clk1_req_pee2";
890				nvidia,function = "rsvd3";
891				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
892				nvidia,tristate = <TEGRA_PIN_ENABLE>;
893				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
894			};
895
896			/* GMI pinmux */
897			gmi-wp-n {
898				nvidia,pins = "gmi_wp_n_pc7";
899				nvidia,function = "rsvd1";
900				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
901				nvidia,tristate = <TEGRA_PIN_ENABLE>;
902				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
903			};
904
905			gmi-adv {
906				nvidia,pins = "gmi_adv_n_pk0";
907				nvidia,function = "rsvd1";
908				nvidia,pull = <TEGRA_PIN_PULL_UP>;
909				nvidia,tristate = <TEGRA_PIN_DISABLE>;
910				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
911			};
912
913			gmi-ad0-ad1 {
914				nvidia,pins = "gmi_ad0_pg0",
915					      "gmi_ad1_pg1";
916				nvidia,function = "rsvd1";
917				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
918				nvidia,tristate = <TEGRA_PIN_DISABLE>;
919				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
920			};
921
922			gmi-ad2-ad3 {
923				nvidia,pins = "gmi_ad2_pg2",
924					      "gmi_ad3_pg3";
925				nvidia,function = "rsvd1";
926				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
927				nvidia,tristate = <TEGRA_PIN_DISABLE>;
928				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
929			};
930
931			gmi-iordy {
932				nvidia,pins = "gmi_iordy_pi5";
933				nvidia,function = "rsvd2";
934				nvidia,pull = <TEGRA_PIN_PULL_UP>;
935				nvidia,tristate = <TEGRA_PIN_DISABLE>;
936				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
937			};
938
939			gmi-a18 {
940				nvidia,pins = "gmi_a18_pb1";
941				nvidia,function = "rsvd2";
942				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
943				nvidia,tristate = <TEGRA_PIN_ENABLE>;
944				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
945			};
946
947			gmi-wait {
948				nvidia,pins = "gmi_wait_pi7";
949				nvidia,function = "nand";
950				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
951				nvidia,tristate = <TEGRA_PIN_DISABLE>;
952				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
953			};
954
955			gmi-cs6-n {
956				nvidia,pins = "gmi_cs6_n_pi3";
957				nvidia,function = "nand";
958				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
959				nvidia,tristate = <TEGRA_PIN_ENABLE>;
960				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
961			};
962
963			gmi-cs7-n {
964				nvidia,pins = "gmi_cs7_n_pi6";
965				nvidia,function = "nand";
966				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
967				nvidia,tristate = <TEGRA_PIN_DISABLE>;
968				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
969			};
970
971			gmi-dqs-p {
972				nvidia,pins = "gmi_dqs_p_pj3";
973				nvidia,function = "nand";
974				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
975				nvidia,tristate = <TEGRA_PIN_ENABLE>;
976				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
977			};
978
979			gmi-cs2-ad {
980				nvidia,pins = "gmi_cs2_n_pk3",
981					      "gmi_ad14_ph6",
982					      "gmi_ad15_ph7";
983				nvidia,function = "gmi";
984				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
985				nvidia,tristate = <TEGRA_PIN_ENABLE>;
986				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
987			};
988
989			gmi-cs4-clk {
990				nvidia,pins = "gmi_cs4_n_pk2",
991					      "gmi_clk_lb";
992				nvidia,function = "gmi";
993				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
994				nvidia,tristate = <TEGRA_PIN_DISABLE>;
995				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
996			};
997
998			gmi-ad11 {
999				nvidia,pins = "gmi_ad11_ph3";
1000				nvidia,function = "gmi";
1001				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1002				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1003				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1004			};
1005
1006			gmi-cs1-oe {
1007				nvidia,pins = "gmi_cs1_n_pj2",
1008					      "gmi_oe_n_pi1";
1009				nvidia,function = "soc";
1010				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1011				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1012				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1013			};
1014
1015			gmi-ad4 {
1016				nvidia,pins = "gmi_ad4_pg4";
1017				nvidia,function = "rsvd4";
1018				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1019				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1020				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1021			};
1022
1023			gmi-ad13 {
1024				nvidia,pins = "gmi_ad13_ph5";
1025				nvidia,function = "rsvd4";
1026				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1027				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1028				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1029			};
1030
1031			gmi-rst-n {
1032				nvidia,pins = "gmi_rst_n_pi4";
1033				nvidia,function = "rsvd4";
1034				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1035				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1036				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1037			};
1038
1039			/* PORT CC */
1040			pcc-gpio {
1041				nvidia,pins = "pcc1", "pcc2";
1042				nvidia,function = "rsvd2";
1043				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1044				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1045				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1046			};
1047
1048			/* PORT BB */
1049			pbb3-gpio {
1050				nvidia,pins = "pbb3";
1051				nvidia,function = "rsvd4";
1052				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1053				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1054				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1055			};
1056
1057			pbb4-5-6-gpio {
1058				nvidia,pins = "pbb4", "pbb5", "pbb6";
1059				nvidia,function = "rsvd4";
1060				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1061				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1062				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1063			};
1064
1065			pbb7-gpio {
1066				nvidia,pins = "pbb7";
1067				nvidia,function = "rsvd2";
1068				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1069				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1070				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1071			};
1072
1073			/* KBC pinmux */
1074			kb-r0-c1 {
1075				nvidia,pins = "kb_row0_pr0",
1076					      "kb_col1_pq1";
1077				nvidia,function = "rsvd2";
1078				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1079				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1080				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1081			};
1082
1083			kb-row4 {
1084				nvidia,pins = "kb_row4_pr4";
1085				nvidia,function = "kbc";
1086				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1087				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1088				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1089			};
1090
1091			kb-row5 {
1092				nvidia,pins = "kb_row5_pr5";
1093				nvidia,function = "kbc";
1094				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1095				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1096				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1097			};
1098
1099			kb-row6 {
1100				nvidia,pins = "kb_row6_pr6";
1101				nvidia,function = "kbc";
1102				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1103				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1104				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1105			};
1106
1107			kb-r8-c3 {
1108				nvidia,pins = "kb_row8_ps0",
1109					      "kb_col3_pq3";
1110				nvidia,function = "kbc";
1111				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1112				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1113				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1114			};
1115
1116			/* VI pinmux */
1117			cam-mclk {
1118				nvidia,pins = "cam_mclk_pcc0",
1119					      "pbb0";
1120				nvidia,function = "vi_alt3";
1121				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1122				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1123				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1124			};
1125
1126			/* AUD pinmux */
1127			gpio-x4-aud {
1128				nvidia,pins = "gpio_x4_aud_px4";
1129				nvidia,function = "rsvd1";
1130				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
1131				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1132				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1133			};
1134
1135			gpio-x1-aud {
1136				nvidia,pins = "gpio_x1_aud_px1";
1137				nvidia,function = "rsvd2";
1138				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1139				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1140				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1141			};
1142
1143			gpio-x3-aud {
1144				nvidia,pins = "gpio_x3_aud_px3";
1145				nvidia,function = "rsvd3";
1146				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1147				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1148				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1149			};
1150
1151			gpio-x6-aud {
1152				nvidia,pins = "gpio_x6_aud_px6";
1153				nvidia,function = "rsvd4";
1154				nvidia,pull = <TEGRA_PIN_PULL_UP>;
1155				nvidia,tristate = <TEGRA_PIN_DISABLE>;
1156				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
1157			};
1158
1159			usb-vbus {
1160				nvidia,pins = "usb_vbus_en0_pn4",
1161					      "usb_vbus_en1_pn5";
1162				nvidia,function = "rsvd2";
1163				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
1164				nvidia,tristate = <TEGRA_PIN_ENABLE>;
1165				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
1166			};
1167
1168			/* GPIO power/drive control */
1169			drive-sdio1 {
1170				nvidia,pins = "drive_sdio1";
1171				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
1172				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
1173				nvidia,pull-down-strength = <36>;
1174				nvidia,pull-up-strength = <20>;
1175				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>;
1176				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>;
1177			};
1178
1179			drive-sdio3 {
1180				nvidia,pins = "drive_sdio3";
1181				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
1182				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
1183				nvidia,pull-down-strength = <22>;
1184				nvidia,pull-up-strength = <36>;
1185				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
1186				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
1187			};
1188
1189			drive-gma {
1190				nvidia,pins = "drive_gma";
1191				nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>;
1192				nvidia,schmitt = <TEGRA_PIN_DISABLE>;
1193				nvidia,pull-down-strength = <2>;
1194				nvidia,pull-up-strength = <2>;
1195				nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>;
1196				nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>;
1197			};
1198		};
1199	};
1200
1201	serial@70006040 {
1202		/* GPS */
1203	};
1204
1205	serial@70006200 {
1206		compatible = "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart";
1207		reset-names = "serial";
1208		/delete-property/ reg-shift;
1209		status = "okay";
1210
1211		nvidia,adjust-baud-rates = <0 9600 100>,
1212					   <9600 115200 200>,
1213					   <1000000 4000000 136>;
1214
1215		bluetooth {
1216			compatible = "brcm,bcm4334-bt";
1217			max-speed = <4000000>;
1218
1219			clocks = <&tegra_pmc TEGRA_PMC_CLK_BLINK>;
1220			clock-names = "txco";
1221
1222			interrupt-parent = <&gpio>;
1223			interrupts = <TEGRA_GPIO(U, 6) IRQ_TYPE_EDGE_RISING>;
1224			interrupt-names = "host-wakeup";
1225
1226			device-wakeup-gpios = <&gpio TEGRA_GPIO(EE, 1) GPIO_ACTIVE_HIGH>;
1227			shutdown-gpios = <&gpio TEGRA_GPIO(Q, 7) GPIO_ACTIVE_HIGH>;
1228			reset-gpios = <&gpio TEGRA_GPIO(Q, 6) GPIO_ACTIVE_LOW>;
1229
1230			vbat-supply = <&vdd_3v3_com>;
1231			vddio-supply = <&vdd_1v8_vio>;
1232		};
1233	};
1234
1235	serial@70006300 {
1236		/delete-property/ dmas;
1237		/delete-property/ dma-names;
1238		status = "okay";
1239	};
1240
1241	pwm@7000a000 {
1242		status = "okay";
1243	};
1244
1245	i2c@7000c000 {
1246		status = "okay";
1247		clock-frequency = <100000>;
1248
1249		magnetometer@c {
1250			compatible = "asahi-kasei,ak09911";
1251			reg = <0xc>;
1252
1253			vdd-supply = <&vdd_3v3_sys>;
1254		};
1255
1256		rt5639: audio-codec@1c {
1257			compatible = "realtek,rt5639";
1258			reg = <0x1c>;
1259
1260			interrupt-parent = <&gpio>;
1261			interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>;
1262
1263			realtek,ldo1-en-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>;
1264		};
1265
1266		temp_sensor: temperature-sensor@4c {
1267			compatible = "onnn,nct1008";
1268			reg = <0x4c>;
1269
1270			vcc-supply = <&vdd_3v3_sys>;
1271			#thermal-sensor-cells = <1>;
1272		};
1273
1274		motion-tracker@68 {
1275			compatible = "invensense,mpu6500";
1276			reg = <0x68>;
1277
1278			interrupt-parent = <&gpio>;
1279			interrupts = <TEGRA_GPIO(R, 3) IRQ_TYPE_LEVEL_HIGH>;
1280
1281			mount-matrix =  "0", "-1", "0",
1282					"1",  "0", "0",
1283					"0",  "0", "1";
1284		};
1285	};
1286
1287	i2c@7000c400 {
1288		status = "okay";
1289		clock-frequency = <100000>;
1290
1291		power-sensor@44 {
1292			compatible = "ti,ina230";
1293			reg = <0x44>;
1294		};
1295	};
1296
1297	i2c@7000c500 {
1298		status = "okay";
1299		clock-frequency = <400000>;
1300
1301		light-sensor@1c {
1302			compatible = "dynaimage,al3320a";
1303			reg = <0x1c>;
1304
1305			vdd-supply = <&vdd_3v3_sys>;
1306		};
1307	};
1308
1309	hdmi_ddc: i2c@7000c700 {
1310		status = "okay";
1311		clock-frequency = <10000>;
1312	};
1313
1314	i2c@7000d000 {
1315		status = "okay";
1316		clock-frequency = <400000>;
1317
1318		palmas: pmic@58 {
1319			compatible = "ti,tps65913", "ti,palmas";
1320			reg = <0x58>;
1321			interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
1322
1323			#interrupt-cells = <2>;
1324			interrupt-controller;
1325
1326			ti,system-power-controller;
1327
1328			palmas_gpadc: adc {
1329				compatible = "ti,palmas-gpadc";
1330				interrupts = <18 IRQ_TYPE_NONE>,
1331					     <16 IRQ_TYPE_NONE>,
1332					     <17 IRQ_TYPE_NONE>;
1333
1334				ti,channel0-current-microamp = <5>;
1335				ti,channel3-current-microamp = <400>;
1336				ti,enable-extended-delay;
1337
1338				#io-channel-cells = <1>;
1339			};
1340
1341			palmas_extcon: extcon {
1342				compatible = "ti,palmas-usb-vid";
1343				ti,enable-vbus-detection;
1344				ti,enable-id-detection;
1345			};
1346
1347			palmas_gpio: gpio {
1348				compatible = "ti,palmas-gpio";
1349				gpio-controller;
1350				#gpio-cells = <2>;
1351			};
1352
1353			palmas_clk32kg@0 {
1354				compatible = "ti,palmas-clk32kg";
1355				#clock-cells = <0>;
1356			};
1357
1358			pinmux {
1359				compatible = "ti,tps65913-pinctrl";
1360				ti,palmas-enable-dvfs1;
1361
1362				pinctrl-names = "default";
1363				pinctrl-0 = <&palmas_default>;
1364
1365				palmas_default: pinmux {
1366					pin_gpio0 {
1367						pins = "gpio0";
1368						function = "gpio";
1369					};
1370
1371					pin_gpio1 {
1372						pins = "gpio1";
1373						function = "gpio";
1374					};
1375
1376					pin_gpio2 {
1377						pins = "gpio2";
1378						function = "gpio";
1379					};
1380
1381					pin_gpio3 {
1382						pins = "gpio3";
1383						function = "gpio";
1384					};
1385
1386					pin_gpio4 {
1387						pins = "gpio4";
1388						function = "gpio";
1389					};
1390
1391					pin_gpio5 {
1392						pins = "gpio5";
1393						function = "gpio";
1394					};
1395
1396					pin_gpio6 {
1397						pins = "gpio6";
1398						function = "gpio";
1399					};
1400
1401					pin_gpio7 {
1402						pins = "gpio7";
1403						function = "gpio";
1404					};
1405
1406					pin_powergood {
1407						pins = "powergood";
1408						function = "powergood";
1409					};
1410
1411					pin_vac {
1412						pins = "vac";
1413						function = "vac";
1414					};
1415				};
1416			};
1417
1418			pmic {
1419				compatible = "ti,tps65913-pmic", "ti,palmas-pmic";
1420
1421				ldo1-in-supply = <&vddio_ddr>;
1422				ldo2-in-supply = <&vddio_ddr>;
1423				ldo4-in-supply = <&vdd_1v8_vio>;
1424				ldo5-in-supply = <&vcore_emmc>;
1425				ldo6-in-supply = <&vcore_emmc>;
1426				ldo7-in-supply = <&vcore_emmc>;
1427				ldo9-in-supply = <&vcore_emmc>;
1428				ldoln-in-supply = <&vdd_smps10_out2>;
1429
1430				regulators {
1431					vdd_cpu: smps123 {
1432						regulator-name = "vdd_cpu";
1433						regulator-min-microvolt = <900000>;
1434						regulator-max-microvolt = <1350000>;
1435						regulator-always-on;
1436						regulator-boot-on;
1437						ti,roof-floor = <1>;
1438						ti,mode-sleep = <3>;
1439					};
1440
1441					vdd_core: smps45 {
1442						regulator-name = "vdd_core";
1443						regulator-min-microvolt = <900000>;
1444						regulator-max-microvolt = <1400000>;
1445						regulator-always-on;
1446						regulator-boot-on;
1447						ti,roof-floor = <3>;
1448					};
1449
1450					/* smps6 disabled */
1451
1452					vddio_ddr: smps7 {
1453						regulator-name = "vddio_ddr";
1454						regulator-min-microvolt = <1350000>;
1455						regulator-max-microvolt = <1350000>;
1456						regulator-always-on;
1457						regulator-boot-on;
1458					};
1459
1460					vdd_1v8_vio: smps8 {
1461						regulator-name = "vdd_1v8";
1462						regulator-min-microvolt = <1800000>;
1463						regulator-max-microvolt = <1800000>;
1464						regulator-always-on;
1465						regulator-boot-on;
1466					};
1467
1468					vcore_emmc: smps9 {
1469						regulator-name = "vdd_emmc";
1470						regulator-min-microvolt = <2900000>;
1471						regulator-max-microvolt = <2900000>;
1472						regulator-boot-on;
1473					};
1474
1475					smps10_out1 {
1476						regulator-name = "vd_smps10_out1";
1477						regulator-min-microvolt = <5000000>;
1478						regulator-max-microvolt = <5000000>;
1479						regulator-always-on;
1480						regulator-boot-on;
1481					};
1482
1483					vdd_smps10_out2: smps10_out2 {
1484						regulator-name = "vd_smps10_out2";
1485						regulator-min-microvolt = <5000000>;
1486						regulator-max-microvolt = <5000000>;
1487						regulator-always-on;
1488						regulator-boot-on;
1489					};
1490
1491					avdd_hdmi_pll: ldo1 {
1492						regulator-name = "avdd_hdmi_pll";
1493						regulator-min-microvolt = <1050000>;
1494						regulator-max-microvolt = <1050000>;
1495						regulator-always-on;
1496						regulator-boot-on;
1497						ti,roof-floor = <3>;
1498					};
1499
1500					avdd_dsi_csi: ldo2 {
1501						regulator-name = "avdd_dsi_csi";
1502						regulator-min-microvolt = <1200000>;
1503						regulator-max-microvolt = <1200000>;
1504						regulator-boot-on;
1505					};
1506
1507					ldo3 {
1508						regulator-name = "vpp_fuse";
1509						regulator-min-microvolt = <1800000>;
1510						regulator-max-microvolt = <1800000>;
1511					};
1512
1513					vdd_1v2_cam: ldo4 {
1514						regulator-name = "vdd_1v2_cam";
1515						regulator-min-microvolt = <1200000>;
1516						regulator-max-microvolt = <1200000>;
1517					};
1518
1519					avdd_2v8_cam: ldo5 {
1520						regulator-name = "avdd_cam2";
1521						regulator-min-microvolt = <2800000>;
1522						regulator-max-microvolt = <2800000>;
1523					};
1524
1525					vdd_2v85_sen: ldo6 {
1526						regulator-name = "vdd_dev";
1527						regulator-min-microvolt = <2850000>;
1528						regulator-max-microvolt = <2850000>;
1529					};
1530
1531					avdd_2v8_af: ldo7 {
1532						regulator-name = "avdd_2v8_cam";
1533						regulator-min-microvolt = <2800000>;
1534						regulator-max-microvolt = <2800000>;
1535					};
1536
1537					ldo8 {
1538						regulator-name = "vdd_rtc";
1539						regulator-min-microvolt = <950000>;
1540						regulator-max-microvolt = <950000>;
1541						regulator-always-on;
1542						regulator-boot-on;
1543						ti,enable-ldo8-tracking;
1544					};
1545
1546					vddio_usd: ldo9 {
1547						regulator-name = "vddio_usd";
1548						/* min voltage of 1.8v is not stable */
1549						regulator-min-microvolt = <2900000>;
1550						regulator-max-microvolt = <2900000>;
1551					};
1552
1553					avdd_hdmi: ldoln {
1554						regulator-name = "avdd_hdmi";
1555						regulator-min-microvolt = <3300000>;
1556						regulator-max-microvolt = <3300000>;
1557						regulator-boot-on;
1558					};
1559
1560					avdd_usb: ldousb {
1561						regulator-name = "avdd_usb";
1562						regulator-min-microvolt = <3300000>;
1563						regulator-max-microvolt = <3300000>;
1564						regulator-boot-on;
1565					};
1566				};
1567			};
1568
1569			rtc {
1570				compatible = "ti,palmas-rtc";
1571				interrupt-parent = <&palmas>;
1572				interrupts = <8 IRQ_TYPE_NONE>;
1573			};
1574		};
1575	};
1576
1577	pmc@7000e400 {
1578		status = "okay";
1579		nvidia,suspend-mode = <2>;
1580		nvidia,cpu-pwr-good-time = <300>;
1581		nvidia,cpu-pwr-off-time = <300>;
1582		nvidia,core-pwr-good-time = <641 3845>;
1583		nvidia,core-pwr-off-time = <2000>;
1584		nvidia,core-power-req-active-high;
1585		nvidia,sys-clock-req-active-high;
1586
1587		/* Clear DEV_ON bit in DEV_CTRL register of TPS65913 PMIC  */
1588		i2c-thermtrip {
1589			nvidia,i2c-controller-id = <4>;
1590			nvidia,bus-addr = <0x58>;
1591			nvidia,reg-addr = <0xA0>;
1592			nvidia,reg-data = <0x00>;
1593		};
1594	};
1595
1596	ahub@70080000 {
1597		i2s@70080300 {
1598			status = "okay";
1599		};
1600	};
1601
1602	mmc@78000000 {
1603		/* WiFi */
1604	};
1605
1606	/* MicroSD card */
1607	mmc@78000400 {
1608		status = "okay";
1609
1610		bus-width = <4>;
1611		cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
1612
1613		nvidia,default-tap = <0x3>;
1614		nvidia,default-trim = <0x3>;
1615
1616		vmmc-supply = <&vdd_2v9_usd>;
1617		vqmmc-supply = <&vddio_usd>;
1618	};
1619
1620	mmc@78000600 {
1621		/* eMMC */
1622	};
1623
1624	usb@7d000000 {
1625		compatible = "nvidia,tegra114-udc";
1626		status = "okay";
1627		dr_mode = "peripheral";
1628
1629		/* Peripheral USB via ASUS connector */
1630	};
1631
1632	usb-phy@7d000000 {
1633		status = "okay";
1634	};
1635
1636	usb@7d008000 {
1637		status = "okay";
1638
1639		/* Host USB via dock */
1640	};
1641
1642	usb-phy@7d008000 {
1643		status = "okay";
1644		vbus-supply = <&vdd_5v0_sys>;
1645	};
1646
1647	backlight: backlight {
1648		compatible = "pwm-backlight";
1649
1650		enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1651		power-supply = <&vdd_5v0_sys>;
1652		pwms = <&pwm 1 1000000>;
1653
1654		brightness-levels = <1 255>;
1655		num-interpolated-steps = <254>;
1656		default-brightness-level = <224>;
1657	};
1658
1659	/* PMIC has a built-in 32KHz oscillator which is used by PMC */
1660	clk32k_in: clock-32k {
1661		compatible = "fixed-clock";
1662		#clock-cells = <0>;
1663		clock-frequency = <32768>;
1664		clock-output-names = "pmic-oscillator";
1665	};
1666
1667	connector {
1668		compatible = "hdmi-connector";
1669		type = "d";
1670
1671		hpd-gpios = <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
1672		ddc-i2c-bus = <&hdmi_ddc>;
1673
1674		port {
1675			connector_in: endpoint {
1676				remote-endpoint = <&hdmi_out>;
1677			};
1678		};
1679	};
1680
1681	gpio-hall-sensor {
1682		compatible = "gpio-keys";
1683
1684		label = "GPIO Hall Effect Sensor";
1685
1686		switch-hall-sensor {
1687			label = "Hall Effect Sensor";
1688			gpios = <&gpio TEGRA_GPIO(O, 5) GPIO_ACTIVE_LOW>;
1689			linux,input-type = <EV_SW>;
1690			linux,code = <SW_LID>;
1691			linux,can-disable;
1692			wakeup-source;
1693		};
1694	};
1695
1696	gpio-keys {
1697		compatible = "gpio-keys";
1698
1699		label = "GPIO Buttons";
1700
1701		button-power {
1702			label = "Power";
1703			gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
1704			linux,code = <KEY_POWER>;
1705			debounce-interval = <10>;
1706			wakeup-source;
1707		};
1708
1709		button-volume-down {
1710			label = "Volume Down";
1711			gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>;
1712			linux,code = <KEY_VOLUMEDOWN>;
1713			debounce-interval = <10>;
1714		};
1715
1716		button-volume-up {
1717			label = "Volume Up";
1718			gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>;
1719			linux,code = <KEY_VOLUMEUP>;
1720			debounce-interval = <10>;
1721		};
1722	};
1723
1724	sound {
1725		compatible = "asus,tegra-audio-rt5639-tf701t",
1726			     "nvidia,tegra-audio-rt5640";
1727		nvidia,model = "Asus Transformer Pad TF701T RT5639";
1728
1729		nvidia,audio-routing =
1730			"Headphones", "HPOR",
1731			"Headphones", "HPOL",
1732			"Speakers", "SPORP",
1733			"Speakers", "SPORN",
1734			"Speakers", "SPOLP",
1735			"Speakers", "SPOLN",
1736			"Mic Jack", "MICBIAS1",
1737			"IN2P", "Mic Jack";
1738
1739		nvidia,i2s-controller = <&tegra_i2s0>;
1740		nvidia,audio-codec = <&rt5639>;
1741
1742		nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_LOW>;
1743
1744		clocks = <&tegra_car TEGRA114_CLK_PLL_A>,
1745			 <&tegra_car TEGRA114_CLK_PLL_A_OUT0>,
1746			 <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1747		clock-names = "pll_a", "pll_a_out0", "mclk";
1748
1749		assigned-clocks = <&tegra_car TEGRA114_CLK_EXTERN1>,
1750				  <&tegra_pmc TEGRA_PMC_CLK_OUT_1>;
1751
1752		assigned-clock-parents = <&tegra_car TEGRA114_CLK_PLL_A_OUT0>,
1753					 <&tegra_car TEGRA114_CLK_EXTERN1>;
1754	};
1755
1756	vdd_5v0_sys: regulator-5v0-sys {
1757		compatible = "regulator-fixed";
1758		regulator-name = "vdd_5v0_sys";
1759		regulator-min-microvolt = <5000000>;
1760		regulator-max-microvolt = <5000000>;
1761		regulator-always-on;
1762		regulator-boot-on;
1763	};
1764
1765	vdd_3v3_sys: regulator-3v3-sys {
1766		compatible = "regulator-fixed";
1767		regulator-name = "vdd_3v3_sys";
1768		regulator-min-microvolt = <3300000>;
1769		regulator-max-microvolt = <3300000>;
1770		regulator-always-on;
1771		regulator-boot-on;
1772	};
1773
1774	dvdd_1v8_lcd: regulator-vdd-lcd {
1775		compatible = "regulator-fixed";
1776		regulator-name = "dvdd_1v8_lcd";
1777		regulator-min-microvolt = <1800000>;
1778		regulator-max-microvolt = <1800000>;
1779		regulator-boot-on;
1780		gpio = <&palmas_gpio 4 GPIO_ACTIVE_HIGH>;
1781		enable-active-high;
1782		vin-supply = <&vdd_1v8_vio>;
1783	};
1784
1785	vdd_3v7_bl: regulator-bl-en {
1786		compatible = "regulator-fixed";
1787		regulator-name = "vdd_3v7_bl";
1788		regulator-min-microvolt = <3700000>;
1789		regulator-max-microvolt = <3700000>;
1790		regulator-boot-on;
1791		gpio = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
1792		enable-active-high;
1793		vin-supply = <&vdd_5v0_sys>;
1794	};
1795
1796	hdmi_5v0_sys: regulator-hdmi {
1797		compatible = "regulator-fixed";
1798		regulator-name = "vdd_5v0_hdmi";
1799		regulator-min-microvolt = <5000000>;
1800		regulator-max-microvolt = <5000000>;
1801		regulator-boot-on;
1802		gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
1803		enable-active-high;
1804		vin-supply = <&vdd_smps10_out2>;
1805	};
1806
1807	vdd_2v9_usd: regulator-vdd-usd {
1808		compatible = "regulator-fixed";
1809		regulator-name = "vdd_sd_slot";
1810		regulator-min-microvolt = <2900000>;
1811		regulator-max-microvolt = <2900000>;
1812		regulator-boot-on;
1813		gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
1814		enable-active-high;
1815		vin-supply = <&vcore_emmc>;
1816	};
1817
1818	vdd_1v8_cam: regulator-cam-vio {
1819		compatible = "regulator-fixed";
1820		regulator-name = "vdd_1v8_cam";
1821		regulator-min-microvolt = <1800000>;
1822		regulator-max-microvolt = <1800000>;
1823		regulator-boot-on;
1824		gpio = <&palmas_gpio 6 GPIO_ACTIVE_HIGH>;
1825		enable-active-high;
1826		vin-supply = <&vdd_1v8_vio>;
1827	};
1828
1829	vdd_1v2_xusb: regulator-xusb-vio {
1830		compatible = "regulator-fixed";
1831		regulator-name = "avddio_1v2_xusb";
1832		regulator-min-microvolt = <1200000>;
1833		regulator-max-microvolt = <1200000>;
1834		regulator-boot-on;
1835		gpio = <&palmas_gpio 3 GPIO_ACTIVE_HIGH>;
1836		enable-active-high;
1837	};
1838
1839	vdd_3v3_xusb: regulator-xusb-vdd {
1840		compatible = "regulator-fixed";
1841		regulator-name = "hvdd_3v3_xusb";
1842		regulator-min-microvolt = <3300000>;
1843		regulator-max-microvolt = <3300000>;
1844		regulator-boot-on;
1845		gpio = <&palmas_gpio 1 GPIO_ACTIVE_HIGH>;
1846		enable-active-high;
1847	};
1848
1849	vdd_3v3_com: regulator-com {
1850		compatible = "regulator-fixed";
1851		regulator-name = "vdd_3v3_com";
1852		regulator-min-microvolt = <3300000>;
1853		regulator-max-microvolt = <3300000>;
1854		regulator-always-on;
1855		regulator-boot-on;
1856		gpio = <&gpio TEGRA_GPIO(U, 1) GPIO_ACTIVE_HIGH>;
1857		enable-active-high;
1858		vin-supply = <&vdd_3v3_sys>;
1859	};
1860
1861	vdd_3v3_touch: regulator-touch-pwr {
1862		compatible = "regulator-fixed";
1863		regulator-name = "vdd_3v3_touch";
1864		regulator-min-microvolt = <3300000>;
1865		regulator-max-microvolt = <3300000>;
1866		regulator-boot-on;
1867		gpio = <&gpio TEGRA_GPIO(H, 0) GPIO_ACTIVE_HIGH>;
1868		enable-active-high;
1869		vin-supply = <&vdd_3v3_sys>;
1870	};
1871
1872	vdd_1v8_touch: regulator-touch-vio {
1873		compatible = "regulator-fixed";
1874		regulator-name = "vdd_1v8_touch";
1875		regulator-min-microvolt = <1800000>;
1876		regulator-max-microvolt = <1800000>;
1877		regulator-boot-on;
1878		gpio = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>;
1879		enable-active-high;
1880		vin-supply = <&vdd_3v3_sys>;
1881	};
1882};
1883