1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2724ba675SRob Herring 3724ba675SRob Herring/dts-v1/; 4724ba675SRob Herring 5724ba675SRob Herring#include <dt-bindings/input/gpio-keys.h> 6724ba675SRob Herring#include <dt-bindings/input/input.h> 7724ba675SRob Herring 8724ba675SRob Herring#include "tegra114.dtsi" 9724ba675SRob Herring 10724ba675SRob Herring/ { 11724ba675SRob Herring model = "Asus Transformer Pad TF701T"; 12724ba675SRob Herring compatible = "asus,tf701t", "nvidia,tegra114"; 13724ba675SRob Herring chassis-type = "convertible"; 14724ba675SRob Herring 15724ba675SRob Herring aliases { 16724ba675SRob Herring mmc0 = "/mmc@78000600"; /* eMMC */ 17724ba675SRob Herring mmc1 = "/mmc@78000400"; /* uSD slot */ 18724ba675SRob Herring mmc2 = "/mmc@78000000"; /* WiFi */ 19724ba675SRob Herring 20724ba675SRob Herring rtc0 = &palmas; 21724ba675SRob Herring rtc1 = "/rtc@7000e000"; 22724ba675SRob Herring 23724ba675SRob Herring serial0 = &uartd; /* Console */ 24724ba675SRob Herring serial1 = &uartc; /* Bluetooth */ 25724ba675SRob Herring serial2 = &uartb; /* GPS */ 26724ba675SRob Herring }; 27724ba675SRob Herring 28724ba675SRob Herring firmware { 29724ba675SRob Herring trusted-foundations { 30724ba675SRob Herring compatible = "tlm,trusted-foundations"; 31724ba675SRob Herring tlm,version-major = <2>; 32724ba675SRob Herring tlm,version-minor = <8>; 33724ba675SRob Herring }; 34724ba675SRob Herring }; 35724ba675SRob Herring 36724ba675SRob Herring memory@80000000 { 37724ba675SRob Herring reg = <0x80000000 0x80000000>; 38724ba675SRob Herring }; 39724ba675SRob Herring 40724ba675SRob Herring reserved-memory { 41724ba675SRob Herring #address-cells = <1>; 42724ba675SRob Herring #size-cells = <1>; 43724ba675SRob Herring ranges; 44724ba675SRob Herring 45724ba675SRob Herring linux,cma@80000000 { 46724ba675SRob Herring compatible = "shared-dma-pool"; 47724ba675SRob Herring alloc-ranges = <0x80000000 0x30000000>; 48724ba675SRob Herring size = <0x10000000>; 49724ba675SRob Herring linux,cma-default; 50724ba675SRob Herring reusable; 51724ba675SRob Herring }; 52724ba675SRob Herring 53724ba675SRob Herring trustzone@bfe00000 { 54724ba675SRob Herring reg = <0xbfe00000 0x200000>; 55724ba675SRob Herring no-map; 56724ba675SRob Herring }; 57724ba675SRob Herring }; 58724ba675SRob Herring 59724ba675SRob Herring host1x@50000000 { 60724ba675SRob Herring dsi@54300000 { 61724ba675SRob Herring status = "okay"; 62724ba675SRob Herring 63724ba675SRob Herring avdd-dsi-csi-supply = <&tps65913_ldo2>; 64724ba675SRob Herring 65724ba675SRob Herring nvidia,ganged-mode = <&dsib>; 66724ba675SRob Herring 67724ba675SRob Herring panel_primary: panel@0 { 68724ba675SRob Herring compatible = "sharp,lq101r1sx01"; 69724ba675SRob Herring reg = <0>; 70724ba675SRob Herring 71724ba675SRob Herring link2 = <&panel_secondary>; 72724ba675SRob Herring 73724ba675SRob Herring power-supply = <&vdd_lcd>; 74724ba675SRob Herring backlight = <&backlight>; 75724ba675SRob Herring }; 76724ba675SRob Herring }; 77724ba675SRob Herring 78724ba675SRob Herring dsi@54400000 { 79724ba675SRob Herring status = "okay"; 80724ba675SRob Herring 81724ba675SRob Herring avdd-dsi-csi-supply = <&tps65913_ldo2>; 82724ba675SRob Herring 83724ba675SRob Herring panel_secondary: panel@0 { 84724ba675SRob Herring compatible = "sharp,lq101r1sx01"; 85724ba675SRob Herring reg = <0>; 86724ba675SRob Herring }; 87724ba675SRob Herring }; 88724ba675SRob Herring }; 89724ba675SRob Herring 90*984d444aSSvyatoslav Ryhel vde@6001a000 { 91*984d444aSSvyatoslav Ryhel assigned-clocks = <&tegra_car TEGRA114_CLK_VDE>; 92*984d444aSSvyatoslav Ryhel assigned-clock-parents = <&tegra_car TEGRA114_CLK_PLL_P>; 93*984d444aSSvyatoslav Ryhel assigned-clock-rates = <408000000>; 94*984d444aSSvyatoslav Ryhel }; 95*984d444aSSvyatoslav Ryhel 96724ba675SRob Herring pinmux@70000868 { 97b457e191SSvyatoslav Ryhel pinctrl-names = "default"; 98b457e191SSvyatoslav Ryhel pinctrl-0 = <&state_default>; 99b457e191SSvyatoslav Ryhel 100b457e191SSvyatoslav Ryhel state_default: pinmux { 101b457e191SSvyatoslav Ryhel /* WLAN SDIO pinmux */ 102b457e191SSvyatoslav Ryhel sdmmc1-clk { 103b457e191SSvyatoslav Ryhel nvidia,pins = "sdmmc1_clk_pz0"; 104b457e191SSvyatoslav Ryhel nvidia,function = "sdmmc1"; 105b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 106b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 107b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 108b457e191SSvyatoslav Ryhel }; 109b457e191SSvyatoslav Ryhel 110b457e191SSvyatoslav Ryhel sdmmc1-cmd { 111b457e191SSvyatoslav Ryhel nvidia,pins = "sdmmc1_cmd_pz1", 112b457e191SSvyatoslav Ryhel "sdmmc1_dat0_py7", 113b457e191SSvyatoslav Ryhel "sdmmc1_dat1_py6", 114b457e191SSvyatoslav Ryhel "sdmmc1_dat2_py5", 115b457e191SSvyatoslav Ryhel "sdmmc1_dat3_py4"; 116b457e191SSvyatoslav Ryhel nvidia,function = "sdmmc1"; 117724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 118724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 119724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 120724ba675SRob Herring }; 121724ba675SRob Herring 122b457e191SSvyatoslav Ryhel wlan-power { 123b457e191SSvyatoslav Ryhel nvidia,pins = "clk2_req_pcc5"; 124b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 125724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 126724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 127724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 128724ba675SRob Herring }; 129b457e191SSvyatoslav Ryhel 130b457e191SSvyatoslav Ryhel wlan-reset { 131b457e191SSvyatoslav Ryhel nvidia,pins = "gpio_x7_aud_px7"; 132b457e191SSvyatoslav Ryhel nvidia,function = "rsvd1"; 133b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 134b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 135b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 136724ba675SRob Herring }; 137724ba675SRob Herring 138b457e191SSvyatoslav Ryhel wlan-host-wake { 139b457e191SSvyatoslav Ryhel nvidia,pins = "pu5"; 140b457e191SSvyatoslav Ryhel nvidia,function = "pwm2"; 141b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 142b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 143b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 144b457e191SSvyatoslav Ryhel }; 145b457e191SSvyatoslav Ryhel 146b457e191SSvyatoslav Ryhel wlan-3v3-com { 147b457e191SSvyatoslav Ryhel nvidia,pins = "pu1"; 148b457e191SSvyatoslav Ryhel nvidia,function = "rsvd1"; 149b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 150b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 151b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 152b457e191SSvyatoslav Ryhel }; 153b457e191SSvyatoslav Ryhel 154b457e191SSvyatoslav Ryhel /* UART-A pinmux */ 155b457e191SSvyatoslav Ryhel uarta-cts { 156b457e191SSvyatoslav Ryhel nvidia,pins = "kb_row10_ps2"; 157b457e191SSvyatoslav Ryhel nvidia,function = "uarta"; 158b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 159b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 160b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 161b457e191SSvyatoslav Ryhel }; 162b457e191SSvyatoslav Ryhel 163b457e191SSvyatoslav Ryhel uarta-rts { 164b457e191SSvyatoslav Ryhel nvidia,pins = "kb_row9_ps1"; 165b457e191SSvyatoslav Ryhel nvidia,function = "uarta"; 166b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 167b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 168b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 169b457e191SSvyatoslav Ryhel }; 170b457e191SSvyatoslav Ryhel 171b457e191SSvyatoslav Ryhel /* GNSS UART-B pinmux */ 172b457e191SSvyatoslav Ryhel uartb-cts { 173b457e191SSvyatoslav Ryhel nvidia,pins = "uart2_cts_n_pj5"; 174b457e191SSvyatoslav Ryhel nvidia,function = "uartb"; 175b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 176b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 177b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 178b457e191SSvyatoslav Ryhel }; 179b457e191SSvyatoslav Ryhel 180b457e191SSvyatoslav Ryhel uartb-rts { 181b457e191SSvyatoslav Ryhel nvidia,pins = "uart2_rts_n_pj6"; 182b457e191SSvyatoslav Ryhel nvidia,function = "uartb"; 183b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 184b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 185b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 186b457e191SSvyatoslav Ryhel }; 187b457e191SSvyatoslav Ryhel 188b457e191SSvyatoslav Ryhel uartb-rxd { 189b457e191SSvyatoslav Ryhel nvidia,pins = "uart2_rxd_pc3"; 190b457e191SSvyatoslav Ryhel nvidia,function = "irda"; 191b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 192b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 193b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 194b457e191SSvyatoslav Ryhel }; 195b457e191SSvyatoslav Ryhel 196b457e191SSvyatoslav Ryhel uartb-txd { 197b457e191SSvyatoslav Ryhel nvidia,pins = "uart2_txd_pc2"; 198b457e191SSvyatoslav Ryhel nvidia,function = "irda"; 199b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 200b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 201b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 202b457e191SSvyatoslav Ryhel }; 203b457e191SSvyatoslav Ryhel 204b457e191SSvyatoslav Ryhel /* Bluetooth UART-C pinmux */ 205b457e191SSvyatoslav Ryhel uartc-cts-rxd { 206b457e191SSvyatoslav Ryhel nvidia,pins = "uart3_cts_n_pa1", 207b457e191SSvyatoslav Ryhel "uart3_rxd_pw7"; 208b457e191SSvyatoslav Ryhel nvidia,function = "uartc"; 209b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 210b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 211b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 212b457e191SSvyatoslav Ryhel }; 213b457e191SSvyatoslav Ryhel 214b457e191SSvyatoslav Ryhel uartc-rts-txd { 215b457e191SSvyatoslav Ryhel nvidia,pins = "uart3_rts_n_pc0", 216b457e191SSvyatoslav Ryhel "uart3_txd_pw6"; 217b457e191SSvyatoslav Ryhel nvidia,function = "uartc"; 218b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 219b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 220b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 221b457e191SSvyatoslav Ryhel }; 222b457e191SSvyatoslav Ryhel 223b457e191SSvyatoslav Ryhel bt-shutdown { 224b457e191SSvyatoslav Ryhel nvidia,pins = "kb_col6_pq6", 225b457e191SSvyatoslav Ryhel "kb_col7_pq7"; 226b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 227b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 228b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 229b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 230b457e191SSvyatoslav Ryhel }; 231b457e191SSvyatoslav Ryhel 232b457e191SSvyatoslav Ryhel bt-dev-wake { 233b457e191SSvyatoslav Ryhel nvidia,pins = "clk3_req_pee1"; 234b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 235b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 236b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 237b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 238b457e191SSvyatoslav Ryhel }; 239b457e191SSvyatoslav Ryhel 240b457e191SSvyatoslav Ryhel bt-host-wake { 241b457e191SSvyatoslav Ryhel nvidia,pins = "pu6"; 242b457e191SSvyatoslav Ryhel nvidia,function = "pwm3"; 243b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 244b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 245b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 246b457e191SSvyatoslav Ryhel }; 247b457e191SSvyatoslav Ryhel 248b457e191SSvyatoslav Ryhel bt-pcm-dap4-out { 249b457e191SSvyatoslav Ryhel nvidia,pins = "dap4_fs_pp4", 250b457e191SSvyatoslav Ryhel "dap4_dout_pp6", 251b457e191SSvyatoslav Ryhel "dap4_sclk_pp7"; 252b457e191SSvyatoslav Ryhel nvidia,function = "i2s3"; 253b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 254b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 255b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 256b457e191SSvyatoslav Ryhel }; 257b457e191SSvyatoslav Ryhel 258b457e191SSvyatoslav Ryhel bt-pcm-dap4-in { 259b457e191SSvyatoslav Ryhel nvidia,pins = "dap4_din_pp5"; 260b457e191SSvyatoslav Ryhel nvidia,function = "i2s3"; 261b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 262b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 263b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 264b457e191SSvyatoslav Ryhel }; 265b457e191SSvyatoslav Ryhel 266b457e191SSvyatoslav Ryhel /* UART-D pinmux */ 267b457e191SSvyatoslav Ryhel uartd-cts { 268b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_a17_pb0"; 269b457e191SSvyatoslav Ryhel nvidia,function = "uartd"; 270b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 271b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 272b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 273b457e191SSvyatoslav Ryhel }; 274b457e191SSvyatoslav Ryhel 275b457e191SSvyatoslav Ryhel uartd-rts { 276b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_a16_pj7", 277b457e191SSvyatoslav Ryhel "gmi_a19_pk7"; 278b457e191SSvyatoslav Ryhel nvidia,function = "uartd"; 279b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 280b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 281b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 282b457e191SSvyatoslav Ryhel }; 283b457e191SSvyatoslav Ryhel 284b457e191SSvyatoslav Ryhel /* MicroSD pinmux */ 285b457e191SSvyatoslav Ryhel sdmmc3-clk { 286b457e191SSvyatoslav Ryhel nvidia,pins = "sdmmc3_clk_pa6"; 287b457e191SSvyatoslav Ryhel nvidia,function = "sdmmc3"; 288b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 289b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 290b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 291b457e191SSvyatoslav Ryhel }; 292b457e191SSvyatoslav Ryhel 293b457e191SSvyatoslav Ryhel sdmmc3-data { 294b457e191SSvyatoslav Ryhel nvidia,pins = "sdmmc3_cmd_pa7", 295b457e191SSvyatoslav Ryhel "sdmmc3_dat0_pb7", 296b457e191SSvyatoslav Ryhel "sdmmc3_dat1_pb6", 297b457e191SSvyatoslav Ryhel "sdmmc3_dat2_pb5", 298b457e191SSvyatoslav Ryhel "sdmmc3_dat3_pb4", 299b457e191SSvyatoslav Ryhel "kb_col4_pq4", 300b457e191SSvyatoslav Ryhel "sdmmc3_cd_n_pv2", 301b457e191SSvyatoslav Ryhel "sdmmc3_clk_lb_out_pee4", 302b457e191SSvyatoslav Ryhel "sdmmc3_clk_lb_in_pee5"; 303b457e191SSvyatoslav Ryhel nvidia,function = "sdmmc3"; 304b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 305b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 306b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 307b457e191SSvyatoslav Ryhel }; 308b457e191SSvyatoslav Ryhel 309b457e191SSvyatoslav Ryhel microsd-pwr { 310b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_clk_pk1"; 311724ba675SRob Herring nvidia,function = "gmi"; 312724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 313724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 314724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 315724ba675SRob Herring }; 316b457e191SSvyatoslav Ryhel 317b457e191SSvyatoslav Ryhel /* EMMC pinmux */ 318b457e191SSvyatoslav Ryhel sdmmc4-clk-cmd { 319b457e191SSvyatoslav Ryhel nvidia,pins = "sdmmc4_clk_pcc4"; 320b457e191SSvyatoslav Ryhel nvidia,function = "sdmmc4"; 321b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 322b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 323b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 324724ba675SRob Herring }; 325724ba675SRob Herring 326b457e191SSvyatoslav Ryhel sdmmc4-data { 327b457e191SSvyatoslav Ryhel nvidia,pins = "sdmmc4_cmd_pt7", 328b457e191SSvyatoslav Ryhel "sdmmc4_dat0_paa0", 329b457e191SSvyatoslav Ryhel "sdmmc4_dat1_paa1", 330b457e191SSvyatoslav Ryhel "sdmmc4_dat2_paa2", 331b457e191SSvyatoslav Ryhel "sdmmc4_dat3_paa3", 332b457e191SSvyatoslav Ryhel "sdmmc4_dat4_paa4", 333b457e191SSvyatoslav Ryhel "sdmmc4_dat5_paa5", 334b457e191SSvyatoslav Ryhel "sdmmc4_dat6_paa6", 335b457e191SSvyatoslav Ryhel "sdmmc4_dat7_paa7"; 336b457e191SSvyatoslav Ryhel nvidia,function = "sdmmc4"; 337724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 338724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 339724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 340724ba675SRob Herring }; 341724ba675SRob Herring 342b457e191SSvyatoslav Ryhel /* I2C pinmux */ 343b457e191SSvyatoslav Ryhel gen1-i2c { 344b457e191SSvyatoslav Ryhel nvidia,pins = "gen1_i2c_scl_pc4", 345b457e191SSvyatoslav Ryhel "gen1_i2c_sda_pc5"; 346b457e191SSvyatoslav Ryhel nvidia,function = "i2c1"; 347b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 348b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 349b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 350b457e191SSvyatoslav Ryhel nvidia,open-drain = <TEGRA_PIN_ENABLE>; 351b457e191SSvyatoslav Ryhel nvidia,lock = <TEGRA_PIN_DISABLE>; 352b457e191SSvyatoslav Ryhel }; 353b457e191SSvyatoslav Ryhel 354b457e191SSvyatoslav Ryhel gen2-i2c { 355b457e191SSvyatoslav Ryhel nvidia,pins = "gen2_i2c_scl_pt5", 356b457e191SSvyatoslav Ryhel "gen2_i2c_sda_pt6"; 357b457e191SSvyatoslav Ryhel nvidia,function = "i2c2"; 358b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 359b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 360b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 361b457e191SSvyatoslav Ryhel nvidia,open-drain = <TEGRA_PIN_ENABLE>; 362b457e191SSvyatoslav Ryhel nvidia,lock = <TEGRA_PIN_DISABLE>; 363b457e191SSvyatoslav Ryhel }; 364b457e191SSvyatoslav Ryhel 365b457e191SSvyatoslav Ryhel cam-i2c { 366b457e191SSvyatoslav Ryhel nvidia,pins = "cam_i2c_scl_pbb1", 367b457e191SSvyatoslav Ryhel "cam_i2c_sda_pbb2"; 368b457e191SSvyatoslav Ryhel nvidia,function = "i2c3"; 369b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 370b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 371b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 372b457e191SSvyatoslav Ryhel nvidia,open-drain = <TEGRA_PIN_ENABLE>; 373b457e191SSvyatoslav Ryhel nvidia,lock = <TEGRA_PIN_DISABLE>; 374b457e191SSvyatoslav Ryhel }; 375b457e191SSvyatoslav Ryhel 376b457e191SSvyatoslav Ryhel ddc-i2c { 377b457e191SSvyatoslav Ryhel nvidia,pins = "ddc_scl_pv4", 378b457e191SSvyatoslav Ryhel "ddc_sda_pv5"; 379b457e191SSvyatoslav Ryhel nvidia,function = "i2c4"; 380b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 381b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 382b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 383b457e191SSvyatoslav Ryhel nvidia,lock = <TEGRA_PIN_DISABLE>; 384b457e191SSvyatoslav Ryhel }; 385b457e191SSvyatoslav Ryhel 386b457e191SSvyatoslav Ryhel pwr-i2c { 387b457e191SSvyatoslav Ryhel nvidia,pins = "pwr_i2c_scl_pz6", 388b457e191SSvyatoslav Ryhel "pwr_i2c_sda_pz7"; 389b457e191SSvyatoslav Ryhel nvidia,function = "i2cpwr"; 390b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 391b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 392b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 393b457e191SSvyatoslav Ryhel nvidia,open-drain = <TEGRA_PIN_ENABLE>; 394b457e191SSvyatoslav Ryhel nvidia,lock = <TEGRA_PIN_DISABLE>; 395b457e191SSvyatoslav Ryhel }; 396b457e191SSvyatoslav Ryhel 397b457e191SSvyatoslav Ryhel /* SPI pinmux */ 398b457e191SSvyatoslav Ryhel spi1-out { 399b457e191SSvyatoslav Ryhel nvidia,pins = "ulpi_clk_py0", 400b457e191SSvyatoslav Ryhel "ulpi_nxt_py2", 401b457e191SSvyatoslav Ryhel "ulpi_stp_py3"; 402b457e191SSvyatoslav Ryhel nvidia,function = "spi1"; 403724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 404724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 405724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 406724ba675SRob Herring }; 407b457e191SSvyatoslav Ryhel 408b457e191SSvyatoslav Ryhel spi1-in { 409b457e191SSvyatoslav Ryhel nvidia,pins = "ulpi_dir_py1"; 410b457e191SSvyatoslav Ryhel nvidia,function = "spi1"; 411b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 412b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 413b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 414724ba675SRob Herring }; 415724ba675SRob Herring 416b457e191SSvyatoslav Ryhel spi2 { 417b457e191SSvyatoslav Ryhel nvidia,pins = "ulpi_data4_po5", 418b457e191SSvyatoslav Ryhel "ulpi_data7_po0"; 419b457e191SSvyatoslav Ryhel nvidia,function = "spi2"; 420b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 421b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 422b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 423b457e191SSvyatoslav Ryhel }; 424b457e191SSvyatoslav Ryhel 425b457e191SSvyatoslav Ryhel spi4-out { 426b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_ad6_pg6", 427b457e191SSvyatoslav Ryhel "gmi_wr_n_pi0"; 428b457e191SSvyatoslav Ryhel nvidia,function = "spi4"; 429b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 430b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 431b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 432b457e191SSvyatoslav Ryhel }; 433b457e191SSvyatoslav Ryhel 434b457e191SSvyatoslav Ryhel spi4-in { 435b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_ad5_pg5", 436b457e191SSvyatoslav Ryhel "gmi_ad7_pg7"; 437b457e191SSvyatoslav Ryhel nvidia,function = "spi4"; 438b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 439b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 440b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 441b457e191SSvyatoslav Ryhel }; 442b457e191SSvyatoslav Ryhel 443b457e191SSvyatoslav Ryhel /* GPIO keys pinmux */ 444b457e191SSvyatoslav Ryhel hall-switch { 445724ba675SRob Herring nvidia,pins = "ulpi_data4_po5"; 446724ba675SRob Herring nvidia,function = "spi2"; 447724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 448724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 449724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 450724ba675SRob Herring }; 451b457e191SSvyatoslav Ryhel 452b457e191SSvyatoslav Ryhel lineout-switch { 453b457e191SSvyatoslav Ryhel nvidia,pins = "gpio_x5_aud_px5"; 454b457e191SSvyatoslav Ryhel nvidia,function = "rsvd1"; 455b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 456b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 457b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 458724ba675SRob Herring }; 459724ba675SRob Herring 460b457e191SSvyatoslav Ryhel power-key { 461724ba675SRob Herring nvidia,pins = "kb_col0_pq0"; 462724ba675SRob Herring nvidia,function = "kbc"; 463724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 464724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 465724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 466724ba675SRob Herring }; 467724ba675SRob Herring 468b457e191SSvyatoslav Ryhel volume-keys { 469724ba675SRob Herring nvidia,pins = "kb_row1_pr1", 470724ba675SRob Herring "kb_row2_pr2"; 471724ba675SRob Herring nvidia,function = "rsvd2"; 472724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 473724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_ENABLE>; 474724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 475724ba675SRob Herring }; 476724ba675SRob Herring 477b457e191SSvyatoslav Ryhel /* Sensors pinmux */ 478b457e191SSvyatoslav Ryhel nct-irq { 479b457e191SSvyatoslav Ryhel nvidia,pins = "ulpi_data3_po4"; 480b457e191SSvyatoslav Ryhel nvidia,function = "ulpi"; 481724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_UP>; 482724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 483724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 484724ba675SRob Herring }; 485724ba675SRob Herring 486b457e191SSvyatoslav Ryhel mpu-irq { 487724ba675SRob Herring nvidia,pins = "kb_row3_pr3"; 488724ba675SRob Herring nvidia,function = "rsvd3"; 489724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 490724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 491724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_ENABLE>; 492724ba675SRob Herring }; 493b457e191SSvyatoslav Ryhel 494b457e191SSvyatoslav Ryhel /* HDMI pinmux */ 495b457e191SSvyatoslav Ryhel hdmi-hpd { 496b457e191SSvyatoslav Ryhel nvidia,pins = "hdmi_int_pn7"; 497b457e191SSvyatoslav Ryhel nvidia,function = "rsvd1"; 498b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 499b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 500b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 501724ba675SRob Herring }; 502724ba675SRob Herring 503b457e191SSvyatoslav Ryhel hdmi-en { 504b457e191SSvyatoslav Ryhel nvidia,pins = "dap3_dout_pp2"; 505b457e191SSvyatoslav Ryhel nvidia,function = "i2s2"; 506b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 507b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 508b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 509b457e191SSvyatoslav Ryhel }; 510b457e191SSvyatoslav Ryhel 511b457e191SSvyatoslav Ryhel hdmi-cec { 512b457e191SSvyatoslav Ryhel nvidia,pins = "hdmi_cec_pee3"; 513b457e191SSvyatoslav Ryhel nvidia,function = "cec"; 514b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 515b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 516b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 517b457e191SSvyatoslav Ryhel }; 518b457e191SSvyatoslav Ryhel 519b457e191SSvyatoslav Ryhel /* LED pinmux */ 520b457e191SSvyatoslav Ryhel backlight-pwm { 521724ba675SRob Herring nvidia,pins = "gmi_ad9_ph1"; 522724ba675SRob Herring nvidia,function = "pwm1"; 523724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 524724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 525724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 526724ba675SRob Herring }; 527b457e191SSvyatoslav Ryhel 528b457e191SSvyatoslav Ryhel backlight-en { 529b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_ad10_ph2"; 530b457e191SSvyatoslav Ryhel nvidia,function = "gmi"; 531b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 532b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 533b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 534724ba675SRob Herring }; 535724ba675SRob Herring 536b457e191SSvyatoslav Ryhel /* Touchscreen pinmux */ 537b457e191SSvyatoslav Ryhel touch-irq { 538b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_cs4_n_pk2"; 539b457e191SSvyatoslav Ryhel nvidia,function = "gmi"; 540b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 541b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 542b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 543b457e191SSvyatoslav Ryhel }; 544b457e191SSvyatoslav Ryhel 545b457e191SSvyatoslav Ryhel touch-rst { 546b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_cs3_n_pk4"; 547b457e191SSvyatoslav Ryhel nvidia,function = "gmi"; 548b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 549b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 550b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 551b457e191SSvyatoslav Ryhel }; 552b457e191SSvyatoslav Ryhel 553b457e191SSvyatoslav Ryhel touch-pwr { 554b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_ad8_ph0"; 555b457e191SSvyatoslav Ryhel nvidia,function = "gmi"; 556b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 557b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 558b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 559b457e191SSvyatoslav Ryhel }; 560b457e191SSvyatoslav Ryhel 561b457e191SSvyatoslav Ryhel touch-vio { 562b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_ad12_ph4"; 563b457e191SSvyatoslav Ryhel nvidia,function = "rsvd4"; 564b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 565b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 566b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 567b457e191SSvyatoslav Ryhel }; 568b457e191SSvyatoslav Ryhel 569b457e191SSvyatoslav Ryhel /* AUDIO pinmux */ 570b457e191SSvyatoslav Ryhel audio-ldo1 { 571b457e191SSvyatoslav Ryhel nvidia,pins = "sdmmc1_wp_n_pv3"; 572b457e191SSvyatoslav Ryhel nvidia,function = "sdmmc1"; 573b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 574b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 575b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 576b457e191SSvyatoslav Ryhel }; 577b457e191SSvyatoslav Ryhel 578b457e191SSvyatoslav Ryhel hp-detect { 579b457e191SSvyatoslav Ryhel nvidia,pins = "kb_row7_pr7"; 580b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 581b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 582b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 583b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 584b457e191SSvyatoslav Ryhel }; 585b457e191SSvyatoslav Ryhel 586b457e191SSvyatoslav Ryhel dap-i2s0-in { 587b457e191SSvyatoslav Ryhel nvidia,pins = "dap1_din_pn1"; 588b457e191SSvyatoslav Ryhel nvidia,function = "i2s0"; 589b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 590b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 591b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 592b457e191SSvyatoslav Ryhel }; 593b457e191SSvyatoslav Ryhel 594b457e191SSvyatoslav Ryhel dap-i2s0-out { 595b457e191SSvyatoslav Ryhel nvidia,pins = "dap1_dout_pn2", 596b457e191SSvyatoslav Ryhel "dap1_fs_pn0", 597b457e191SSvyatoslav Ryhel "dap1_sclk_pn3"; 598b457e191SSvyatoslav Ryhel nvidia,function = "i2s0"; 599b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 600b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 601b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 602b457e191SSvyatoslav Ryhel }; 603b457e191SSvyatoslav Ryhel 604b457e191SSvyatoslav Ryhel dap-i2s1-in { 605b457e191SSvyatoslav Ryhel nvidia,pins = "dap2_din_pa4"; 606b457e191SSvyatoslav Ryhel nvidia,function = "i2s1"; 607b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 608b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 609b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 610b457e191SSvyatoslav Ryhel }; 611b457e191SSvyatoslav Ryhel 612b457e191SSvyatoslav Ryhel dap-i2s1-out { 613b457e191SSvyatoslav Ryhel nvidia,pins = "dap2_dout_pa5", 614b457e191SSvyatoslav Ryhel "dap2_fs_pa2", 615b457e191SSvyatoslav Ryhel "dap2_sclk_pa3"; 616b457e191SSvyatoslav Ryhel nvidia,function = "i2s1"; 617b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 618b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 619b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 620b457e191SSvyatoslav Ryhel }; 621b457e191SSvyatoslav Ryhel 622b457e191SSvyatoslav Ryhel dap-i2s2-in { 623b457e191SSvyatoslav Ryhel nvidia,pins = "dap3_fs_pp0", 624b457e191SSvyatoslav Ryhel "dap3_sclk_pp3"; 625b457e191SSvyatoslav Ryhel nvidia,function = "i2s2"; 626b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 627b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 628b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 629b457e191SSvyatoslav Ryhel }; 630b457e191SSvyatoslav Ryhel 631b457e191SSvyatoslav Ryhel dap-i2s2-out { 632b457e191SSvyatoslav Ryhel nvidia,pins = "dap3_din_pp1"; 633b457e191SSvyatoslav Ryhel nvidia,function = "i2s2"; 634b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 635b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 636b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 637b457e191SSvyatoslav Ryhel }; 638b457e191SSvyatoslav Ryhel 639b457e191SSvyatoslav Ryhel spdif-in { 640b457e191SSvyatoslav Ryhel nvidia,pins = "spdif_in_pk6"; 641b457e191SSvyatoslav Ryhel nvidia,function = "rsvd3"; 642b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 643b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 644b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 645b457e191SSvyatoslav Ryhel }; 646b457e191SSvyatoslav Ryhel 647b457e191SSvyatoslav Ryhel spdif-out { 648b457e191SSvyatoslav Ryhel nvidia,pins = "spdif_out_pk5"; 649b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 650b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 651b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 652b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 653b457e191SSvyatoslav Ryhel }; 654b457e191SSvyatoslav Ryhel 655b457e191SSvyatoslav Ryhel /* AsusEC pinmux */ 656b457e191SSvyatoslav Ryhel ec-irq { 657b457e191SSvyatoslav Ryhel nvidia,pins = "kb_col5_pq5"; 658b457e191SSvyatoslav Ryhel nvidia,function = "kbc"; 659b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 660b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 661b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 662b457e191SSvyatoslav Ryhel }; 663b457e191SSvyatoslav Ryhel 664b457e191SSvyatoslav Ryhel ec-req { 665b457e191SSvyatoslav Ryhel nvidia,pins = "kb_col2_pq2"; 666b457e191SSvyatoslav Ryhel nvidia,function = "kbc"; 667b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 668b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 669b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 670b457e191SSvyatoslav Ryhel }; 671b457e191SSvyatoslav Ryhel 672b457e191SSvyatoslav Ryhel hotplug-i2c { 673b457e191SSvyatoslav Ryhel nvidia,pins = "ulpi_data7_po0"; 674b457e191SSvyatoslav Ryhel nvidia,function = "spi2"; 675b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 676b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 677b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 678b457e191SSvyatoslav Ryhel }; 679b457e191SSvyatoslav Ryhel 680b457e191SSvyatoslav Ryhel ps2-irq { 681b457e191SSvyatoslav Ryhel nvidia,pins = "gpio_w2_aud_pw2"; 682b457e191SSvyatoslav Ryhel nvidia,function = "spi6"; 683b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 684b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 685b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 686b457e191SSvyatoslav Ryhel }; 687b457e191SSvyatoslav Ryhel 688b457e191SSvyatoslav Ryhel kbd-irq { 689b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_cs0_n_pj0"; 690b457e191SSvyatoslav Ryhel nvidia,function = "rsvd1"; 691b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 692b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 693b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 694b457e191SSvyatoslav Ryhel }; 695b457e191SSvyatoslav Ryhel 696b457e191SSvyatoslav Ryhel dvfs-pin { 697b457e191SSvyatoslav Ryhel nvidia,pins = "dvfs_pwm_px0", 698b457e191SSvyatoslav Ryhel "dvfs_clk_px2"; 699b457e191SSvyatoslav Ryhel nvidia,function = "cldvfs"; 700b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 701b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 702b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 703b457e191SSvyatoslav Ryhel }; 704b457e191SSvyatoslav Ryhel 705b457e191SSvyatoslav Ryhel /* Core pinmux */ 706b457e191SSvyatoslav Ryhel clk-32k-out { 707b457e191SSvyatoslav Ryhel nvidia,pins = "clk_32k_out_pa0"; 708b457e191SSvyatoslav Ryhel nvidia,function = "soc"; 709b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 710b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 711b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 712b457e191SSvyatoslav Ryhel }; 713b457e191SSvyatoslav Ryhel 714b457e191SSvyatoslav Ryhel sys-clk-req { 715b457e191SSvyatoslav Ryhel nvidia,pins = "sys_clk_req_pz5"; 716b457e191SSvyatoslav Ryhel nvidia,function = "sysclk"; 717b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 718b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 719b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 720b457e191SSvyatoslav Ryhel }; 721b457e191SSvyatoslav Ryhel 722b457e191SSvyatoslav Ryhel core-pwr-req { 723b457e191SSvyatoslav Ryhel nvidia,pins = "core_pwr_req"; 724b457e191SSvyatoslav Ryhel nvidia,function = "pwron"; 725b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 726b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 727b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 728b457e191SSvyatoslav Ryhel }; 729b457e191SSvyatoslav Ryhel 730b457e191SSvyatoslav Ryhel cpu-pwr-req { 731b457e191SSvyatoslav Ryhel nvidia,pins = "cpu_pwr_req"; 732b457e191SSvyatoslav Ryhel nvidia,function = "cpu"; 733b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 734b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 735b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 736b457e191SSvyatoslav Ryhel }; 737b457e191SSvyatoslav Ryhel 738b457e191SSvyatoslav Ryhel pwr-int-n { 739b457e191SSvyatoslav Ryhel nvidia,pins = "pwr_int_n"; 740b457e191SSvyatoslav Ryhel nvidia,function = "pmi"; 741b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 742b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 743b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 744b457e191SSvyatoslav Ryhel }; 745b457e191SSvyatoslav Ryhel 746b457e191SSvyatoslav Ryhel clk-32k-in { 747b457e191SSvyatoslav Ryhel nvidia,pins = "clk_32k_in"; 748b457e191SSvyatoslav Ryhel nvidia,function = "clk"; 749b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 750b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 751b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 752b457e191SSvyatoslav Ryhel }; 753b457e191SSvyatoslav Ryhel 754b457e191SSvyatoslav Ryhel owr { 755b457e191SSvyatoslav Ryhel nvidia,pins = "owr"; 756b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 757b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 758b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 759b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 760b457e191SSvyatoslav Ryhel }; 761b457e191SSvyatoslav Ryhel 762b457e191SSvyatoslav Ryhel reset-out-n { 763b457e191SSvyatoslav Ryhel nvidia,pins = "reset_out_n"; 764b457e191SSvyatoslav Ryhel nvidia,function = "reset_out_n"; 765b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 766b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 767b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 768b457e191SSvyatoslav Ryhel }; 769b457e191SSvyatoslav Ryhel 770b457e191SSvyatoslav Ryhel /* ULPI pinmux */ 771b457e191SSvyatoslav Ryhel ulpi-data0-6 { 772b457e191SSvyatoslav Ryhel nvidia,pins = "ulpi_data0_po1", 773b457e191SSvyatoslav Ryhel "ulpi_data6_po7"; 774b457e191SSvyatoslav Ryhel nvidia,function = "ulpi"; 775b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 776b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 777b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 778b457e191SSvyatoslav Ryhel }; 779b457e191SSvyatoslav Ryhel 780b457e191SSvyatoslav Ryhel ulpi-data1-5 { 781b457e191SSvyatoslav Ryhel nvidia,pins = "ulpi_data1_po2", 782b457e191SSvyatoslav Ryhel "ulpi_data5_po6"; 783b457e191SSvyatoslav Ryhel nvidia,function = "ulpi"; 784b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 785b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 786b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 787b457e191SSvyatoslav Ryhel }; 788b457e191SSvyatoslav Ryhel 789b457e191SSvyatoslav Ryhel ulpi-data2-3 { 790b457e191SSvyatoslav Ryhel nvidia,pins = "ulpi_data2_po3", 791b457e191SSvyatoslav Ryhel "ulpi_data3_po4"; 792b457e191SSvyatoslav Ryhel nvidia,function = "ulpi"; 793b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 794b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 795b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 796b457e191SSvyatoslav Ryhel }; 797b457e191SSvyatoslav Ryhel 798b457e191SSvyatoslav Ryhel /* PORT V */ 799b457e191SSvyatoslav Ryhel pv0-gpio { 800b457e191SSvyatoslav Ryhel nvidia,pins = "pv0"; 801b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 802b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 803b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 804b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 805b457e191SSvyatoslav Ryhel }; 806b457e191SSvyatoslav Ryhel 807b457e191SSvyatoslav Ryhel pv1-gpio { 808b457e191SSvyatoslav Ryhel nvidia,pins = "pv1"; 809b457e191SSvyatoslav Ryhel nvidia,function = "rsvd1"; 810b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 811b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 812b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 813b457e191SSvyatoslav Ryhel }; 814b457e191SSvyatoslav Ryhel 815b457e191SSvyatoslav Ryhel /* PORT U */ 816b457e191SSvyatoslav Ryhel pu0-gpio { 817b457e191SSvyatoslav Ryhel nvidia,pins = "pu0"; 818b457e191SSvyatoslav Ryhel nvidia,function = "rsvd3"; 819b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 820b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 821b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 822b457e191SSvyatoslav Ryhel }; 823b457e191SSvyatoslav Ryhel 824b457e191SSvyatoslav Ryhel pu2-gpio { 825b457e191SSvyatoslav Ryhel nvidia,pins = "pu2"; 826b457e191SSvyatoslav Ryhel nvidia,function = "rsvd1"; 827b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 828b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 829b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 830b457e191SSvyatoslav Ryhel }; 831b457e191SSvyatoslav Ryhel 832b457e191SSvyatoslav Ryhel /* PWM pinmux */ 833b457e191SSvyatoslav Ryhel pwm0 { 834b457e191SSvyatoslav Ryhel nvidia,pins = "pu3"; 835b457e191SSvyatoslav Ryhel nvidia,function = "pwm0"; 836b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 837b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 838b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 839b457e191SSvyatoslav Ryhel }; 840b457e191SSvyatoslav Ryhel 841b457e191SSvyatoslav Ryhel pwm1 { 842b457e191SSvyatoslav Ryhel nvidia,pins = "pu4"; 843724ba675SRob Herring nvidia,function = "pwm1"; 844724ba675SRob Herring nvidia,pull = <TEGRA_PIN_PULL_NONE>; 845724ba675SRob Herring nvidia,tristate = <TEGRA_PIN_DISABLE>; 846724ba675SRob Herring nvidia,enable-input = <TEGRA_PIN_DISABLE>; 847724ba675SRob Herring }; 848b457e191SSvyatoslav Ryhel 849b457e191SSvyatoslav Ryhel /* EXTPERIPH pinmux */ 850b457e191SSvyatoslav Ryhel clk1-out { 851b457e191SSvyatoslav Ryhel nvidia,pins = "clk1_out_pw4"; 852b457e191SSvyatoslav Ryhel nvidia,function = "extperiph1"; 853b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 854b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 855b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 856724ba675SRob Herring }; 857724ba675SRob Herring 858b457e191SSvyatoslav Ryhel clk2-out { 859b457e191SSvyatoslav Ryhel nvidia,pins = "clk2_out_pw5"; 860b457e191SSvyatoslav Ryhel nvidia,function = "extperiph2"; 861b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 862b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 863b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 864b457e191SSvyatoslav Ryhel }; 865b457e191SSvyatoslav Ryhel 866b457e191SSvyatoslav Ryhel clk3-out { 867b457e191SSvyatoslav Ryhel nvidia,pins = "clk3_out_pee0"; 868b457e191SSvyatoslav Ryhel nvidia,function = "extperiph3"; 869b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 870b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 871b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 872b457e191SSvyatoslav Ryhel }; 873b457e191SSvyatoslav Ryhel 874b457e191SSvyatoslav Ryhel clk1-req { 875b457e191SSvyatoslav Ryhel nvidia,pins = "clk1_req_pee2"; 876b457e191SSvyatoslav Ryhel nvidia,function = "rsvd3"; 877b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 878b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 879b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 880b457e191SSvyatoslav Ryhel }; 881b457e191SSvyatoslav Ryhel 882b457e191SSvyatoslav Ryhel /* GMI pinmux */ 883b457e191SSvyatoslav Ryhel gmi-wp-n { 884b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_wp_n_pc7"; 885b457e191SSvyatoslav Ryhel nvidia,function = "rsvd1"; 886b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 887b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 888b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 889b457e191SSvyatoslav Ryhel }; 890b457e191SSvyatoslav Ryhel 891b457e191SSvyatoslav Ryhel gmi-adv { 892b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_adv_n_pk0"; 893b457e191SSvyatoslav Ryhel nvidia,function = "rsvd1"; 894b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 895b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 896b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 897b457e191SSvyatoslav Ryhel }; 898b457e191SSvyatoslav Ryhel 899b457e191SSvyatoslav Ryhel gmi-ad0-ad1 { 900b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_ad0_pg0", 901b457e191SSvyatoslav Ryhel "gmi_ad1_pg1"; 902b457e191SSvyatoslav Ryhel nvidia,function = "rsvd1"; 903b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 904b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 905b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 906b457e191SSvyatoslav Ryhel }; 907b457e191SSvyatoslav Ryhel 908b457e191SSvyatoslav Ryhel gmi-ad2-ad3 { 909b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_ad2_pg2", 910b457e191SSvyatoslav Ryhel "gmi_ad3_pg3"; 911b457e191SSvyatoslav Ryhel nvidia,function = "rsvd1"; 912b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 913b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 914b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 915b457e191SSvyatoslav Ryhel }; 916b457e191SSvyatoslav Ryhel 917b457e191SSvyatoslav Ryhel gmi-iordy { 918b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_iordy_pi5"; 919b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 920b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 921b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 922b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 923b457e191SSvyatoslav Ryhel }; 924b457e191SSvyatoslav Ryhel 925b457e191SSvyatoslav Ryhel gmi-a18 { 926b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_a18_pb1"; 927b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 928b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 929b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 930b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 931b457e191SSvyatoslav Ryhel }; 932b457e191SSvyatoslav Ryhel 933b457e191SSvyatoslav Ryhel gmi-wait { 934b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_wait_pi7"; 935b457e191SSvyatoslav Ryhel nvidia,function = "nand"; 936b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 937b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 938b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 939b457e191SSvyatoslav Ryhel }; 940b457e191SSvyatoslav Ryhel 941b457e191SSvyatoslav Ryhel gmi-cs6-n { 942b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_cs6_n_pi3"; 943b457e191SSvyatoslav Ryhel nvidia,function = "nand"; 944b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 945b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 946b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 947b457e191SSvyatoslav Ryhel }; 948b457e191SSvyatoslav Ryhel 949b457e191SSvyatoslav Ryhel gmi-cs7-n { 950b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_cs7_n_pi6"; 951b457e191SSvyatoslav Ryhel nvidia,function = "nand"; 952b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 953b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 954b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 955b457e191SSvyatoslav Ryhel }; 956b457e191SSvyatoslav Ryhel 957b457e191SSvyatoslav Ryhel gmi-dqs-p { 958b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_dqs_p_pj3"; 959b457e191SSvyatoslav Ryhel nvidia,function = "nand"; 960b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 961b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 962b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 963b457e191SSvyatoslav Ryhel }; 964b457e191SSvyatoslav Ryhel 965b457e191SSvyatoslav Ryhel gmi-cs2-ad { 966b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_cs2_n_pk3", 967b457e191SSvyatoslav Ryhel "gmi_ad14_ph6", 968b457e191SSvyatoslav Ryhel "gmi_ad15_ph7"; 969b457e191SSvyatoslav Ryhel nvidia,function = "gmi"; 970b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 971b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 972b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 973b457e191SSvyatoslav Ryhel }; 974b457e191SSvyatoslav Ryhel 975b457e191SSvyatoslav Ryhel gmi-cs4-clk { 976b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_cs4_n_pk2", 977b457e191SSvyatoslav Ryhel "gmi_clk_lb"; 978b457e191SSvyatoslav Ryhel nvidia,function = "gmi"; 979b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 980b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 981b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 982b457e191SSvyatoslav Ryhel }; 983b457e191SSvyatoslav Ryhel 984b457e191SSvyatoslav Ryhel gmi-ad11 { 985b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_ad11_ph3"; 986b457e191SSvyatoslav Ryhel nvidia,function = "gmi"; 987b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 988b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 989b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 990b457e191SSvyatoslav Ryhel }; 991b457e191SSvyatoslav Ryhel 992b457e191SSvyatoslav Ryhel gmi-cs1-oe { 993b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_cs1_n_pj2", 994b457e191SSvyatoslav Ryhel "gmi_oe_n_pi1"; 995b457e191SSvyatoslav Ryhel nvidia,function = "soc"; 996b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 997b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 998b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 999b457e191SSvyatoslav Ryhel }; 1000b457e191SSvyatoslav Ryhel 1001b457e191SSvyatoslav Ryhel gmi-ad4 { 1002b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_ad4_pg4"; 1003b457e191SSvyatoslav Ryhel nvidia,function = "rsvd4"; 1004b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1005b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1006b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1007b457e191SSvyatoslav Ryhel }; 1008b457e191SSvyatoslav Ryhel 1009b457e191SSvyatoslav Ryhel gmi-ad13 { 1010b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_ad13_ph5"; 1011b457e191SSvyatoslav Ryhel nvidia,function = "rsvd4"; 1012b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1013b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 1014b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1015b457e191SSvyatoslav Ryhel }; 1016b457e191SSvyatoslav Ryhel 1017b457e191SSvyatoslav Ryhel gmi-rst-n { 1018b457e191SSvyatoslav Ryhel nvidia,pins = "gmi_rst_n_pi4"; 1019b457e191SSvyatoslav Ryhel nvidia,function = "rsvd4"; 1020b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1021b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1022b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1023b457e191SSvyatoslav Ryhel }; 1024b457e191SSvyatoslav Ryhel 1025b457e191SSvyatoslav Ryhel /* PORT CC */ 1026b457e191SSvyatoslav Ryhel pcc-gpio { 1027b457e191SSvyatoslav Ryhel nvidia,pins = "pcc1", "pcc2"; 1028b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 1029b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1030b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1031b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1032b457e191SSvyatoslav Ryhel }; 1033b457e191SSvyatoslav Ryhel 1034b457e191SSvyatoslav Ryhel /* PORT BB */ 1035b457e191SSvyatoslav Ryhel pbb3-gpio { 1036b457e191SSvyatoslav Ryhel nvidia,pins = "pbb3"; 1037b457e191SSvyatoslav Ryhel nvidia,function = "rsvd4"; 1038b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1039b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1040b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1041b457e191SSvyatoslav Ryhel }; 1042b457e191SSvyatoslav Ryhel 1043b457e191SSvyatoslav Ryhel pbb4-5-6-gpio { 1044b457e191SSvyatoslav Ryhel nvidia,pins = "pbb4", "pbb5", "pbb6"; 1045b457e191SSvyatoslav Ryhel nvidia,function = "rsvd4"; 1046b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1047b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1048b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1049b457e191SSvyatoslav Ryhel }; 1050b457e191SSvyatoslav Ryhel 1051b457e191SSvyatoslav Ryhel pbb7-gpio { 1052b457e191SSvyatoslav Ryhel nvidia,pins = "pbb7"; 1053b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 1054b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1055b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1056b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1057b457e191SSvyatoslav Ryhel }; 1058b457e191SSvyatoslav Ryhel 1059b457e191SSvyatoslav Ryhel /* KBC pinmux */ 1060b457e191SSvyatoslav Ryhel kb-r0-c1 { 1061b457e191SSvyatoslav Ryhel nvidia,pins = "kb_row0_pr0", 1062b457e191SSvyatoslav Ryhel "kb_col1_pq1"; 1063b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 1064b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 1065b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1066b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1067b457e191SSvyatoslav Ryhel }; 1068b457e191SSvyatoslav Ryhel 1069b457e191SSvyatoslav Ryhel kb-row4 { 1070b457e191SSvyatoslav Ryhel nvidia,pins = "kb_row4_pr4"; 1071b457e191SSvyatoslav Ryhel nvidia,function = "kbc"; 1072b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1073b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 1074b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1075b457e191SSvyatoslav Ryhel }; 1076b457e191SSvyatoslav Ryhel 1077b457e191SSvyatoslav Ryhel kb-row5 { 1078b457e191SSvyatoslav Ryhel nvidia,pins = "kb_row5_pr5"; 1079b457e191SSvyatoslav Ryhel nvidia,function = "kbc"; 1080b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 1081b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 1082b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1083b457e191SSvyatoslav Ryhel }; 1084b457e191SSvyatoslav Ryhel 1085b457e191SSvyatoslav Ryhel kb-row6 { 1086b457e191SSvyatoslav Ryhel nvidia,pins = "kb_row6_pr6"; 1087b457e191SSvyatoslav Ryhel nvidia,function = "kbc"; 1088b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1089b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1090b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1091b457e191SSvyatoslav Ryhel }; 1092b457e191SSvyatoslav Ryhel 1093b457e191SSvyatoslav Ryhel kb-r8-c3 { 1094b457e191SSvyatoslav Ryhel nvidia,pins = "kb_row8_ps0", 1095b457e191SSvyatoslav Ryhel "kb_col3_pq3"; 1096b457e191SSvyatoslav Ryhel nvidia,function = "kbc"; 1097b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 1098b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1099b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1100b457e191SSvyatoslav Ryhel }; 1101b457e191SSvyatoslav Ryhel 1102b457e191SSvyatoslav Ryhel /* VI pinmux */ 1103b457e191SSvyatoslav Ryhel cam-mclk { 1104b457e191SSvyatoslav Ryhel nvidia,pins = "cam_mclk_pcc0", 1105b457e191SSvyatoslav Ryhel "pbb0"; 1106b457e191SSvyatoslav Ryhel nvidia,function = "vi_alt3"; 1107b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1108b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1109b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1110b457e191SSvyatoslav Ryhel }; 1111b457e191SSvyatoslav Ryhel 1112b457e191SSvyatoslav Ryhel /* AUD pinmux */ 1113b457e191SSvyatoslav Ryhel gpio-x4-aud { 1114b457e191SSvyatoslav Ryhel nvidia,pins = "gpio_x4_aud_px4"; 1115b457e191SSvyatoslav Ryhel nvidia,function = "rsvd1"; 1116b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1117b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1118b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1119b457e191SSvyatoslav Ryhel }; 1120b457e191SSvyatoslav Ryhel 1121b457e191SSvyatoslav Ryhel gpio-x1-aud { 1122b457e191SSvyatoslav Ryhel nvidia,pins = "gpio_x1_aud_px1"; 1123b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 1124b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 1125b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1126b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1127b457e191SSvyatoslav Ryhel }; 1128b457e191SSvyatoslav Ryhel 1129b457e191SSvyatoslav Ryhel gpio-x3-aud { 1130b457e191SSvyatoslav Ryhel nvidia,pins = "gpio_x3_aud_px3"; 1131b457e191SSvyatoslav Ryhel nvidia,function = "rsvd3"; 1132b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 1133b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1134b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1135b457e191SSvyatoslav Ryhel }; 1136b457e191SSvyatoslav Ryhel 1137b457e191SSvyatoslav Ryhel gpio-x6-aud { 1138b457e191SSvyatoslav Ryhel nvidia,pins = "gpio_x6_aud_px6"; 1139b457e191SSvyatoslav Ryhel nvidia,function = "rsvd4"; 1140b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_UP>; 1141b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_DISABLE>; 1142b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1143b457e191SSvyatoslav Ryhel }; 1144b457e191SSvyatoslav Ryhel 1145b457e191SSvyatoslav Ryhel usb-vbus { 1146b457e191SSvyatoslav Ryhel nvidia,pins = "usb_vbus_en0_pn4", 1147b457e191SSvyatoslav Ryhel "usb_vbus_en1_pn5"; 1148b457e191SSvyatoslav Ryhel nvidia,function = "rsvd2"; 1149b457e191SSvyatoslav Ryhel nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1150b457e191SSvyatoslav Ryhel nvidia,tristate = <TEGRA_PIN_ENABLE>; 1151b457e191SSvyatoslav Ryhel nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1152b457e191SSvyatoslav Ryhel }; 1153b457e191SSvyatoslav Ryhel 1154b457e191SSvyatoslav Ryhel /* GPIO power/drive control */ 1155b457e191SSvyatoslav Ryhel drive-sdio1 { 1156b457e191SSvyatoslav Ryhel nvidia,pins = "drive_sdio1"; 1157b457e191SSvyatoslav Ryhel nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 1158b457e191SSvyatoslav Ryhel nvidia,schmitt = <TEGRA_PIN_DISABLE>; 1159b457e191SSvyatoslav Ryhel nvidia,pull-down-strength = <36>; 1160b457e191SSvyatoslav Ryhel nvidia,pull-up-strength = <20>; 1161b457e191SSvyatoslav Ryhel nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_SLOW>; 1162b457e191SSvyatoslav Ryhel nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_SLOW>; 1163b457e191SSvyatoslav Ryhel }; 1164b457e191SSvyatoslav Ryhel 1165b457e191SSvyatoslav Ryhel drive-sdio3 { 1166724ba675SRob Herring nvidia,pins = "drive_sdio3"; 1167724ba675SRob Herring nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 1168724ba675SRob Herring nvidia,schmitt = <TEGRA_PIN_DISABLE>; 1169724ba675SRob Herring nvidia,pull-down-strength = <22>; 1170724ba675SRob Herring nvidia,pull-up-strength = <36>; 1171724ba675SRob Herring nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 1172724ba675SRob Herring nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 1173724ba675SRob Herring }; 1174724ba675SRob Herring 1175b457e191SSvyatoslav Ryhel drive-gma { 1176b457e191SSvyatoslav Ryhel nvidia,pins = "drive_gma"; 1177b457e191SSvyatoslav Ryhel nvidia,high-speed-mode = <TEGRA_PIN_ENABLE>; 1178b457e191SSvyatoslav Ryhel nvidia,schmitt = <TEGRA_PIN_DISABLE>; 1179b457e191SSvyatoslav Ryhel nvidia,pull-down-strength = <2>; 1180b457e191SSvyatoslav Ryhel nvidia,pull-up-strength = <2>; 1181b457e191SSvyatoslav Ryhel nvidia,slew-rate-rising = <TEGRA_PIN_SLEW_RATE_FASTEST>; 1182b457e191SSvyatoslav Ryhel nvidia,slew-rate-falling = <TEGRA_PIN_SLEW_RATE_FASTEST>; 1183724ba675SRob Herring }; 1184724ba675SRob Herring }; 1185724ba675SRob Herring }; 1186724ba675SRob Herring 1187724ba675SRob Herring serial@70006040 { 1188724ba675SRob Herring /* GPS */ 1189724ba675SRob Herring }; 1190724ba675SRob Herring 1191724ba675SRob Herring serial@70006200 { 1192724ba675SRob Herring /* Bluetooth */ 1193724ba675SRob Herring }; 1194724ba675SRob Herring 1195724ba675SRob Herring serial@70006300 { 11969766116aSThierry Reding /delete-property/ dmas; 11979766116aSThierry Reding /delete-property/ dma-names; 1198724ba675SRob Herring status = "okay"; 1199724ba675SRob Herring }; 1200724ba675SRob Herring 1201724ba675SRob Herring pwm@7000a000 { 1202724ba675SRob Herring status = "okay"; 1203724ba675SRob Herring }; 1204724ba675SRob Herring 1205724ba675SRob Herring i2c@7000c000 { 1206724ba675SRob Herring status = "okay"; 1207724ba675SRob Herring clock-frequency = <100000>; 1208724ba675SRob Herring 1209724ba675SRob Herring magnetometer@c { 1210724ba675SRob Herring compatible = "asahi-kasei,ak09911"; 1211724ba675SRob Herring reg = <0xc>; 1212724ba675SRob Herring 1213724ba675SRob Herring vdd-supply = <&vdd_3v3_sys>; 1214724ba675SRob Herring }; 1215724ba675SRob Herring 1216724ba675SRob Herring rt5639: audio-codec@1c { 1217724ba675SRob Herring compatible = "realtek,rt5639"; 1218724ba675SRob Herring reg = <0x1c>; 1219724ba675SRob Herring 1220724ba675SRob Herring interrupt-parent = <&gpio>; 1221724ba675SRob Herring interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>; 1222724ba675SRob Herring 1223724ba675SRob Herring realtek,ldo1-en-gpios = <&gpio TEGRA_GPIO(V, 3) GPIO_ACTIVE_HIGH>; 1224724ba675SRob Herring }; 1225724ba675SRob Herring 1226724ba675SRob Herring temp_sensor: temperature-sensor@4c { 1227724ba675SRob Herring compatible = "onnn,nct1008"; 1228724ba675SRob Herring reg = <0x4c>; 1229724ba675SRob Herring 1230724ba675SRob Herring vcc-supply = <&vdd_3v3_sys>; 1231724ba675SRob Herring #thermal-sensor-cells = <1>; 1232724ba675SRob Herring }; 1233724ba675SRob Herring 1234724ba675SRob Herring motion-tracker@68 { 1235724ba675SRob Herring compatible = "invensense,mpu6500"; 1236724ba675SRob Herring reg = <0x68>; 1237724ba675SRob Herring 1238724ba675SRob Herring interrupt-parent = <&gpio>; 1239724ba675SRob Herring interrupts = <TEGRA_GPIO(R, 3) IRQ_TYPE_LEVEL_HIGH>; 1240724ba675SRob Herring 1241724ba675SRob Herring mount-matrix = "0", "-1", "0", 1242724ba675SRob Herring "1", "0", "0", 1243724ba675SRob Herring "0", "0", "1"; 1244724ba675SRob Herring }; 1245724ba675SRob Herring }; 1246724ba675SRob Herring 1247724ba675SRob Herring i2c@7000c400 { 1248724ba675SRob Herring status = "okay"; 1249724ba675SRob Herring clock-frequency = <100000>; 1250724ba675SRob Herring 1251724ba675SRob Herring power-sensor@44 { 1252724ba675SRob Herring compatible = "ti,ina230"; 1253724ba675SRob Herring reg = <0x44>; 1254724ba675SRob Herring }; 1255724ba675SRob Herring }; 1256724ba675SRob Herring 1257724ba675SRob Herring i2c@7000c500 { 1258724ba675SRob Herring status = "okay"; 1259724ba675SRob Herring clock-frequency = <400000>; 1260724ba675SRob Herring 1261724ba675SRob Herring light-sensor@1c { 1262724ba675SRob Herring compatible = "dynaimage,al3320a"; 1263724ba675SRob Herring reg = <0x1c>; 1264724ba675SRob Herring 1265724ba675SRob Herring vdd-supply = <&vdd_3v3_sys>; 1266724ba675SRob Herring }; 1267724ba675SRob Herring }; 1268724ba675SRob Herring 1269724ba675SRob Herring i2c@7000c700 { 1270724ba675SRob Herring /* HDMI DDC */ 1271724ba675SRob Herring }; 1272724ba675SRob Herring 1273724ba675SRob Herring i2c@7000d000 { 1274724ba675SRob Herring status = "okay"; 1275724ba675SRob Herring clock-frequency = <400000>; 1276724ba675SRob Herring 1277724ba675SRob Herring palmas: pmic@58 { 1278724ba675SRob Herring compatible = "ti,tps65913", "ti,palmas"; 1279724ba675SRob Herring reg = <0x58>; 1280724ba675SRob Herring interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 1281724ba675SRob Herring 1282724ba675SRob Herring #interrupt-cells = <2>; 1283724ba675SRob Herring interrupt-controller; 1284724ba675SRob Herring 1285724ba675SRob Herring ti,system-power-controller; 1286724ba675SRob Herring 1287724ba675SRob Herring palmas_gpio: gpio { 1288724ba675SRob Herring compatible = "ti,palmas-gpio"; 1289724ba675SRob Herring gpio-controller; 1290724ba675SRob Herring #gpio-cells = <2>; 1291724ba675SRob Herring }; 1292724ba675SRob Herring 1293724ba675SRob Herring pinmux { 1294724ba675SRob Herring compatible = "ti,tps65913-pinctrl"; 1295724ba675SRob Herring ti,palmas-enable-dvfs1; 1296724ba675SRob Herring 1297724ba675SRob Herring pinctrl-names = "default"; 1298724ba675SRob Herring pinctrl-0 = <&palmas_default>; 1299724ba675SRob Herring 1300724ba675SRob Herring palmas_default: pinmux { 1301724ba675SRob Herring pin_gpio0 { 1302724ba675SRob Herring pins = "gpio0"; 1303724ba675SRob Herring function = "gpio"; 1304724ba675SRob Herring }; 1305724ba675SRob Herring 1306724ba675SRob Herring pin_gpio1 { 1307724ba675SRob Herring pins = "gpio1"; 1308724ba675SRob Herring function = "gpio"; 1309724ba675SRob Herring }; 1310724ba675SRob Herring 1311724ba675SRob Herring pin_gpio2 { 1312724ba675SRob Herring pins = "gpio2"; 1313724ba675SRob Herring function = "gpio"; 1314724ba675SRob Herring }; 1315724ba675SRob Herring 1316724ba675SRob Herring pin_gpio3 { 1317724ba675SRob Herring pins = "gpio3"; 1318724ba675SRob Herring function = "gpio"; 1319724ba675SRob Herring }; 1320724ba675SRob Herring 1321724ba675SRob Herring pin_gpio4 { 1322724ba675SRob Herring pins = "gpio4"; 1323724ba675SRob Herring function = "gpio"; 1324724ba675SRob Herring }; 1325724ba675SRob Herring 1326724ba675SRob Herring pin_gpio5 { 1327724ba675SRob Herring pins = "gpio5"; 1328724ba675SRob Herring function = "gpio"; 1329724ba675SRob Herring }; 1330724ba675SRob Herring 1331724ba675SRob Herring pin_gpio6 { 1332724ba675SRob Herring pins = "gpio6"; 1333724ba675SRob Herring function = "gpio"; 1334724ba675SRob Herring }; 1335724ba675SRob Herring 1336724ba675SRob Herring pin_gpio7 { 1337724ba675SRob Herring pins = "gpio7"; 1338724ba675SRob Herring function = "gpio"; 1339724ba675SRob Herring }; 1340724ba675SRob Herring 1341724ba675SRob Herring pin_powergood { 1342724ba675SRob Herring pins = "powergood"; 1343724ba675SRob Herring function = "powergood"; 1344724ba675SRob Herring }; 1345724ba675SRob Herring 1346724ba675SRob Herring pin_vac { 1347724ba675SRob Herring pins = "vac"; 1348724ba675SRob Herring function = "vac"; 1349724ba675SRob Herring }; 1350724ba675SRob Herring }; 1351724ba675SRob Herring }; 1352724ba675SRob Herring 1353724ba675SRob Herring pmic { 1354724ba675SRob Herring compatible = "ti,tps65913-pmic", "ti,palmas-pmic"; 1355724ba675SRob Herring 1356724ba675SRob Herring ldo1-in-supply = <&tps65913_smps7>; 1357724ba675SRob Herring ldo2-in-supply = <&tps65913_smps7>; 1358724ba675SRob Herring ldo4-in-supply = <&tps65913_smps8>; 1359724ba675SRob Herring ldo5-in-supply = <&tps65913_smps9>; 1360724ba675SRob Herring ldo6-in-supply = <&tps65913_smps9>; 1361724ba675SRob Herring ldo7-in-supply = <&tps65913_smps9>; 1362724ba675SRob Herring ldo9-in-supply = <&tps65913_smps9>; 1363724ba675SRob Herring 1364724ba675SRob Herring regulators { 1365724ba675SRob Herring tps65913_smps123: smps123 { 1366724ba675SRob Herring regulator-name = "vdd-cpu"; 1367724ba675SRob Herring regulator-min-microvolt = <900000>; 1368724ba675SRob Herring regulator-max-microvolt = <1350000>; 1369724ba675SRob Herring regulator-always-on; 1370724ba675SRob Herring regulator-boot-on; 1371724ba675SRob Herring ti,roof-floor = <1>; 1372724ba675SRob Herring ti,mode-sleep = <3>; 1373724ba675SRob Herring }; 1374724ba675SRob Herring 1375724ba675SRob Herring tps65913_smps45: smps45 { 1376724ba675SRob Herring regulator-name = "vdd-core"; 1377724ba675SRob Herring regulator-min-microvolt = <900000>; 1378724ba675SRob Herring regulator-max-microvolt = <1400000>; 1379724ba675SRob Herring regulator-always-on; 1380724ba675SRob Herring regulator-boot-on; 1381724ba675SRob Herring ti,roof-floor = <3>; 1382724ba675SRob Herring }; 1383724ba675SRob Herring 1384724ba675SRob Herring smps6 { 1385724ba675SRob Herring regulator-name = "va-lcd-hv"; 1386724ba675SRob Herring regulator-min-microvolt = <1000000>; 1387724ba675SRob Herring regulator-max-microvolt = <1000000>; 1388724ba675SRob Herring regulator-always-on; 1389724ba675SRob Herring regulator-boot-on; 1390724ba675SRob Herring }; 1391724ba675SRob Herring 1392724ba675SRob Herring tps65913_smps7: smps7 { 1393724ba675SRob Herring regulator-name = "vdd-ddr"; 1394724ba675SRob Herring regulator-min-microvolt = <1350000>; 1395724ba675SRob Herring regulator-max-microvolt = <1350000>; 1396724ba675SRob Herring regulator-always-on; 1397724ba675SRob Herring regulator-boot-on; 1398724ba675SRob Herring }; 1399724ba675SRob Herring 1400724ba675SRob Herring tps65913_smps8: smps8 { 1401724ba675SRob Herring regulator-name = "vdd-1v8"; 1402724ba675SRob Herring regulator-min-microvolt = <1800000>; 1403724ba675SRob Herring regulator-max-microvolt = <1800000>; 1404724ba675SRob Herring regulator-always-on; 1405724ba675SRob Herring regulator-boot-on; 1406724ba675SRob Herring }; 1407724ba675SRob Herring 1408724ba675SRob Herring tps65913_smps9: smps9 { 1409724ba675SRob Herring regulator-name = "vdd-sd"; 1410724ba675SRob Herring regulator-min-microvolt = <2900000>; 1411724ba675SRob Herring regulator-max-microvolt = <2900000>; 1412724ba675SRob Herring regulator-always-on; 1413724ba675SRob Herring }; 1414724ba675SRob Herring 1415724ba675SRob Herring tps65913_smps10_out1: smps10_out1 { 1416724ba675SRob Herring regulator-name = "vd-smps10-out1"; 1417724ba675SRob Herring regulator-min-microvolt = <5000000>; 1418724ba675SRob Herring regulator-max-microvolt = <5000000>; 1419724ba675SRob Herring regulator-always-on; 1420724ba675SRob Herring regulator-boot-on; 1421724ba675SRob Herring }; 1422724ba675SRob Herring 1423724ba675SRob Herring tps65913_smps10_out2: smps10_out2 { 1424724ba675SRob Herring regulator-name = "vd-smps10-out2"; 1425724ba675SRob Herring regulator-min-microvolt = <5000000>; 1426724ba675SRob Herring regulator-max-microvolt = <5000000>; 1427724ba675SRob Herring regulator-always-on; 1428724ba675SRob Herring regulator-boot-on; 1429724ba675SRob Herring }; 1430724ba675SRob Herring 1431724ba675SRob Herring tps65913_ldo1: ldo1 { 1432724ba675SRob Herring regulator-name = "vdd-hdmi-pll"; 1433724ba675SRob Herring regulator-min-microvolt = <1050000>; 1434724ba675SRob Herring regulator-max-microvolt = <1050000>; 1435724ba675SRob Herring regulator-always-on; 1436724ba675SRob Herring ti,roof-floor = <3>; 1437724ba675SRob Herring }; 1438724ba675SRob Herring 1439724ba675SRob Herring tps65913_ldo2: ldo2 { 1440724ba675SRob Herring regulator-name = "vdd-2v8-dsi-csi"; 1441724ba675SRob Herring regulator-min-microvolt = <1200000>; 1442724ba675SRob Herring regulator-max-microvolt = <1200000>; 1443724ba675SRob Herring regulator-boot-on; 1444724ba675SRob Herring }; 1445724ba675SRob Herring 1446724ba675SRob Herring ldo3 { 1447724ba675SRob Herring regulator-name = "vpp-fuse"; 1448724ba675SRob Herring regulator-min-microvolt = <1800000>; 1449724ba675SRob Herring regulator-max-microvolt = <1800000>; 1450724ba675SRob Herring }; 1451724ba675SRob Herring 1452724ba675SRob Herring ldo4 { 1453724ba675SRob Herring regulator-name = "vdd-1v2-cam"; 1454724ba675SRob Herring regulator-min-microvolt = <1200000>; 1455724ba675SRob Herring regulator-max-microvolt = <1200000>; 1456724ba675SRob Herring }; 1457724ba675SRob Herring 1458724ba675SRob Herring ldo5 { 1459724ba675SRob Herring regulator-name = "vdd-cam"; 1460724ba675SRob Herring regulator-min-microvolt = <2800000>; 1461724ba675SRob Herring regulator-max-microvolt = <2800000>; 1462724ba675SRob Herring }; 1463724ba675SRob Herring 1464724ba675SRob Herring ldo6 { 1465724ba675SRob Herring regulator-name = "vdd-dev"; 1466724ba675SRob Herring regulator-min-microvolt = <2850000>; 1467724ba675SRob Herring regulator-max-microvolt = <2850000>; 1468724ba675SRob Herring regulator-boot-on; 1469724ba675SRob Herring }; 1470724ba675SRob Herring 1471724ba675SRob Herring ldo7 { 1472724ba675SRob Herring regulator-name = "vdd-2v8-cam"; 1473724ba675SRob Herring regulator-min-microvolt = <2800000>; 1474724ba675SRob Herring regulator-max-microvolt = <2800000>; 1475724ba675SRob Herring }; 1476724ba675SRob Herring 1477724ba675SRob Herring tps65913_ldo8: ldo8 { 1478724ba675SRob Herring regulator-name = "vdd-rtc"; 1479724ba675SRob Herring regulator-min-microvolt = <950000>; 1480724ba675SRob Herring regulator-max-microvolt = <950000>; 1481724ba675SRob Herring regulator-always-on; 1482724ba675SRob Herring regulator-boot-on; 1483724ba675SRob Herring ti,enable-ldo8-tracking; 1484724ba675SRob Herring }; 1485724ba675SRob Herring 1486724ba675SRob Herring tps65913_ldo9: ldo9 { 1487724ba675SRob Herring regulator-name = "vdd-sdmmc"; 1488724ba675SRob Herring regulator-min-microvolt = <1800000>; 1489724ba675SRob Herring regulator-max-microvolt = <2900000>; 1490724ba675SRob Herring }; 1491724ba675SRob Herring 1492724ba675SRob Herring tps65913_ldoln: ldoln { 1493724ba675SRob Herring regulator-name = "vdd-hdmi"; 1494724ba675SRob Herring regulator-min-microvolt = <3300000>; 1495724ba675SRob Herring regulator-max-microvolt = <3300000>; 1496724ba675SRob Herring }; 1497724ba675SRob Herring 1498724ba675SRob Herring ldousb { 1499724ba675SRob Herring regulator-name = "vdd-usb"; 1500724ba675SRob Herring regulator-min-microvolt = <3300000>; 1501724ba675SRob Herring regulator-max-microvolt = <3300000>; 1502724ba675SRob Herring regulator-always-on; 1503724ba675SRob Herring regulator-boot-on; 1504724ba675SRob Herring }; 1505724ba675SRob Herring }; 1506724ba675SRob Herring }; 1507724ba675SRob Herring 1508724ba675SRob Herring rtc { 1509724ba675SRob Herring compatible = "ti,palmas-rtc"; 1510724ba675SRob Herring interrupt-parent = <&palmas>; 1511724ba675SRob Herring interrupts = <8 0>; 1512724ba675SRob Herring }; 1513724ba675SRob Herring }; 1514724ba675SRob Herring }; 1515724ba675SRob Herring 1516724ba675SRob Herring ahub@70080000 { 1517724ba675SRob Herring i2s@70080300 { 1518724ba675SRob Herring status = "okay"; 1519724ba675SRob Herring }; 1520724ba675SRob Herring }; 1521724ba675SRob Herring 1522724ba675SRob Herring mmc@78000000 { 1523724ba675SRob Herring /* WiFi */ 1524724ba675SRob Herring }; 1525724ba675SRob Herring 1526724ba675SRob Herring /* MicroSD card */ 1527724ba675SRob Herring mmc@78000400 { 1528724ba675SRob Herring status = "okay"; 1529724ba675SRob Herring 1530724ba675SRob Herring bus-width = <4>; 1531724ba675SRob Herring cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; 1532724ba675SRob Herring 1533724ba675SRob Herring nvidia,default-tap = <0x3>; 1534724ba675SRob Herring nvidia,default-trim = <0x3>; 1535724ba675SRob Herring 1536724ba675SRob Herring vmmc-supply = <&vdd_usd>; 1537724ba675SRob Herring vqmmc-supply = <&tps65913_ldo9>; 1538724ba675SRob Herring }; 1539724ba675SRob Herring 1540724ba675SRob Herring mmc@78000600 { 1541724ba675SRob Herring /* eMMC */ 1542724ba675SRob Herring }; 1543724ba675SRob Herring 1544724ba675SRob Herring usb@7d000000 { 1545724ba675SRob Herring compatible = "nvidia,tegra114-udc"; 1546724ba675SRob Herring status = "okay"; 1547724ba675SRob Herring dr_mode = "peripheral"; 1548724ba675SRob Herring 1549724ba675SRob Herring /* Peripheral USB via ASUS connector */ 1550724ba675SRob Herring }; 1551724ba675SRob Herring 1552724ba675SRob Herring usb-phy@7d000000 { 1553724ba675SRob Herring status = "okay"; 1554724ba675SRob Herring }; 1555724ba675SRob Herring 1556724ba675SRob Herring usb@7d008000 { 1557724ba675SRob Herring status = "okay"; 1558724ba675SRob Herring 1559724ba675SRob Herring /* Host USB via dock */ 1560724ba675SRob Herring }; 1561724ba675SRob Herring 1562724ba675SRob Herring usb-phy@7d008000 { 1563724ba675SRob Herring status = "okay"; 1564724ba675SRob Herring vbus-supply = <&vdd_5v0_sys>; 1565724ba675SRob Herring }; 1566724ba675SRob Herring 1567724ba675SRob Herring backlight: backlight { 1568724ba675SRob Herring compatible = "pwm-backlight"; 1569724ba675SRob Herring 1570724ba675SRob Herring enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; 1571724ba675SRob Herring power-supply = <&vdd_5v0_sys>; 1572724ba675SRob Herring pwms = <&pwm 1 1000000>; 1573724ba675SRob Herring 1574724ba675SRob Herring brightness-levels = <1 255>; 1575724ba675SRob Herring num-interpolated-steps = <254>; 1576724ba675SRob Herring default-brightness-level = <224>; 1577724ba675SRob Herring }; 1578724ba675SRob Herring 1579724ba675SRob Herring /* PMIC has a built-in 32KHz oscillator which is used by PMC */ 1580724ba675SRob Herring clk32k_in: clock-32k { 1581724ba675SRob Herring compatible = "fixed-clock"; 1582724ba675SRob Herring #clock-cells = <0>; 1583724ba675SRob Herring clock-frequency = <32768>; 1584724ba675SRob Herring clock-output-names = "pmic-oscillator"; 1585724ba675SRob Herring }; 1586724ba675SRob Herring 1587724ba675SRob Herring gpio-hall-sensor { 1588724ba675SRob Herring compatible = "gpio-keys"; 1589724ba675SRob Herring 1590724ba675SRob Herring label = "GPIO Hall Effect Sensor"; 1591724ba675SRob Herring 1592724ba675SRob Herring switch-hall-sensor { 1593724ba675SRob Herring label = "Hall Effect Sensor"; 1594724ba675SRob Herring gpios = <&gpio TEGRA_GPIO(O, 5) GPIO_ACTIVE_LOW>; 1595724ba675SRob Herring linux,input-type = <EV_SW>; 1596724ba675SRob Herring linux,code = <SW_LID>; 1597724ba675SRob Herring linux,can-disable; 1598724ba675SRob Herring wakeup-source; 1599724ba675SRob Herring }; 1600724ba675SRob Herring }; 1601724ba675SRob Herring 1602724ba675SRob Herring gpio-keys { 1603724ba675SRob Herring compatible = "gpio-keys"; 1604724ba675SRob Herring 1605724ba675SRob Herring label = "GPIO Buttons"; 1606724ba675SRob Herring 1607724ba675SRob Herring button-power { 1608724ba675SRob Herring label = "Power"; 1609724ba675SRob Herring gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; 1610724ba675SRob Herring linux,code = <KEY_POWER>; 1611724ba675SRob Herring debounce-interval = <10>; 1612724ba675SRob Herring wakeup-source; 1613724ba675SRob Herring }; 1614724ba675SRob Herring 1615724ba675SRob Herring button-volume-down { 1616724ba675SRob Herring label = "Volume Down"; 1617724ba675SRob Herring gpios = <&gpio TEGRA_GPIO(R, 1) GPIO_ACTIVE_LOW>; 1618724ba675SRob Herring linux,code = <KEY_VOLUMEDOWN>; 1619724ba675SRob Herring debounce-interval = <10>; 1620724ba675SRob Herring }; 1621724ba675SRob Herring 1622724ba675SRob Herring button-volume-up { 1623724ba675SRob Herring label = "Volume Up"; 1624724ba675SRob Herring gpios = <&gpio TEGRA_GPIO(R, 2) GPIO_ACTIVE_LOW>; 1625724ba675SRob Herring linux,code = <KEY_VOLUMEUP>; 1626724ba675SRob Herring debounce-interval = <10>; 1627724ba675SRob Herring }; 1628724ba675SRob Herring }; 1629724ba675SRob Herring 1630724ba675SRob Herring sound { 1631724ba675SRob Herring compatible = "asus,tegra-audio-rt5639-tf701t", 1632724ba675SRob Herring "nvidia,tegra-audio-rt5640"; 1633724ba675SRob Herring nvidia,model = "Asus Transformer Pad TF701T RT5639"; 1634724ba675SRob Herring 1635724ba675SRob Herring nvidia,audio-routing = 1636724ba675SRob Herring "Headphones", "HPOR", 1637724ba675SRob Herring "Headphones", "HPOL", 1638724ba675SRob Herring "Speakers", "SPORP", 1639724ba675SRob Herring "Speakers", "SPORN", 1640724ba675SRob Herring "Speakers", "SPOLP", 1641724ba675SRob Herring "Speakers", "SPOLN", 1642724ba675SRob Herring "Mic Jack", "MICBIAS1", 1643724ba675SRob Herring "IN2P", "Mic Jack"; 1644724ba675SRob Herring 1645724ba675SRob Herring nvidia,i2s-controller = <&tegra_i2s0>; 1646724ba675SRob Herring nvidia,audio-codec = <&rt5639>; 1647724ba675SRob Herring 1648724ba675SRob Herring nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_LOW>; 1649724ba675SRob Herring 1650724ba675SRob Herring clocks = <&tegra_car TEGRA114_CLK_PLL_A>, 1651724ba675SRob Herring <&tegra_car TEGRA114_CLK_PLL_A_OUT0>, 1652724ba675SRob Herring <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1653724ba675SRob Herring clock-names = "pll_a", "pll_a_out0", "mclk"; 1654724ba675SRob Herring 1655724ba675SRob Herring assigned-clocks = <&tegra_car TEGRA114_CLK_EXTERN1>, 1656724ba675SRob Herring <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 1657724ba675SRob Herring 1658724ba675SRob Herring assigned-clock-parents = <&tegra_car TEGRA114_CLK_PLL_A_OUT0>, 1659724ba675SRob Herring <&tegra_car TEGRA114_CLK_EXTERN1>; 1660724ba675SRob Herring }; 1661724ba675SRob Herring 1662724ba675SRob Herring vdd_5v0_sys: regulator-5v0-sys { 1663724ba675SRob Herring compatible = "regulator-fixed"; 1664724ba675SRob Herring regulator-name = "vdd_5v0"; 1665724ba675SRob Herring regulator-min-microvolt = <5000000>; 1666724ba675SRob Herring regulator-max-microvolt = <5000000>; 1667724ba675SRob Herring regulator-always-on; 1668724ba675SRob Herring regulator-boot-on; 1669724ba675SRob Herring }; 1670724ba675SRob Herring 1671724ba675SRob Herring vdd_3v3_sys: regulator-3v3-sys { 1672724ba675SRob Herring compatible = "regulator-fixed"; 1673724ba675SRob Herring regulator-name = "vdd_3v3"; 1674724ba675SRob Herring regulator-min-microvolt = <3300000>; 1675724ba675SRob Herring regulator-max-microvolt = <3300000>; 1676724ba675SRob Herring regulator-always-on; 1677724ba675SRob Herring regulator-boot-on; 1678724ba675SRob Herring }; 1679724ba675SRob Herring 1680724ba675SRob Herring vdd_lcd: regulator-vdd-lcd { 1681724ba675SRob Herring compatible = "regulator-fixed"; 1682724ba675SRob Herring regulator-name = "vdd_lcd_1v8"; 1683724ba675SRob Herring regulator-min-microvolt = <1800000>; 1684724ba675SRob Herring regulator-max-microvolt = <1800000>; 1685724ba675SRob Herring vin-supply = <&tps65913_smps8>; 1686724ba675SRob Herring enable-active-high; 1687724ba675SRob Herring gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>; 1688724ba675SRob Herring regulator-boot-on; 1689724ba675SRob Herring }; 1690724ba675SRob Herring 1691724ba675SRob Herring vdd_usd: regulator-vdd-usd { 1692724ba675SRob Herring compatible = "regulator-fixed"; 1693724ba675SRob Herring regulator-name = "vdd_sd_slot"; 1694724ba675SRob Herring regulator-min-microvolt = <2900000>; 1695724ba675SRob Herring regulator-max-microvolt = <2900000>; 1696724ba675SRob Herring vin-supply = <&tps65913_smps9>; 1697724ba675SRob Herring enable-active-high; 1698724ba675SRob Herring gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; 1699724ba675SRob Herring }; 1700724ba675SRob Herring}; 1701