1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2724ba675SRob Herring/* 3724ba675SRob Herring * Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au> 4724ba675SRob Herring */ 5724ba675SRob Herring 6724ba675SRob Herring/ { 7724ba675SRob Herring #address-cells = <1>; 8724ba675SRob Herring #size-cells = <1>; 9724ba675SRob Herring interrupt-parent = <&intc>; 10724ba675SRob Herring 11724ba675SRob Herring cpus { 123fa966ebSAndrew Davis #address-cells = <1>; 133fa966ebSAndrew Davis #size-cells = <0>; 143fa966ebSAndrew Davis 15724ba675SRob Herring cpu@0 { 16724ba675SRob Herring compatible = "arm,arm926ej-s"; 173fa966ebSAndrew Davis device_type = "cpu"; 183fa966ebSAndrew Davis reg = <0>; 19724ba675SRob Herring }; 20724ba675SRob Herring }; 21724ba675SRob Herring 22724ba675SRob Herring bootrom: bootrom@0 { 23724ba675SRob Herring reg = <0x00000000 0x80000>; 24724ba675SRob Herring }; 25724ba675SRob Herring 26724ba675SRob Herring sram: sram@a4000000 { 2708fcaae1SAndrew Davis compatible = "mmio-sram"; 2808fcaae1SAndrew Davis reg = <0xa4000000 0x20000>; /* 128k */ 2908fcaae1SAndrew Davis #address-cells = <1>; 3008fcaae1SAndrew Davis #size-cells = <1>; 3108fcaae1SAndrew Davis ranges = <0 0xa4000000 0x20000>; 3208fcaae1SAndrew Davis 3308fcaae1SAndrew Davis sram@0 { 3408fcaae1SAndrew Davis reg = <0x0 0x20000>; 3508fcaae1SAndrew Davis }; 36724ba675SRob Herring }; 37724ba675SRob Herring 38724ba675SRob Herring timer_clk: timer_clk { 39724ba675SRob Herring #clock-cells = <0>; 40724ba675SRob Herring compatible = "fixed-clock"; 41724ba675SRob Herring clock-frequency = <32768>; 42724ba675SRob Herring }; 43724ba675SRob Herring 44724ba675SRob Herring base_clk: base_clk { 45724ba675SRob Herring #clock-cells = <0>; 46724ba675SRob Herring reg = <0x900b0024 0x4>; 47724ba675SRob Herring }; 48724ba675SRob Herring 49724ba675SRob Herring ahb_clk: ahb_clk { 50724ba675SRob Herring #clock-cells = <0>; 51724ba675SRob Herring reg = <0x900b0024 0x4>; 52724ba675SRob Herring clocks = <&base_clk>; 53724ba675SRob Herring }; 54724ba675SRob Herring 55724ba675SRob Herring apb_pclk: apb_pclk { 56724ba675SRob Herring #clock-cells = <0>; 57724ba675SRob Herring compatible = "fixed-factor-clock"; 58724ba675SRob Herring clock-div = <2>; 59724ba675SRob Herring clock-mult = <1>; 60724ba675SRob Herring clocks = <&ahb_clk>; 61724ba675SRob Herring }; 62724ba675SRob Herring 63724ba675SRob Herring usb_phy: usb_phy { 64724ba675SRob Herring compatible = "usb-nop-xceiv"; 65724ba675SRob Herring #phy-cells = <0>; 66724ba675SRob Herring }; 67724ba675SRob Herring 68724ba675SRob Herring vbus_reg: vbus_reg { 69724ba675SRob Herring compatible = "regulator-fixed"; 70724ba675SRob Herring 71724ba675SRob Herring regulator-name = "USB VBUS output"; 72724ba675SRob Herring 73724ba675SRob Herring regulator-min-microvolt = <5000000>; 74724ba675SRob Herring regulator-max-microvolt = <5000000>; 75724ba675SRob Herring }; 76724ba675SRob Herring 77724ba675SRob Herring ahb { 78724ba675SRob Herring compatible = "simple-bus"; 79724ba675SRob Herring #address-cells = <1>; 80724ba675SRob Herring #size-cells = <1>; 81724ba675SRob Herring ranges; 82724ba675SRob Herring 83724ba675SRob Herring spi: spi@a9000000 { 84724ba675SRob Herring reg = <0xa9000000 0x1000>; 85724ba675SRob Herring }; 86724ba675SRob Herring 87724ba675SRob Herring usb0: usb@b0000000 { 88724ba675SRob Herring compatible = "lsi,zevio-usb"; 89724ba675SRob Herring reg = <0xb0000000 0x1000>; 90724ba675SRob Herring interrupts = <8>; 91724ba675SRob Herring 92724ba675SRob Herring usb-phy = <&usb_phy>; 93724ba675SRob Herring vbus-supply = <&vbus_reg>; 94724ba675SRob Herring }; 95724ba675SRob Herring 96724ba675SRob Herring usb1: usb@b4000000 { 97724ba675SRob Herring reg = <0xb4000000 0x1000>; 98724ba675SRob Herring interrupts = <9>; 99724ba675SRob Herring status = "disabled"; 100724ba675SRob Herring }; 101724ba675SRob Herring 102724ba675SRob Herring lcd: lcd@c0000000 { 103724ba675SRob Herring compatible = "arm,pl111", "arm,primecell"; 104724ba675SRob Herring reg = <0xc0000000 0x1000>; 105724ba675SRob Herring interrupts = <21>; 106724ba675SRob Herring 107724ba675SRob Herring /* 108724ba675SRob Herring * We assume the same clock is fed to APB and CLCDCLK. 109724ba675SRob Herring * There is some code to scale the clock down by a factor 110724ba675SRob Herring * 48 for the display so likely the frequency to the 111724ba675SRob Herring * display is 1MHz and the CLCDCLK is 48 MHz. 112724ba675SRob Herring */ 113724ba675SRob Herring clocks = <&apb_pclk>, <&apb_pclk>; 114724ba675SRob Herring clock-names = "clcdclk", "apb_pclk"; 115724ba675SRob Herring }; 116724ba675SRob Herring 117724ba675SRob Herring adc: adc@c4000000 { 118724ba675SRob Herring reg = <0xc4000000 0x1000>; 119724ba675SRob Herring interrupts = <11>; 120724ba675SRob Herring }; 121724ba675SRob Herring 122724ba675SRob Herring tdes: crypto@c8010000 { 123724ba675SRob Herring reg = <0xc8010000 0x1000>; 124724ba675SRob Herring }; 125724ba675SRob Herring 126724ba675SRob Herring sha256: crypto@cc000000 { 127724ba675SRob Herring reg = <0xcc000000 0x1000>; 128724ba675SRob Herring }; 129724ba675SRob Herring 130724ba675SRob Herring apb@90000000 { 131724ba675SRob Herring compatible = "simple-bus"; 132724ba675SRob Herring #address-cells = <1>; 133724ba675SRob Herring #size-cells = <1>; 134724ba675SRob Herring clock-ranges; 135724ba675SRob Herring ranges; 136724ba675SRob Herring 137724ba675SRob Herring gpio: gpio@90000000 { 138724ba675SRob Herring compatible = "lsi,zevio-gpio"; 139724ba675SRob Herring reg = <0x90000000 0x1000>; 140724ba675SRob Herring interrupts = <7>; 141724ba675SRob Herring gpio-controller; 142724ba675SRob Herring #gpio-cells = <2>; 143724ba675SRob Herring }; 144724ba675SRob Herring 145724ba675SRob Herring fast_timer: timer@90010000 { 146724ba675SRob Herring reg = <0x90010000 0x1000>; 147724ba675SRob Herring interrupts = <17>; 148724ba675SRob Herring }; 149724ba675SRob Herring 150724ba675SRob Herring uart: serial@90020000 { 151724ba675SRob Herring reg = <0x90020000 0x1000>; 152724ba675SRob Herring interrupts = <1>; 153724ba675SRob Herring }; 154724ba675SRob Herring 155724ba675SRob Herring timer0: timer@900c0000 { 156724ba675SRob Herring reg = <0x900c0000 0x1000>; 157724ba675SRob Herring clocks = <&timer_clk>, <&timer_clk>, 158724ba675SRob Herring <&timer_clk>; 159724ba675SRob Herring clock-names = "timer0clk", "timer1clk", 160724ba675SRob Herring "apb_pclk"; 161724ba675SRob Herring }; 162724ba675SRob Herring 163724ba675SRob Herring timer1: timer@900d0000 { 164724ba675SRob Herring reg = <0x900d0000 0x1000>; 165724ba675SRob Herring interrupts = <19>; 166724ba675SRob Herring clocks = <&timer_clk>, <&timer_clk>, 167724ba675SRob Herring <&timer_clk>; 168724ba675SRob Herring clock-names = "timer0clk", "timer1clk", 169724ba675SRob Herring "apb_pclk"; 170724ba675SRob Herring }; 171724ba675SRob Herring 172724ba675SRob Herring watchdog: watchdog@90060000 { 173*c322d10fSAndrew Davis compatible = "arm,sp805", "arm,primecell"; 174724ba675SRob Herring reg = <0x90060000 0x1000>; 175724ba675SRob Herring interrupts = <3>; 176*c322d10fSAndrew Davis clocks = <&apb_pclk>, <&apb_pclk>; 177*c322d10fSAndrew Davis clock-names = "wdog_clk", "apb_pclk"; 178*c322d10fSAndrew Davis status = "disabled"; 179724ba675SRob Herring }; 180724ba675SRob Herring 181724ba675SRob Herring rtc: rtc@90090000 { 182724ba675SRob Herring reg = <0x90090000 0x1000>; 183724ba675SRob Herring interrupts = <4>; 184724ba675SRob Herring }; 185724ba675SRob Herring 186724ba675SRob Herring misc: misc@900a0000 { 1878c9a2d41SAndrew Davis compatible = "ti,nspire-misc", "syscon", "simple-mfd"; 188724ba675SRob Herring reg = <0x900a0000 0x1000>; 1898c9a2d41SAndrew Davis 1908c9a2d41SAndrew Davis reboot { 1918c9a2d41SAndrew Davis compatible = "syscon-reboot"; 1928c9a2d41SAndrew Davis offset = <0x08>; 1938c9a2d41SAndrew Davis value = <0x02>; 1948c9a2d41SAndrew Davis }; 195724ba675SRob Herring }; 196724ba675SRob Herring 197724ba675SRob Herring pwr: pwr@900b0000 { 198724ba675SRob Herring reg = <0x900b0000 0x1000>; 199724ba675SRob Herring interrupts = <15>; 200724ba675SRob Herring }; 201724ba675SRob Herring 202724ba675SRob Herring keypad: input@900e0000 { 203724ba675SRob Herring compatible = "ti,nspire-keypad"; 204724ba675SRob Herring reg = <0x900e0000 0x1000>; 205724ba675SRob Herring interrupts = <16>; 206724ba675SRob Herring 207724ba675SRob Herring scan-interval = <1000>; 208724ba675SRob Herring row-delay = <200>; 209724ba675SRob Herring 210724ba675SRob Herring clocks = <&apb_pclk>; 211724ba675SRob Herring }; 212724ba675SRob Herring 213724ba675SRob Herring contrast: contrast@900f0000 { 214724ba675SRob Herring reg = <0x900f0000 0x1000>; 215724ba675SRob Herring }; 216724ba675SRob Herring 217724ba675SRob Herring led: led@90110000 { 218724ba675SRob Herring reg = <0x90110000 0x1000>; 219724ba675SRob Herring }; 220724ba675SRob Herring }; 221724ba675SRob Herring }; 222724ba675SRob Herring}; 223