xref: /linux/scripts/dtc/include-prefixes/arm/nspire/nspire-classic.dtsi (revision 34069d12e239ae8f36dd96c378e4622fb1c42a76)
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 *  linux/arch/arm/boot/nspire-classic.dts
4 *
5 *  Copyright (C) 2013 Daniel Tang <tangrs@tangrs.id.au>
6 */
7
8/include/ "nspire.dtsi"
9
10&lcd {
11	port {
12		clcd_pads: endpoint {
13			remote-endpoint = <&panel_in>;
14		};
15	};
16};
17
18&fast_timer {
19	/* compatible = "lsi,zevio-timer"; */
20	reg = <0x90010000 0x1000>, <0x900a0010 0x8>;
21};
22
23&uart {
24	compatible = "ns16550";
25	reg-shift = <2>;
26	reg-io-width = <4>;
27	clocks = <&apb_pclk>;
28	no-loopback-test;
29};
30
31&timer0 {
32	/* compatible = "lsi,zevio-timer"; */
33	reg = <0x900c0000 0x1000>, <0x900a0018 0x8>;
34};
35
36&timer1 {
37	compatible = "lsi,zevio-timer";
38	reg = <0x900d0000 0x1000>, <0x900a0020 0x8>;
39};
40
41&keypad {
42	active-low;
43
44};
45
46&base_clk {
47	compatible = "lsi,nspire-classic-clock";
48};
49
50&ahb_clk {
51	compatible = "lsi,nspire-classic-ahb-divider";
52};
53
54
55&vbus_reg {
56	gpio = <&gpio 5 0>;
57};
58
59/ {
60	memory {
61		device_type = "memory";
62		reg = <0x10000000 0x2000000>; /* 32 MB */
63	};
64
65	ahb {
66		#address-cells = <1>;
67		#size-cells = <1>;
68
69		intc: interrupt-controller@dc000000 {
70			compatible = "lsi,zevio-intc";
71			interrupt-controller;
72			reg = <0xdc000000 0x1000>;
73			#interrupt-cells = <1>;
74		};
75	};
76
77	panel {
78		compatible = "ti,nspire-classic-lcd-panel";
79		port {
80			panel_in: endpoint {
81				remote-endpoint = <&clcd_pads>;
82			};
83		};
84	};
85	chosen {
86		bootargs = "debug earlyprintk console=tty0 console=ttyS0,115200n8 root=/dev/ram0";
87	};
88};
89