xref: /linux/scripts/dtc/include-prefixes/arm/microchip/sama5d2.dtsi (revision 60675d4ca1ef0857e44eba5849b74a3a998d0c0f)
1724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2724ba675SRob Herring/*
3724ba675SRob Herring * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC
4724ba675SRob Herring *
5724ba675SRob Herring *  Copyright (C) 2015 Atmel,
6724ba675SRob Herring *                2015 Ludovic Desroches <ludovic.desroches@atmel.com>
7724ba675SRob Herring */
8724ba675SRob Herring
9724ba675SRob Herring#include <dt-bindings/dma/at91.h>
10724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h>
11724ba675SRob Herring#include <dt-bindings/clock/at91.h>
12724ba675SRob Herring#include <dt-bindings/mfd/at91-usart.h>
13724ba675SRob Herring#include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
14724ba675SRob Herring
15724ba675SRob Herring/ {
16724ba675SRob Herring	#address-cells = <1>;
17724ba675SRob Herring	#size-cells = <1>;
18724ba675SRob Herring	model = "Atmel SAMA5D2 family SoC";
19724ba675SRob Herring	compatible = "atmel,sama5d2";
20724ba675SRob Herring	interrupt-parent = <&aic>;
21724ba675SRob Herring
22724ba675SRob Herring	aliases {
23724ba675SRob Herring		serial0 = &uart1;
24724ba675SRob Herring		serial1 = &uart3;
25724ba675SRob Herring	};
26724ba675SRob Herring
27724ba675SRob Herring	cpus {
28724ba675SRob Herring		#address-cells = <1>;
29724ba675SRob Herring		#size-cells = <0>;
30724ba675SRob Herring
31724ba675SRob Herring		cpu@0 {
32724ba675SRob Herring			device_type = "cpu";
33724ba675SRob Herring			compatible = "arm,cortex-a5";
34724ba675SRob Herring			reg = <0>;
35724ba675SRob Herring			next-level-cache = <&L2>;
36724ba675SRob Herring		};
37724ba675SRob Herring	};
38724ba675SRob Herring
39724ba675SRob Herring	pmu {
40724ba675SRob Herring		compatible = "arm,cortex-a5-pmu";
41724ba675SRob Herring		interrupts = <2 IRQ_TYPE_LEVEL_HIGH 0>;
42724ba675SRob Herring	};
43724ba675SRob Herring
44724ba675SRob Herring	etb@740000 {
45724ba675SRob Herring		compatible = "arm,coresight-etb10", "arm,primecell";
46724ba675SRob Herring		reg = <0x740000 0x1000>;
47724ba675SRob Herring
48724ba675SRob Herring		clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
49724ba675SRob Herring		clock-names = "apb_pclk";
50724ba675SRob Herring
51724ba675SRob Herring		in-ports {
52724ba675SRob Herring			port {
53724ba675SRob Herring				etb_in: endpoint {
54724ba675SRob Herring					remote-endpoint = <&etm_out>;
55724ba675SRob Herring				};
56724ba675SRob Herring			};
57724ba675SRob Herring		};
58724ba675SRob Herring	};
59724ba675SRob Herring
60724ba675SRob Herring	etm@73c000 {
61724ba675SRob Herring		compatible = "arm,coresight-etm3x", "arm,primecell";
62724ba675SRob Herring		reg = <0x73c000 0x1000>;
63724ba675SRob Herring
64724ba675SRob Herring		clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
65724ba675SRob Herring		clock-names = "apb_pclk";
66724ba675SRob Herring
67724ba675SRob Herring		out-ports {
68724ba675SRob Herring			port {
69724ba675SRob Herring				etm_out: endpoint {
70724ba675SRob Herring					remote-endpoint = <&etb_in>;
71724ba675SRob Herring				};
72724ba675SRob Herring			};
73724ba675SRob Herring		};
74724ba675SRob Herring	};
75724ba675SRob Herring
76724ba675SRob Herring	memory@20000000 {
77724ba675SRob Herring		device_type = "memory";
78724ba675SRob Herring		reg = <0x20000000 0x20000000>;
79724ba675SRob Herring	};
80724ba675SRob Herring
81724ba675SRob Herring	clocks {
82724ba675SRob Herring		slow_xtal: slow_xtal {
83724ba675SRob Herring			compatible = "fixed-clock";
84724ba675SRob Herring			#clock-cells = <0>;
85724ba675SRob Herring			clock-frequency = <0>;
86724ba675SRob Herring		};
87724ba675SRob Herring
88724ba675SRob Herring		main_xtal: main_xtal {
89724ba675SRob Herring			compatible = "fixed-clock";
90724ba675SRob Herring			#clock-cells = <0>;
91724ba675SRob Herring			clock-frequency = <0>;
92724ba675SRob Herring		};
93724ba675SRob Herring	};
94724ba675SRob Herring
95724ba675SRob Herring	ns_sram: sram@200000 {
96724ba675SRob Herring		compatible = "mmio-sram";
97724ba675SRob Herring		reg = <0x00200000 0x20000>;
98724ba675SRob Herring		#address-cells = <1>;
99724ba675SRob Herring		#size-cells = <1>;
100724ba675SRob Herring		ranges = <0 0x00200000 0x20000>;
101724ba675SRob Herring	};
102724ba675SRob Herring
103724ba675SRob Herring	resistive_touch: resistive-touch {
104724ba675SRob Herring		compatible = "resistive-adc-touch";
105724ba675SRob Herring		io-channels = <&adc AT91_SAMA5D2_ADC_X_CHANNEL>,
106724ba675SRob Herring			      <&adc AT91_SAMA5D2_ADC_Y_CHANNEL>,
107724ba675SRob Herring			      <&adc AT91_SAMA5D2_ADC_P_CHANNEL>;
108724ba675SRob Herring		io-channel-names = "x", "y", "pressure";
109724ba675SRob Herring		touchscreen-min-pressure = <50000>;
110724ba675SRob Herring		status = "disabled";
111724ba675SRob Herring	};
112724ba675SRob Herring
113724ba675SRob Herring	ahb {
114724ba675SRob Herring		compatible = "simple-bus";
115724ba675SRob Herring		#address-cells = <1>;
116724ba675SRob Herring		#size-cells = <1>;
117724ba675SRob Herring		ranges;
118724ba675SRob Herring
119724ba675SRob Herring		nfc_sram: sram@100000 {
120724ba675SRob Herring			compatible = "mmio-sram";
121724ba675SRob Herring			no-memory-wc;
122724ba675SRob Herring			reg = <0x00100000 0x2400>;
123724ba675SRob Herring			#address-cells = <1>;
124724ba675SRob Herring			#size-cells = <1>;
125724ba675SRob Herring			ranges = <0 0x00100000 0x2400>;
126724ba675SRob Herring
127724ba675SRob Herring		};
128724ba675SRob Herring
129724ba675SRob Herring		usb0: gadget@300000 {
130724ba675SRob Herring			compatible = "atmel,sama5d3-udc";
131724ba675SRob Herring			reg = <0x00300000 0x100000
132724ba675SRob Herring			       0xfc02c000 0x400>;
133724ba675SRob Herring			interrupts = <42 IRQ_TYPE_LEVEL_HIGH 2>;
134724ba675SRob Herring			clocks = <&pmc PMC_TYPE_PERIPHERAL 42>, <&pmc PMC_TYPE_CORE PMC_UTMI>;
135724ba675SRob Herring			clock-names = "pclk", "hclk";
136724ba675SRob Herring			status = "disabled";
137724ba675SRob Herring		};
138724ba675SRob Herring
139724ba675SRob Herring		usb1: ohci@400000 {
140724ba675SRob Herring			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
141724ba675SRob Herring			reg = <0x00400000 0x100000>;
142724ba675SRob Herring			interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
143724ba675SRob Herring			clocks = <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_PERIPHERAL 41>, <&pmc PMC_TYPE_SYSTEM 6>;
144724ba675SRob Herring			clock-names = "ohci_clk", "hclk", "uhpck";
145724ba675SRob Herring			status = "disabled";
146724ba675SRob Herring		};
147724ba675SRob Herring
148724ba675SRob Herring		usb2: ehci@500000 {
149724ba675SRob Herring			compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
150724ba675SRob Herring			reg = <0x00500000 0x100000>;
151724ba675SRob Herring			interrupts = <41 IRQ_TYPE_LEVEL_HIGH 2>;
152724ba675SRob Herring			clocks = <&pmc PMC_TYPE_CORE PMC_UTMI>, <&pmc PMC_TYPE_PERIPHERAL 41>;
153724ba675SRob Herring			clock-names = "usb_clk", "ehci_clk";
154724ba675SRob Herring			status = "disabled";
155724ba675SRob Herring		};
156724ba675SRob Herring
157724ba675SRob Herring		L2: cache-controller@a00000 {
158724ba675SRob Herring			compatible = "arm,pl310-cache";
159724ba675SRob Herring			reg = <0x00a00000 0x1000>;
160724ba675SRob Herring			interrupts = <63 IRQ_TYPE_LEVEL_HIGH 4>;
161724ba675SRob Herring			cache-unified;
162724ba675SRob Herring			cache-level = <2>;
163724ba675SRob Herring		};
164724ba675SRob Herring
165724ba675SRob Herring		ebi: ebi@10000000 {
166724ba675SRob Herring			compatible = "atmel,sama5d3-ebi";
167724ba675SRob Herring			#address-cells = <2>;
168724ba675SRob Herring			#size-cells = <1>;
169724ba675SRob Herring			atmel,smc = <&hsmc>;
170724ba675SRob Herring			reg = <0x10000000 0x10000000
171724ba675SRob Herring			       0x60000000 0x30000000>;
172724ba675SRob Herring			ranges = <0x0 0x0 0x10000000 0x10000000
173724ba675SRob Herring				  0x1 0x0 0x60000000 0x10000000
174724ba675SRob Herring				  0x2 0x0 0x70000000 0x10000000
175724ba675SRob Herring				  0x3 0x0 0x80000000 0x10000000>;
176724ba675SRob Herring			clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
177724ba675SRob Herring			status = "disabled";
178724ba675SRob Herring
179724ba675SRob Herring			nand_controller: nand-controller {
180724ba675SRob Herring				compatible = "atmel,sama5d3-nand-controller";
181724ba675SRob Herring				atmel,nfc-sram = <&nfc_sram>;
182724ba675SRob Herring				atmel,nfc-io = <&nfc_io>;
183724ba675SRob Herring				ecc-engine = <&pmecc>;
184724ba675SRob Herring				#address-cells = <2>;
185724ba675SRob Herring				#size-cells = <1>;
186724ba675SRob Herring				ranges;
187724ba675SRob Herring				status = "disabled";
188724ba675SRob Herring			};
189724ba675SRob Herring		};
190724ba675SRob Herring
191724ba675SRob Herring		sdmmc0: sdio-host@a0000000 {
192724ba675SRob Herring			compatible = "atmel,sama5d2-sdhci";
193724ba675SRob Herring			reg = <0xa0000000 0x300>;
194724ba675SRob Herring			interrupts = <31 IRQ_TYPE_LEVEL_HIGH 0>;
195724ba675SRob Herring			clocks = <&pmc PMC_TYPE_PERIPHERAL 31>, <&pmc PMC_TYPE_GCK 31>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
196724ba675SRob Herring			clock-names = "hclock", "multclk", "baseclk";
197724ba675SRob Herring			assigned-clocks = <&pmc PMC_TYPE_GCK 31>;
198724ba675SRob Herring			assigned-clock-rates = <480000000>;
199724ba675SRob Herring			status = "disabled";
200724ba675SRob Herring		};
201724ba675SRob Herring
202724ba675SRob Herring		sdmmc1: sdio-host@b0000000 {
203724ba675SRob Herring			compatible = "atmel,sama5d2-sdhci";
204724ba675SRob Herring			reg = <0xb0000000 0x300>;
205724ba675SRob Herring			interrupts = <32 IRQ_TYPE_LEVEL_HIGH 0>;
206724ba675SRob Herring			clocks = <&pmc PMC_TYPE_PERIPHERAL 32>, <&pmc PMC_TYPE_GCK 32>, <&pmc PMC_TYPE_CORE PMC_MAIN>;
207724ba675SRob Herring			clock-names = "hclock", "multclk", "baseclk";
208724ba675SRob Herring			assigned-clocks = <&pmc PMC_TYPE_GCK 32>;
209724ba675SRob Herring			assigned-clock-rates = <480000000>;
210724ba675SRob Herring			status = "disabled";
211724ba675SRob Herring		};
212724ba675SRob Herring
213724ba675SRob Herring		nfc_io: nfc-io@c0000000 {
214724ba675SRob Herring			compatible = "atmel,sama5d3-nfc-io", "syscon";
215724ba675SRob Herring			reg = <0xc0000000 0x8000000>;
216724ba675SRob Herring		};
217724ba675SRob Herring
218724ba675SRob Herring		apb {
219724ba675SRob Herring			compatible = "simple-bus";
220724ba675SRob Herring			#address-cells = <1>;
221724ba675SRob Herring			#size-cells = <1>;
222724ba675SRob Herring			ranges;
223724ba675SRob Herring
224724ba675SRob Herring			hlcdc: hlcdc@f0000000 {
225724ba675SRob Herring				compatible = "atmel,sama5d2-hlcdc";
226724ba675SRob Herring				reg = <0xf0000000 0x2000>;
227724ba675SRob Herring				interrupts = <45 IRQ_TYPE_LEVEL_HIGH 0>;
228724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 45>, <&pmc PMC_TYPE_SYSTEM 3>, <&clk32k>;
229724ba675SRob Herring				clock-names = "periph_clk","sys_clk", "slow_clk";
230724ba675SRob Herring				status = "disabled";
231724ba675SRob Herring
232724ba675SRob Herring				hlcdc-display-controller {
233724ba675SRob Herring					compatible = "atmel,hlcdc-display-controller";
234724ba675SRob Herring					#address-cells = <1>;
235724ba675SRob Herring					#size-cells = <0>;
236724ba675SRob Herring
237724ba675SRob Herring					port@0 {
238724ba675SRob Herring						#address-cells = <1>;
239724ba675SRob Herring						#size-cells = <0>;
240724ba675SRob Herring						reg = <0>;
241724ba675SRob Herring					};
242724ba675SRob Herring				};
243724ba675SRob Herring
244724ba675SRob Herring				hlcdc_pwm: hlcdc-pwm {
245724ba675SRob Herring					compatible = "atmel,hlcdc-pwm";
246724ba675SRob Herring					#pwm-cells = <3>;
247724ba675SRob Herring				};
248724ba675SRob Herring			};
249724ba675SRob Herring
250724ba675SRob Herring			isc: isc@f0008000 {
251724ba675SRob Herring				compatible = "atmel,sama5d2-isc";
252724ba675SRob Herring				reg = <0xf0008000 0x4000>;
253724ba675SRob Herring				interrupts = <46 IRQ_TYPE_LEVEL_HIGH 5>;
254724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 46>, <&pmc PMC_TYPE_SYSTEM 18>, <&pmc PMC_TYPE_GCK 46>;
255724ba675SRob Herring				clock-names = "hclock", "iscck", "gck";
256724ba675SRob Herring				#clock-cells = <0>;
257724ba675SRob Herring				clock-output-names = "isc-mck";
258724ba675SRob Herring				status = "disabled";
259724ba675SRob Herring			};
260724ba675SRob Herring
261724ba675SRob Herring			ramc0: ramc@f000c000 {
262724ba675SRob Herring				compatible = "atmel,sama5d3-ddramc";
263724ba675SRob Herring				reg = <0xf000c000 0x200>;
264724ba675SRob Herring				clocks = <&pmc PMC_TYPE_SYSTEM 2>, <&pmc PMC_TYPE_PERIPHERAL 13>;
265724ba675SRob Herring				clock-names = "ddrck", "mpddr";
266724ba675SRob Herring			};
267724ba675SRob Herring
268724ba675SRob Herring			dma0: dma-controller@f0010000 {
269724ba675SRob Herring				compatible = "atmel,sama5d4-dma";
270724ba675SRob Herring				reg = <0xf0010000 0x1000>;
271724ba675SRob Herring				interrupts = <6 IRQ_TYPE_LEVEL_HIGH 0>;
272724ba675SRob Herring				#dma-cells = <1>;
273724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 6>;
274724ba675SRob Herring				clock-names = "dma_clk";
275724ba675SRob Herring			};
276724ba675SRob Herring
277724ba675SRob Herring			/* Place dma1 here despite its address */
278724ba675SRob Herring			dma1: dma-controller@f0004000 {
279724ba675SRob Herring				compatible = "atmel,sama5d4-dma";
280724ba675SRob Herring				reg = <0xf0004000 0x1000>;
281724ba675SRob Herring				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 0>;
282724ba675SRob Herring				#dma-cells = <1>;
283724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
284724ba675SRob Herring				clock-names = "dma_clk";
285724ba675SRob Herring			};
286724ba675SRob Herring
287724ba675SRob Herring			pmc: clock-controller@f0014000 {
288724ba675SRob Herring				compatible = "atmel,sama5d2-pmc", "syscon";
289724ba675SRob Herring				reg = <0xf0014000 0x160>;
290724ba675SRob Herring				interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
291724ba675SRob Herring				#clock-cells = <2>;
292724ba675SRob Herring				clocks = <&clk32k>, <&main_xtal>;
293724ba675SRob Herring				clock-names = "slow_clk", "main_xtal";
294724ba675SRob Herring			};
295724ba675SRob Herring
296724ba675SRob Herring			qspi0: spi@f0020000 {
297724ba675SRob Herring				compatible = "atmel,sama5d2-qspi";
298724ba675SRob Herring				reg = <0xf0020000 0x100>, <0xd0000000 0x08000000>;
299724ba675SRob Herring				reg-names = "qspi_base", "qspi_mmap";
300724ba675SRob Herring				interrupts = <52 IRQ_TYPE_LEVEL_HIGH 7>;
301724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 52>;
302724ba675SRob Herring				clock-names = "pclk";
303724ba675SRob Herring				#address-cells = <1>;
304724ba675SRob Herring				#size-cells = <0>;
305724ba675SRob Herring				status = "disabled";
306724ba675SRob Herring			};
307724ba675SRob Herring
308724ba675SRob Herring			qspi1: spi@f0024000 {
309724ba675SRob Herring				compatible = "atmel,sama5d2-qspi";
310724ba675SRob Herring				reg = <0xf0024000 0x100>, <0xd8000000 0x08000000>;
311724ba675SRob Herring				reg-names = "qspi_base", "qspi_mmap";
312724ba675SRob Herring				interrupts = <53 IRQ_TYPE_LEVEL_HIGH 7>;
313724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 53>;
314724ba675SRob Herring				clock-names = "pclk";
315724ba675SRob Herring				#address-cells = <1>;
316724ba675SRob Herring				#size-cells = <0>;
317724ba675SRob Herring				status = "disabled";
318724ba675SRob Herring			};
319724ba675SRob Herring
320724ba675SRob Herring			sha: crypto@f0028000 {
321724ba675SRob Herring				compatible = "atmel,at91sam9g46-sha";
322724ba675SRob Herring				reg = <0xf0028000 0x100>;
323724ba675SRob Herring				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 0>;
324724ba675SRob Herring				dmas = <&dma0
325724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
326724ba675SRob Herring					 AT91_XDMAC_DT_PERID(30))>;
327724ba675SRob Herring				dma-names = "tx";
328724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
329724ba675SRob Herring				clock-names = "sha_clk";
330724ba675SRob Herring			};
331724ba675SRob Herring
332724ba675SRob Herring			aes: crypto@f002c000 {
333724ba675SRob Herring				compatible = "atmel,at91sam9g46-aes";
334724ba675SRob Herring				reg = <0xf002c000 0x100>;
335724ba675SRob Herring				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 0>;
336724ba675SRob Herring				dmas = <&dma0
337724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
338724ba675SRob Herring					 AT91_XDMAC_DT_PERID(26))>,
339724ba675SRob Herring				       <&dma0
340724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
341724ba675SRob Herring					 AT91_XDMAC_DT_PERID(27))>;
342724ba675SRob Herring				dma-names = "tx", "rx";
343724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
344724ba675SRob Herring				clock-names = "aes_clk";
345724ba675SRob Herring			};
346724ba675SRob Herring
347724ba675SRob Herring			spi0: spi@f8000000 {
348724ba675SRob Herring				compatible = "atmel,at91rm9200-spi";
349724ba675SRob Herring				reg = <0xf8000000 0x100>;
350724ba675SRob Herring				interrupts = <33 IRQ_TYPE_LEVEL_HIGH 7>;
351724ba675SRob Herring				dmas = <&dma0
352724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
353724ba675SRob Herring					 AT91_XDMAC_DT_PERID(6))>,
354724ba675SRob Herring				       <&dma0
355724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
356724ba675SRob Herring					 AT91_XDMAC_DT_PERID(7))>;
357724ba675SRob Herring				dma-names = "tx", "rx";
358724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 33>;
359724ba675SRob Herring				clock-names = "spi_clk";
360724ba675SRob Herring				atmel,fifo-size = <16>;
361724ba675SRob Herring				#address-cells = <1>;
362724ba675SRob Herring				#size-cells = <0>;
363724ba675SRob Herring				status = "disabled";
364724ba675SRob Herring			};
365724ba675SRob Herring
366724ba675SRob Herring			ssc0: ssc@f8004000 {
367724ba675SRob Herring				compatible = "atmel,at91sam9g45-ssc";
368724ba675SRob Herring				reg = <0xf8004000 0x4000>;
369724ba675SRob Herring				interrupts = <43 IRQ_TYPE_LEVEL_HIGH 4>;
370724ba675SRob Herring				dmas = <&dma0
371724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
372724ba675SRob Herring					AT91_XDMAC_DT_PERID(21))>,
373724ba675SRob Herring				       <&dma0
374724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
375724ba675SRob Herring					AT91_XDMAC_DT_PERID(22))>;
376724ba675SRob Herring				dma-names = "tx", "rx";
377724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
378724ba675SRob Herring				clock-names = "pclk";
379724ba675SRob Herring				status = "disabled";
380724ba675SRob Herring			};
381724ba675SRob Herring
382724ba675SRob Herring			macb0: ethernet@f8008000 {
383724ba675SRob Herring				compatible = "atmel,sama5d2-gem";
384724ba675SRob Herring				reg = <0xf8008000 0x1000>;
385dc1890b9SKrzysztof Kozlowski				interrupts = <5  IRQ_TYPE_LEVEL_HIGH 3>,	/* Queue 0 */
386dc1890b9SKrzysztof Kozlowski					     <66 IRQ_TYPE_LEVEL_HIGH 3>,	/* Queue 1 */
387dc1890b9SKrzysztof Kozlowski					     <67 IRQ_TYPE_LEVEL_HIGH 3>;        /* Queue 2 */
388724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 5>, <&pmc PMC_TYPE_PERIPHERAL 5>;
389724ba675SRob Herring				clock-names = "hclk", "pclk";
390724ba675SRob Herring				status = "disabled";
391724ba675SRob Herring			};
392724ba675SRob Herring
393724ba675SRob Herring			tcb0: timer@f800c000 {
394724ba675SRob Herring				compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
395724ba675SRob Herring				#address-cells = <1>;
396724ba675SRob Herring				#size-cells = <0>;
397724ba675SRob Herring				reg = <0xf800c000 0x100>;
398724ba675SRob Herring				interrupts = <35 IRQ_TYPE_LEVEL_HIGH 0>;
399724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 35>, <&pmc PMC_TYPE_GCK 35>, <&clk32k>;
400724ba675SRob Herring				clock-names = "t0_clk", "gclk", "slow_clk";
401724ba675SRob Herring			};
402724ba675SRob Herring
403724ba675SRob Herring			tcb1: timer@f8010000 {
404724ba675SRob Herring				compatible = "atmel,sama5d2-tcb", "simple-mfd", "syscon";
405724ba675SRob Herring				#address-cells = <1>;
406724ba675SRob Herring				#size-cells = <0>;
407724ba675SRob Herring				reg = <0xf8010000 0x100>;
408724ba675SRob Herring				interrupts = <36 IRQ_TYPE_LEVEL_HIGH 0>;
409724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 36>, <&pmc PMC_TYPE_GCK 36>, <&clk32k>;
410724ba675SRob Herring				clock-names = "t0_clk", "gclk", "slow_clk";
411724ba675SRob Herring			};
412724ba675SRob Herring
413724ba675SRob Herring			hsmc: hsmc@f8014000 {
414724ba675SRob Herring				compatible = "atmel,sama5d2-smc", "syscon", "simple-mfd";
415724ba675SRob Herring				reg = <0xf8014000 0x1000>;
416724ba675SRob Herring				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 6>;
417724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
418724ba675SRob Herring				#address-cells = <1>;
419724ba675SRob Herring				#size-cells = <1>;
420724ba675SRob Herring				ranges;
421724ba675SRob Herring
422724ba675SRob Herring				pmecc: ecc-engine@f8014070 {
423724ba675SRob Herring					compatible = "atmel,sama5d2-pmecc";
424724ba675SRob Herring					reg = <0xf8014070 0x490>,
425724ba675SRob Herring					      <0xf8014500 0x200>;
426724ba675SRob Herring				};
427724ba675SRob Herring			};
428724ba675SRob Herring
429724ba675SRob Herring			pdmic: pdmic@f8018000 {
430724ba675SRob Herring				compatible = "atmel,sama5d2-pdmic";
431724ba675SRob Herring				reg = <0xf8018000 0x124>;
432724ba675SRob Herring				interrupts = <48 IRQ_TYPE_LEVEL_HIGH 7>;
433724ba675SRob Herring				dmas = <&dma0
434724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1)
435724ba675SRob Herring					| AT91_XDMAC_DT_PERID(50))>;
436724ba675SRob Herring				dma-names = "rx";
437724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 48>, <&pmc PMC_TYPE_GCK 48>;
438724ba675SRob Herring				clock-names = "pclk", "gclk";
439724ba675SRob Herring				status = "disabled";
440724ba675SRob Herring			};
441724ba675SRob Herring
442724ba675SRob Herring			uart0: serial@f801c000 {
443724ba675SRob Herring				compatible = "atmel,at91sam9260-usart";
444724ba675SRob Herring				reg = <0xf801c000 0x100>;
445724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
446724ba675SRob Herring				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 7>;
447724ba675SRob Herring				dmas = <&dma0
448724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
449724ba675SRob Herring					 AT91_XDMAC_DT_PERID(35))>,
450724ba675SRob Herring				       <&dma0
451724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
452724ba675SRob Herring					 AT91_XDMAC_DT_PERID(36))>;
453724ba675SRob Herring				dma-names = "tx", "rx";
454724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 24>;
455724ba675SRob Herring				clock-names = "usart";
456724ba675SRob Herring				status = "disabled";
457724ba675SRob Herring			};
458724ba675SRob Herring
459724ba675SRob Herring			uart1: serial@f8020000 {
460724ba675SRob Herring				compatible = "atmel,at91sam9260-usart";
461724ba675SRob Herring				reg = <0xf8020000 0x100>;
462724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
463724ba675SRob Herring				interrupts = <25 IRQ_TYPE_LEVEL_HIGH 7>;
464724ba675SRob Herring				dmas = <&dma0
465724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
466724ba675SRob Herring					 AT91_XDMAC_DT_PERID(37))>,
467724ba675SRob Herring				       <&dma0
468724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
469724ba675SRob Herring					 AT91_XDMAC_DT_PERID(38))>;
470724ba675SRob Herring				dma-names = "tx", "rx";
471724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 25>;
472724ba675SRob Herring				clock-names = "usart";
473724ba675SRob Herring				status = "disabled";
474724ba675SRob Herring			};
475724ba675SRob Herring
476724ba675SRob Herring			uart2: serial@f8024000 {
477724ba675SRob Herring				compatible = "atmel,at91sam9260-usart";
478724ba675SRob Herring				reg = <0xf8024000 0x100>;
479724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
480724ba675SRob Herring				interrupts = <26 IRQ_TYPE_LEVEL_HIGH 7>;
481724ba675SRob Herring				dmas = <&dma0
482724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
483724ba675SRob Herring					 AT91_XDMAC_DT_PERID(39))>,
484724ba675SRob Herring				       <&dma0
485724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
486724ba675SRob Herring					 AT91_XDMAC_DT_PERID(40))>;
487724ba675SRob Herring				dma-names = "tx", "rx";
488724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 26>;
489724ba675SRob Herring				clock-names = "usart";
490724ba675SRob Herring				status = "disabled";
491724ba675SRob Herring			};
492724ba675SRob Herring
493724ba675SRob Herring			i2c0: i2c@f8028000 {
494724ba675SRob Herring				compatible = "atmel,sama5d2-i2c";
495724ba675SRob Herring				reg = <0xf8028000 0x100>;
496724ba675SRob Herring				interrupts = <29 IRQ_TYPE_LEVEL_HIGH 7>;
497724ba675SRob Herring				dmas = <&dma0
498724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
499724ba675SRob Herring					 AT91_XDMAC_DT_PERID(0))>,
500724ba675SRob Herring				       <&dma0
501724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
502724ba675SRob Herring					 AT91_XDMAC_DT_PERID(1))>;
503724ba675SRob Herring				dma-names = "tx", "rx";
504724ba675SRob Herring				#address-cells = <1>;
505724ba675SRob Herring				#size-cells = <0>;
506724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 29>;
507724ba675SRob Herring				atmel,fifo-size = <16>;
508724ba675SRob Herring				status = "disabled";
509724ba675SRob Herring			};
510724ba675SRob Herring
511724ba675SRob Herring			pwm0: pwm@f802c000 {
512724ba675SRob Herring				compatible = "atmel,sama5d2-pwm";
513724ba675SRob Herring				reg = <0xf802c000 0x4000>;
514724ba675SRob Herring				interrupts = <38 IRQ_TYPE_LEVEL_HIGH 7>;
515724ba675SRob Herring				#pwm-cells = <3>;
516724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
517724ba675SRob Herring				status = "disabled";
518724ba675SRob Herring			};
519724ba675SRob Herring
520724ba675SRob Herring			sfr: sfr@f8030000 {
521724ba675SRob Herring				compatible = "atmel,sama5d2-sfr", "syscon";
522724ba675SRob Herring				reg = <0xf8030000 0x98>;
523724ba675SRob Herring			};
524724ba675SRob Herring
525724ba675SRob Herring			flx0: flexcom@f8034000 {
526724ba675SRob Herring				compatible = "atmel,sama5d2-flexcom";
527724ba675SRob Herring				reg = <0xf8034000 0x200>;
528724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
529724ba675SRob Herring				#address-cells = <1>;
530724ba675SRob Herring				#size-cells = <1>;
531724ba675SRob Herring				ranges = <0x0 0xf8034000 0x800>;
532724ba675SRob Herring				status = "disabled";
533724ba675SRob Herring
534724ba675SRob Herring				uart5: serial@200 {
535724ba675SRob Herring					compatible = "atmel,at91sam9260-usart";
536724ba675SRob Herring					reg = <0x200 0x200>;
537724ba675SRob Herring					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
538724ba675SRob Herring					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
539724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
540724ba675SRob Herring					clock-names = "usart";
541724ba675SRob Herring					dmas = <&dma0
542724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
543724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
544724ba675SRob Herring						 AT91_XDMAC_DT_PERID(11))>,
545724ba675SRob Herring					       <&dma0
546724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
547724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
548724ba675SRob Herring						 AT91_XDMAC_DT_PERID(12))>;
549724ba675SRob Herring					dma-names = "tx", "rx";
550724ba675SRob Herring					atmel,fifo-size = <32>;
551724ba675SRob Herring					status = "disabled";
552724ba675SRob Herring				};
553724ba675SRob Herring
554724ba675SRob Herring				spi2: spi@400 {
555724ba675SRob Herring					compatible = "atmel,at91rm9200-spi";
556724ba675SRob Herring					reg = <0x400 0x200>;
557724ba675SRob Herring					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
558724ba675SRob Herring					#address-cells = <1>;
559724ba675SRob Herring					#size-cells = <0>;
560724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
561724ba675SRob Herring					clock-names = "spi_clk";
562724ba675SRob Herring					dmas = <&dma0
563724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
564724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
565724ba675SRob Herring						 AT91_XDMAC_DT_PERID(11))>,
566724ba675SRob Herring					       <&dma0
567724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
568724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
569724ba675SRob Herring						 AT91_XDMAC_DT_PERID(12))>;
570724ba675SRob Herring					dma-names = "tx", "rx";
571724ba675SRob Herring					atmel,fifo-size = <16>;
572724ba675SRob Herring					status = "disabled";
573724ba675SRob Herring				};
574724ba675SRob Herring
575724ba675SRob Herring				i2c2: i2c@600 {
576724ba675SRob Herring					compatible = "atmel,sama5d2-i2c";
577724ba675SRob Herring					reg = <0x600 0x200>;
578724ba675SRob Herring					interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
579724ba675SRob Herring					#address-cells = <1>;
580724ba675SRob Herring					#size-cells = <0>;
581724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 19>;
582724ba675SRob Herring					dmas = <&dma0
583724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
584724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
585724ba675SRob Herring						 AT91_XDMAC_DT_PERID(11))>,
586724ba675SRob Herring					       <&dma0
587724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
588724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
589724ba675SRob Herring						 AT91_XDMAC_DT_PERID(12))>;
590724ba675SRob Herring					dma-names = "tx", "rx";
591724ba675SRob Herring					atmel,fifo-size = <16>;
592724ba675SRob Herring					status = "disabled";
593724ba675SRob Herring				};
594724ba675SRob Herring			};
595724ba675SRob Herring
596724ba675SRob Herring			flx1: flexcom@f8038000 {
597724ba675SRob Herring				compatible = "atmel,sama5d2-flexcom";
598724ba675SRob Herring				reg = <0xf8038000 0x200>;
599724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
600724ba675SRob Herring				#address-cells = <1>;
601724ba675SRob Herring				#size-cells = <1>;
602724ba675SRob Herring				ranges = <0x0 0xf8038000 0x800>;
603724ba675SRob Herring				status = "disabled";
604724ba675SRob Herring
605724ba675SRob Herring				uart6: serial@200 {
606724ba675SRob Herring					compatible = "atmel,at91sam9260-usart";
607724ba675SRob Herring					reg = <0x200 0x200>;
608724ba675SRob Herring					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
609724ba675SRob Herring					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
610724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
611724ba675SRob Herring					clock-names = "usart";
612724ba675SRob Herring					dmas = <&dma0
613724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
614724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
615724ba675SRob Herring						 AT91_XDMAC_DT_PERID(13))>,
616724ba675SRob Herring					       <&dma0
617724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
618724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
619724ba675SRob Herring						 AT91_XDMAC_DT_PERID(14))>;
620724ba675SRob Herring					dma-names = "tx", "rx";
621724ba675SRob Herring					atmel,fifo-size = <32>;
622724ba675SRob Herring					status = "disabled";
623724ba675SRob Herring				};
624724ba675SRob Herring
625724ba675SRob Herring				spi3: spi@400 {
626724ba675SRob Herring					compatible = "atmel,at91rm9200-spi";
627724ba675SRob Herring					reg = <0x400 0x200>;
628724ba675SRob Herring					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
629724ba675SRob Herring					#address-cells = <1>;
630724ba675SRob Herring					#size-cells = <0>;
631724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
632724ba675SRob Herring					clock-names = "spi_clk";
633724ba675SRob Herring					dmas = <&dma0
634724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
635724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
636724ba675SRob Herring						 AT91_XDMAC_DT_PERID(13))>,
637724ba675SRob Herring					       <&dma0
638724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
639724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
640724ba675SRob Herring						 AT91_XDMAC_DT_PERID(14))>;
641724ba675SRob Herring					dma-names = "tx", "rx";
642724ba675SRob Herring					atmel,fifo-size = <16>;
643724ba675SRob Herring					status = "disabled";
644724ba675SRob Herring				};
645724ba675SRob Herring
646724ba675SRob Herring				i2c3: i2c@600 {
647724ba675SRob Herring					compatible = "atmel,sama5d2-i2c";
648724ba675SRob Herring					reg = <0x600 0x200>;
649724ba675SRob Herring					interrupts = <20 IRQ_TYPE_LEVEL_HIGH 7>;
650724ba675SRob Herring					#address-cells = <1>;
651724ba675SRob Herring					#size-cells = <0>;
652724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
653724ba675SRob Herring					dmas = <&dma0
654724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
655724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
656724ba675SRob Herring						 AT91_XDMAC_DT_PERID(13))>,
657724ba675SRob Herring					       <&dma0
658724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
659724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
660724ba675SRob Herring						 AT91_XDMAC_DT_PERID(14))>;
661724ba675SRob Herring					dma-names = "tx", "rx";
662724ba675SRob Herring					atmel,fifo-size = <16>;
663724ba675SRob Herring					status = "disabled";
664724ba675SRob Herring				};
665724ba675SRob Herring			};
666724ba675SRob Herring
667724ba675SRob Herring			securam: sram@f8044000 {
668724ba675SRob Herring				compatible = "atmel,sama5d2-securam", "mmio-sram";
669724ba675SRob Herring				reg = <0xf8044000 0x1420>;
670724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 51>;
671724ba675SRob Herring				#address-cells = <1>;
672724ba675SRob Herring				#size-cells = <1>;
673724ba675SRob Herring				no-memory-wc;
674724ba675SRob Herring				ranges = <0 0xf8044000 0x1420>;
675724ba675SRob Herring			};
676724ba675SRob Herring
677724ba675SRob Herring			reset_controller: reset-controller@f8048000 {
678724ba675SRob Herring				compatible = "atmel,sama5d3-rstc";
679724ba675SRob Herring				reg = <0xf8048000 0x10>;
680724ba675SRob Herring				clocks = <&clk32k>;
681724ba675SRob Herring			};
682724ba675SRob Herring
683a4bd03e7SArnd Bergmann			shutdown_controller: poweroff@f8048010 {
684724ba675SRob Herring				compatible = "atmel,sama5d2-shdwc";
685724ba675SRob Herring				reg = <0xf8048010 0x10>;
686724ba675SRob Herring				clocks = <&clk32k>;
687724ba675SRob Herring				#address-cells = <1>;
688724ba675SRob Herring				#size-cells = <0>;
689724ba675SRob Herring				atmel,wakeup-rtc-timer;
690724ba675SRob Herring			};
691724ba675SRob Herring
692724ba675SRob Herring			pit: timer@f8048030 {
693724ba675SRob Herring				compatible = "atmel,at91sam9260-pit";
694724ba675SRob Herring				reg = <0xf8048030 0x10>;
695724ba675SRob Herring				interrupts = <3 IRQ_TYPE_LEVEL_HIGH 5>;
696724ba675SRob Herring				clocks = <&pmc PMC_TYPE_CORE PMC_MCK2>;
697724ba675SRob Herring			};
698724ba675SRob Herring
699724ba675SRob Herring			watchdog: watchdog@f8048040 {
700724ba675SRob Herring				compatible = "atmel,sama5d4-wdt";
701724ba675SRob Herring				reg = <0xf8048040 0x10>;
702724ba675SRob Herring				interrupts = <4 IRQ_TYPE_LEVEL_HIGH 7>;
703724ba675SRob Herring				clocks = <&clk32k>;
704724ba675SRob Herring				status = "disabled";
705724ba675SRob Herring			};
706724ba675SRob Herring
707724ba675SRob Herring			clk32k: clock-controller@f8048050 {
708724ba675SRob Herring				compatible = "atmel,sama5d4-sckc";
709724ba675SRob Herring				reg = <0xf8048050 0x4>;
710724ba675SRob Herring				clocks = <&slow_xtal>;
711724ba675SRob Herring				#clock-cells = <0>;
712724ba675SRob Herring			};
713724ba675SRob Herring
714724ba675SRob Herring			rtc: rtc@f80480b0 {
715724ba675SRob Herring				compatible = "atmel,sama5d2-rtc";
716724ba675SRob Herring				reg = <0xf80480b0 0x30>;
717724ba675SRob Herring				interrupts = <74 IRQ_TYPE_LEVEL_HIGH 7>;
718724ba675SRob Herring				clocks = <&clk32k>;
719724ba675SRob Herring			};
720724ba675SRob Herring
721724ba675SRob Herring			i2s0: i2s@f8050000 {
722724ba675SRob Herring				compatible = "atmel,sama5d2-i2s";
723724ba675SRob Herring				reg = <0xf8050000 0x100>;
724724ba675SRob Herring				interrupts = <54 IRQ_TYPE_LEVEL_HIGH 7>;
725724ba675SRob Herring				dmas = <&dma0
726724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
727724ba675SRob Herring					 AT91_XDMAC_DT_PERID(31))>,
728724ba675SRob Herring				       <&dma0
729724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
730724ba675SRob Herring					 AT91_XDMAC_DT_PERID(32))>;
731724ba675SRob Herring				dma-names = "tx", "rx";
732724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 54>, <&pmc PMC_TYPE_GCK 54>;
733724ba675SRob Herring				clock-names = "pclk", "gclk";
734724ba675SRob Herring				assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S0_MUX>;
735724ba675SRob Herring				assigned-clock-parents = <&pmc PMC_TYPE_GCK 54>;
736724ba675SRob Herring				status = "disabled";
737724ba675SRob Herring			};
738724ba675SRob Herring
739724ba675SRob Herring			can0: can@f8054000 {
740724ba675SRob Herring				compatible = "bosch,m_can";
741724ba675SRob Herring				reg = <0xf8054000 0x4000>, <0x210000 0x1c00>;
742724ba675SRob Herring				reg-names = "m_can", "message_ram";
743724ba675SRob Herring				interrupts = <56 IRQ_TYPE_LEVEL_HIGH 7>,
744724ba675SRob Herring					     <64 IRQ_TYPE_LEVEL_HIGH 7>;
745724ba675SRob Herring				interrupt-names = "int0", "int1";
746724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 56>, <&pmc PMC_TYPE_GCK 56>;
747724ba675SRob Herring				clock-names = "hclk", "cclk";
748724ba675SRob Herring				assigned-clocks = <&pmc PMC_TYPE_GCK 56>;
749724ba675SRob Herring				assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
750724ba675SRob Herring				assigned-clock-rates = <40000000>;
751724ba675SRob Herring				bosch,mram-cfg = <0x0 0 0 64 0 0 32 32>;
752724ba675SRob Herring				status = "disabled";
753724ba675SRob Herring			};
754724ba675SRob Herring
755724ba675SRob Herring			spi1: spi@fc000000 {
756724ba675SRob Herring				compatible = "atmel,at91rm9200-spi";
757724ba675SRob Herring				reg = <0xfc000000 0x100>;
758724ba675SRob Herring				interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>;
759724ba675SRob Herring				dmas = <&dma0
760724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
761724ba675SRob Herring					 AT91_XDMAC_DT_PERID(8))>,
762724ba675SRob Herring				       <&dma0
763724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
764724ba675SRob Herring					 AT91_XDMAC_DT_PERID(9))>;
765724ba675SRob Herring				dma-names = "tx", "rx";
766724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
767724ba675SRob Herring				clock-names = "spi_clk";
768724ba675SRob Herring				atmel,fifo-size = <16>;
769724ba675SRob Herring				#address-cells = <1>;
770724ba675SRob Herring				#size-cells = <0>;
771724ba675SRob Herring				status = "disabled";
772724ba675SRob Herring			};
773724ba675SRob Herring
774724ba675SRob Herring			uart3: serial@fc008000 {
775724ba675SRob Herring				compatible = "atmel,at91sam9260-usart";
776724ba675SRob Herring				reg = <0xfc008000 0x100>;
777724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
778724ba675SRob Herring				interrupts = <27 IRQ_TYPE_LEVEL_HIGH 7>;
779724ba675SRob Herring				dmas = <&dma1
780724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
781724ba675SRob Herring					 AT91_XDMAC_DT_PERID(41))>,
782724ba675SRob Herring				       <&dma1
783724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
784724ba675SRob Herring					 AT91_XDMAC_DT_PERID(42))>;
785724ba675SRob Herring				dma-names = "tx", "rx";
786724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 27>;
787724ba675SRob Herring				clock-names = "usart";
788724ba675SRob Herring				status = "disabled";
789724ba675SRob Herring			};
790724ba675SRob Herring
791724ba675SRob Herring			uart4: serial@fc00c000 {
792724ba675SRob Herring				compatible = "atmel,at91sam9260-usart";
793724ba675SRob Herring				reg = <0xfc00c000 0x100>;
794724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
795724ba675SRob Herring				dmas = <&dma0
796724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
797724ba675SRob Herring					 AT91_XDMAC_DT_PERID(43))>,
798724ba675SRob Herring				       <&dma0
799724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
800724ba675SRob Herring					 AT91_XDMAC_DT_PERID(44))>;
801724ba675SRob Herring				dma-names = "tx", "rx";
802724ba675SRob Herring				interrupts = <28 IRQ_TYPE_LEVEL_HIGH 7>;
803724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 28>;
804724ba675SRob Herring				clock-names = "usart";
805724ba675SRob Herring				status = "disabled";
806724ba675SRob Herring			};
807724ba675SRob Herring
808724ba675SRob Herring			flx2: flexcom@fc010000 {
809724ba675SRob Herring				compatible = "atmel,sama5d2-flexcom";
810724ba675SRob Herring				reg = <0xfc010000 0x200>;
811724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
812724ba675SRob Herring				#address-cells = <1>;
813724ba675SRob Herring				#size-cells = <1>;
814724ba675SRob Herring				ranges = <0x0 0xfc010000 0x800>;
815724ba675SRob Herring				status = "disabled";
816724ba675SRob Herring
817724ba675SRob Herring				uart7: serial@200 {
818724ba675SRob Herring					compatible = "atmel,at91sam9260-usart";
819724ba675SRob Herring					reg = <0x200 0x200>;
820724ba675SRob Herring					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
821724ba675SRob Herring					interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
822724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
823724ba675SRob Herring					clock-names = "usart";
824724ba675SRob Herring					dmas = <&dma0
825724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
826724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
827724ba675SRob Herring						 AT91_XDMAC_DT_PERID(15))>,
828724ba675SRob Herring						<&dma0
829724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
830724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
831724ba675SRob Herring						 AT91_XDMAC_DT_PERID(16))>;
832724ba675SRob Herring					dma-names = "tx", "rx";
833724ba675SRob Herring					atmel,fifo-size = <32>;
834724ba675SRob Herring					status = "disabled";
835724ba675SRob Herring				};
836724ba675SRob Herring
837724ba675SRob Herring				spi4: spi@400 {
838724ba675SRob Herring					compatible = "atmel,at91rm9200-spi";
839724ba675SRob Herring					reg = <0x400 0x200>;
840724ba675SRob Herring					interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
841724ba675SRob Herring					#address-cells = <1>;
842724ba675SRob Herring					#size-cells = <0>;
843724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
844724ba675SRob Herring					clock-names = "spi_clk";
845724ba675SRob Herring					dmas = <&dma0
846724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
847724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
848724ba675SRob Herring						 AT91_XDMAC_DT_PERID(15))>,
849724ba675SRob Herring						<&dma0
850724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
851724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
852724ba675SRob Herring						 AT91_XDMAC_DT_PERID(16))>;
853724ba675SRob Herring					dma-names = "tx", "rx";
854724ba675SRob Herring					atmel,fifo-size = <16>;
855724ba675SRob Herring					status = "disabled";
856724ba675SRob Herring				};
857724ba675SRob Herring
858724ba675SRob Herring				i2c4: i2c@600 {
859724ba675SRob Herring					compatible = "atmel,sama5d2-i2c";
860724ba675SRob Herring					reg = <0x600 0x200>;
861724ba675SRob Herring					interrupts = <21 IRQ_TYPE_LEVEL_HIGH 7>;
862724ba675SRob Herring					#address-cells = <1>;
863724ba675SRob Herring					#size-cells = <0>;
864724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 21>;
865724ba675SRob Herring					dmas = <&dma0
866724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
867724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
868724ba675SRob Herring						 AT91_XDMAC_DT_PERID(15))>,
869724ba675SRob Herring						<&dma0
870724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
871724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
872724ba675SRob Herring						 AT91_XDMAC_DT_PERID(16))>;
873724ba675SRob Herring					dma-names = "tx", "rx";
874724ba675SRob Herring					atmel,fifo-size = <16>;
875724ba675SRob Herring					status = "disabled";
876724ba675SRob Herring				};
877724ba675SRob Herring			};
878724ba675SRob Herring
879724ba675SRob Herring			flx3: flexcom@fc014000 {
880724ba675SRob Herring				compatible = "atmel,sama5d2-flexcom";
881724ba675SRob Herring				reg = <0xfc014000 0x200>;
882724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
883724ba675SRob Herring				#address-cells = <1>;
884724ba675SRob Herring				#size-cells = <1>;
885724ba675SRob Herring				ranges = <0x0 0xfc014000 0x800>;
886724ba675SRob Herring				status = "disabled";
887724ba675SRob Herring
888724ba675SRob Herring				uart8: serial@200 {
889724ba675SRob Herring					compatible = "atmel,at91sam9260-usart";
890724ba675SRob Herring					reg = <0x200 0x200>;
891724ba675SRob Herring					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
892724ba675SRob Herring					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
893724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
894724ba675SRob Herring					clock-names = "usart";
895724ba675SRob Herring					dmas = <&dma0
896724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
897724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
898724ba675SRob Herring						 AT91_XDMAC_DT_PERID(17))>,
899724ba675SRob Herring					       <&dma0
900724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
901724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
902724ba675SRob Herring						 AT91_XDMAC_DT_PERID(18))>;
903724ba675SRob Herring					dma-names = "tx", "rx";
904724ba675SRob Herring					atmel,fifo-size = <32>;
905724ba675SRob Herring					status = "disabled";
906724ba675SRob Herring				};
907724ba675SRob Herring
908724ba675SRob Herring				spi5: spi@400 {
909724ba675SRob Herring					compatible = "atmel,at91rm9200-spi";
910724ba675SRob Herring					reg = <0x400 0x200>;
911724ba675SRob Herring					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
912724ba675SRob Herring					#address-cells = <1>;
913724ba675SRob Herring					#size-cells = <0>;
914724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
915724ba675SRob Herring					clock-names = "spi_clk";
916724ba675SRob Herring					dmas = <&dma0
917724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
918724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
919724ba675SRob Herring						 AT91_XDMAC_DT_PERID(17))>,
920724ba675SRob Herring					       <&dma0
921724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
922724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
923724ba675SRob Herring						 AT91_XDMAC_DT_PERID(18))>;
924724ba675SRob Herring					dma-names = "tx", "rx";
925724ba675SRob Herring					atmel,fifo-size = <16>;
926724ba675SRob Herring					status = "disabled";
927724ba675SRob Herring				};
928724ba675SRob Herring
929724ba675SRob Herring				i2c5: i2c@600 {
930724ba675SRob Herring					compatible = "atmel,sama5d2-i2c";
931724ba675SRob Herring					reg = <0x600 0x200>;
932724ba675SRob Herring					interrupts = <22 IRQ_TYPE_LEVEL_HIGH 7>;
933724ba675SRob Herring					#address-cells = <1>;
934724ba675SRob Herring					#size-cells = <0>;
935724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 22>;
936724ba675SRob Herring					dmas = <&dma0
937724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
938724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
939724ba675SRob Herring						 AT91_XDMAC_DT_PERID(17))>,
940724ba675SRob Herring					       <&dma0
941724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
942724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
943724ba675SRob Herring						 AT91_XDMAC_DT_PERID(18))>;
944724ba675SRob Herring					dma-names = "tx", "rx";
945724ba675SRob Herring					atmel,fifo-size = <16>;
946724ba675SRob Herring					status = "disabled";
947724ba675SRob Herring				};
948724ba675SRob Herring
949724ba675SRob Herring			};
950724ba675SRob Herring
951724ba675SRob Herring			flx4: flexcom@fc018000 {
952724ba675SRob Herring				compatible = "atmel,sama5d2-flexcom";
953724ba675SRob Herring				reg = <0xfc018000 0x200>;
954724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
955724ba675SRob Herring				#address-cells = <1>;
956724ba675SRob Herring				#size-cells = <1>;
957724ba675SRob Herring				ranges = <0x0 0xfc018000 0x800>;
958724ba675SRob Herring				status = "disabled";
959724ba675SRob Herring
960724ba675SRob Herring				uart9: serial@200 {
961724ba675SRob Herring					compatible = "atmel,at91sam9260-usart";
962724ba675SRob Herring					reg = <0x200 0x200>;
963724ba675SRob Herring					atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
964724ba675SRob Herring					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
965724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
966724ba675SRob Herring					clock-names = "usart";
967724ba675SRob Herring					dmas = <&dma0
968724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
969724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
970724ba675SRob Herring						 AT91_XDMAC_DT_PERID(19))>,
971724ba675SRob Herring					       <&dma0
972724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
973724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
974724ba675SRob Herring						 AT91_XDMAC_DT_PERID(20))>;
975724ba675SRob Herring					dma-names = "tx", "rx";
976724ba675SRob Herring					atmel,fifo-size = <32>;
977724ba675SRob Herring					status = "disabled";
978724ba675SRob Herring				};
979724ba675SRob Herring
980724ba675SRob Herring				spi6: spi@400 {
981724ba675SRob Herring					compatible = "atmel,at91rm9200-spi";
982724ba675SRob Herring					reg = <0x400 0x200>;
983724ba675SRob Herring					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
984724ba675SRob Herring					#address-cells = <1>;
985724ba675SRob Herring					#size-cells = <0>;
986724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
987724ba675SRob Herring					clock-names = "spi_clk";
988724ba675SRob Herring					dmas = <&dma0
989724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
990724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
991724ba675SRob Herring						 AT91_XDMAC_DT_PERID(19))>,
992724ba675SRob Herring					       <&dma0
993724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
994724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
995724ba675SRob Herring						 AT91_XDMAC_DT_PERID(20))>;
996724ba675SRob Herring					dma-names = "tx", "rx";
997724ba675SRob Herring					atmel,fifo-size = <16>;
998724ba675SRob Herring					status = "disabled";
999724ba675SRob Herring				};
1000724ba675SRob Herring
1001724ba675SRob Herring				i2c6: i2c@600 {
1002724ba675SRob Herring					compatible = "atmel,sama5d2-i2c";
1003724ba675SRob Herring					reg = <0x600 0x200>;
1004724ba675SRob Herring					interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
1005724ba675SRob Herring					#address-cells = <1>;
1006724ba675SRob Herring					#size-cells = <0>;
1007724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 23>;
1008724ba675SRob Herring					dmas = <&dma0
1009724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
1010724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
1011724ba675SRob Herring						 AT91_XDMAC_DT_PERID(19))>,
1012724ba675SRob Herring					       <&dma0
1013724ba675SRob Herring						(AT91_XDMAC_DT_MEM_IF(0) |
1014724ba675SRob Herring						 AT91_XDMAC_DT_PER_IF(1) |
1015724ba675SRob Herring						 AT91_XDMAC_DT_PERID(20))>;
1016724ba675SRob Herring					dma-names = "tx", "rx";
1017724ba675SRob Herring					atmel,fifo-size = <16>;
1018724ba675SRob Herring					status = "disabled";
1019724ba675SRob Herring				};
1020724ba675SRob Herring			};
1021724ba675SRob Herring
1022*634e1fa7SAlexander Dahl			trng: rng@fc01c000 {
1023724ba675SRob Herring				compatible = "atmel,at91sam9g45-trng";
1024724ba675SRob Herring				reg = <0xfc01c000 0x100>;
1025724ba675SRob Herring				interrupts = <47 IRQ_TYPE_LEVEL_HIGH 0>;
1026724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 47>;
1027724ba675SRob Herring			};
1028724ba675SRob Herring
1029724ba675SRob Herring			aic: interrupt-controller@fc020000 {
1030724ba675SRob Herring				#interrupt-cells = <3>;
1031724ba675SRob Herring				compatible = "atmel,sama5d2-aic";
1032724ba675SRob Herring				interrupt-controller;
1033724ba675SRob Herring				reg = <0xfc020000 0x200>;
1034724ba675SRob Herring				atmel,external-irqs = <49>;
1035724ba675SRob Herring			};
1036724ba675SRob Herring
1037724ba675SRob Herring			i2c1: i2c@fc028000 {
1038724ba675SRob Herring				compatible = "atmel,sama5d2-i2c";
1039724ba675SRob Herring				reg = <0xfc028000 0x100>;
1040724ba675SRob Herring				interrupts = <30 IRQ_TYPE_LEVEL_HIGH 7>;
1041724ba675SRob Herring				dmas = <&dma0
1042724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1043724ba675SRob Herring					 AT91_XDMAC_DT_PERID(2))>,
1044724ba675SRob Herring				       <&dma0
1045724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1046724ba675SRob Herring					 AT91_XDMAC_DT_PERID(3))>;
1047724ba675SRob Herring				dma-names = "tx", "rx";
1048724ba675SRob Herring				#address-cells = <1>;
1049724ba675SRob Herring				#size-cells = <0>;
1050724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 30>;
1051724ba675SRob Herring				atmel,fifo-size = <16>;
1052724ba675SRob Herring				status = "disabled";
1053724ba675SRob Herring			};
1054724ba675SRob Herring
1055724ba675SRob Herring			adc: adc@fc030000 {
1056724ba675SRob Herring				compatible = "atmel,sama5d2-adc";
1057724ba675SRob Herring				reg = <0xfc030000 0x100>;
1058724ba675SRob Herring				interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>;
1059724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
1060724ba675SRob Herring				clock-names = "adc_clk";
1061724ba675SRob Herring				dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>;
1062724ba675SRob Herring				dma-names = "rx";
1063724ba675SRob Herring				atmel,min-sample-rate-hz = <200000>;
1064724ba675SRob Herring				atmel,max-sample-rate-hz = <20000000>;
1065724ba675SRob Herring				atmel,startup-time-ms = <4>;
1066724ba675SRob Herring				atmel,trigger-edge-type = <IRQ_TYPE_EDGE_RISING>;
1067724ba675SRob Herring				#io-channel-cells = <1>;
1068724ba675SRob Herring				status = "disabled";
1069724ba675SRob Herring			};
1070724ba675SRob Herring
1071724ba675SRob Herring			pioA: pinctrl@fc038000 {
1072724ba675SRob Herring				compatible = "atmel,sama5d2-pinctrl";
1073724ba675SRob Herring				reg = <0xfc038000 0x600>;
1074724ba675SRob Herring				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 7>,
1075724ba675SRob Herring					     <68 IRQ_TYPE_LEVEL_HIGH 7>,
1076724ba675SRob Herring					     <69 IRQ_TYPE_LEVEL_HIGH 7>,
1077724ba675SRob Herring					     <70 IRQ_TYPE_LEVEL_HIGH 7>;
1078724ba675SRob Herring				interrupt-controller;
1079724ba675SRob Herring				#interrupt-cells = <2>;
1080724ba675SRob Herring				gpio-controller;
1081724ba675SRob Herring				#gpio-cells = <2>;
1082724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
1083724ba675SRob Herring			};
1084724ba675SRob Herring
1085724ba675SRob Herring			pioBU: secumod@fc040000 {
1086724ba675SRob Herring				compatible = "atmel,sama5d2-secumod", "syscon";
1087724ba675SRob Herring				reg = <0xfc040000 0x100>;
1088724ba675SRob Herring
1089724ba675SRob Herring				gpio-controller;
1090724ba675SRob Herring				#gpio-cells = <2>;
1091724ba675SRob Herring			};
1092724ba675SRob Herring
1093724ba675SRob Herring			tdes: crypto@fc044000 {
1094724ba675SRob Herring				compatible = "atmel,at91sam9g46-tdes";
1095724ba675SRob Herring				reg = <0xfc044000 0x100>;
1096724ba675SRob Herring				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
1097724ba675SRob Herring				dmas = <&dma0
1098724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1099724ba675SRob Herring					 AT91_XDMAC_DT_PERID(28))>,
1100724ba675SRob Herring				       <&dma0
1101724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1102724ba675SRob Herring					 AT91_XDMAC_DT_PERID(29))>;
1103724ba675SRob Herring				dma-names = "tx", "rx";
1104724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
1105724ba675SRob Herring				clock-names = "tdes_clk";
1106724ba675SRob Herring			};
1107724ba675SRob Herring
1108724ba675SRob Herring			classd: classd@fc048000 {
1109724ba675SRob Herring				compatible = "atmel,sama5d2-classd";
1110724ba675SRob Herring				reg = <0xfc048000 0x100>;
1111724ba675SRob Herring				interrupts = <59 IRQ_TYPE_LEVEL_HIGH 7>;
1112724ba675SRob Herring				dmas = <&dma0
1113724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1114724ba675SRob Herring					 AT91_XDMAC_DT_PERID(47))>;
1115724ba675SRob Herring				dma-names = "tx";
1116724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 59>, <&pmc PMC_TYPE_GCK 59>;
1117724ba675SRob Herring				clock-names = "pclk", "gclk";
1118724ba675SRob Herring				status = "disabled";
1119724ba675SRob Herring			};
1120724ba675SRob Herring
1121724ba675SRob Herring			i2s1: i2s@fc04c000 {
1122724ba675SRob Herring				compatible = "atmel,sama5d2-i2s";
1123724ba675SRob Herring				reg = <0xfc04c000 0x100>;
1124724ba675SRob Herring				interrupts = <55 IRQ_TYPE_LEVEL_HIGH 7>;
1125724ba675SRob Herring				dmas = <&dma0
1126724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1127724ba675SRob Herring					 AT91_XDMAC_DT_PERID(33))>,
1128724ba675SRob Herring				       <&dma0
1129724ba675SRob Herring					(AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) |
1130724ba675SRob Herring					 AT91_XDMAC_DT_PERID(34))>;
1131724ba675SRob Herring				dma-names = "tx", "rx";
1132724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 55>, <&pmc PMC_TYPE_GCK 55>;
1133724ba675SRob Herring				clock-names = "pclk", "gclk";
1134724ba675SRob Herring				assigned-clocks = <&pmc PMC_TYPE_CORE PMC_I2S1_MUX>;
1135724ba675SRob Herring				assigned-clock-parents = <&pmc PMC_TYPE_GCK 55>;
1136724ba675SRob Herring				status = "disabled";
1137724ba675SRob Herring			};
1138724ba675SRob Herring
1139724ba675SRob Herring			can1: can@fc050000 {
1140724ba675SRob Herring				compatible = "bosch,m_can";
1141724ba675SRob Herring				reg = <0xfc050000 0x4000>, <0x210000 0x3800>;
1142724ba675SRob Herring				reg-names = "m_can", "message_ram";
1143724ba675SRob Herring				interrupts = <57 IRQ_TYPE_LEVEL_HIGH 7>,
1144724ba675SRob Herring					     <65 IRQ_TYPE_LEVEL_HIGH 7>;
1145724ba675SRob Herring				interrupt-names = "int0", "int1";
1146724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 57>, <&pmc PMC_TYPE_GCK 57>;
1147724ba675SRob Herring				clock-names = "hclk", "cclk";
1148724ba675SRob Herring				assigned-clocks = <&pmc PMC_TYPE_GCK 57>;
1149724ba675SRob Herring				assigned-clock-parents = <&pmc PMC_TYPE_CORE PMC_UTMI>;
1150724ba675SRob Herring				assigned-clock-rates = <40000000>;
1151724ba675SRob Herring				bosch,mram-cfg = <0x1c00 0 0 64 0 0 32 32>;
1152724ba675SRob Herring				status = "disabled";
1153724ba675SRob Herring			};
1154724ba675SRob Herring
1155724ba675SRob Herring			sfrbu: sfr@fc05c000 {
1156724ba675SRob Herring				compatible = "atmel,sama5d2-sfrbu", "syscon";
1157724ba675SRob Herring				reg = <0xfc05c000 0x20>;
1158724ba675SRob Herring			};
1159724ba675SRob Herring
1160724ba675SRob Herring			chipid@fc069000 {
1161724ba675SRob Herring				compatible = "atmel,sama5d2-chipid";
1162724ba675SRob Herring				reg = <0xfc069000 0x8>;
1163724ba675SRob Herring			};
1164724ba675SRob Herring		};
1165724ba675SRob Herring	};
1166724ba675SRob Herring};
1167