1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring/* 3*724ba675SRob Herring * at91sam9g35.dtsi - Device Tree Include file for AT91SAM9G35 SoC 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 6*724ba675SRob Herring */ 7*724ba675SRob Herring 8*724ba675SRob Herring#include "at91sam9x5.dtsi" 9*724ba675SRob Herring#include "at91sam9x5_lcd.dtsi" 10*724ba675SRob Herring#include "at91sam9x5_macb0.dtsi" 11*724ba675SRob Herring 12*724ba675SRob Herring/ { 13*724ba675SRob Herring model = "Atmel AT91SAM9G35 SoC"; 14*724ba675SRob Herring compatible = "atmel,at91sam9g35", "atmel,at91sam9x5"; 15*724ba675SRob Herring 16*724ba675SRob Herring ahb { 17*724ba675SRob Herring apb { 18*724ba675SRob Herring pinctrl@fffff400 { 19*724ba675SRob Herring atmel,mux-mask = < 20*724ba675SRob Herring /* A B C */ 21*724ba675SRob Herring 0xffffffff 0xffe0399f 0xc000000c /* pioA */ 22*724ba675SRob Herring 0x000406ff 0x00047e3f 0x00000000 /* pioB */ 23*724ba675SRob Herring 0xfdffffff 0x00000000 0xb83fffff /* pioC */ 24*724ba675SRob Herring 0x003fffff 0x003f8000 0x00000000 /* pioD */ 25*724ba675SRob Herring >; 26*724ba675SRob Herring }; 27*724ba675SRob Herring 28*724ba675SRob Herring pmc: clock-controller@fffffc00 { 29*724ba675SRob Herring compatible = "atmel,at91sam9g35-pmc", "atmel,at91sam9x5-pmc", "syscon"; 30*724ba675SRob Herring }; 31*724ba675SRob Herring }; 32*724ba675SRob Herring }; 33*724ba675SRob Herring}; 34