xref: /linux/scripts/dtc/include-prefixes/arm/microchip/at91sam9263.dtsi (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
1724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only
2724ba675SRob Herring/*
3724ba675SRob Herring * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC
4724ba675SRob Herring *
5724ba675SRob Herring *  Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
6724ba675SRob Herring */
7724ba675SRob Herring
8724ba675SRob Herring#include <dt-bindings/pinctrl/at91.h>
9724ba675SRob Herring#include <dt-bindings/interrupt-controller/irq.h>
10724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
11724ba675SRob Herring#include <dt-bindings/clock/at91.h>
12724ba675SRob Herring#include <dt-bindings/mfd/at91-usart.h>
13724ba675SRob Herring
14724ba675SRob Herring/ {
15724ba675SRob Herring	#address-cells = <1>;
16724ba675SRob Herring	#size-cells = <1>;
17724ba675SRob Herring	model = "Atmel AT91SAM9263 family SoC";
18724ba675SRob Herring	compatible = "atmel,at91sam9263";
19724ba675SRob Herring	interrupt-parent = <&aic>;
20724ba675SRob Herring
21724ba675SRob Herring	aliases {
22724ba675SRob Herring		serial0 = &dbgu;
23724ba675SRob Herring		serial1 = &usart0;
24724ba675SRob Herring		serial2 = &usart1;
25724ba675SRob Herring		serial3 = &usart2;
26724ba675SRob Herring		gpio0 = &pioA;
27724ba675SRob Herring		gpio1 = &pioB;
28724ba675SRob Herring		gpio2 = &pioC;
29724ba675SRob Herring		gpio3 = &pioD;
30724ba675SRob Herring		gpio4 = &pioE;
31724ba675SRob Herring		tcb0 = &tcb0;
32724ba675SRob Herring		i2c0 = &i2c0;
33724ba675SRob Herring		ssc0 = &ssc0;
34724ba675SRob Herring		ssc1 = &ssc1;
35724ba675SRob Herring		pwm0 = &pwm0;
36724ba675SRob Herring	};
37724ba675SRob Herring
38724ba675SRob Herring	cpus {
39724ba675SRob Herring		#address-cells = <1>;
40724ba675SRob Herring		#size-cells = <0>;
41724ba675SRob Herring
42724ba675SRob Herring		cpu@0 {
43724ba675SRob Herring			compatible = "arm,arm926ej-s";
44724ba675SRob Herring			device_type = "cpu";
45724ba675SRob Herring			reg = <0>;
46724ba675SRob Herring		};
47724ba675SRob Herring	};
48724ba675SRob Herring
49724ba675SRob Herring	memory@20000000 {
50724ba675SRob Herring		device_type = "memory";
51724ba675SRob Herring		reg = <0x20000000 0x08000000>;
52724ba675SRob Herring	};
53724ba675SRob Herring
54724ba675SRob Herring	clocks {
55724ba675SRob Herring		main_xtal: main_xtal {
56724ba675SRob Herring			compatible = "fixed-clock";
57724ba675SRob Herring			#clock-cells = <0>;
58724ba675SRob Herring			clock-frequency = <0>;
59724ba675SRob Herring		};
60724ba675SRob Herring
61724ba675SRob Herring		slow_xtal: slow_xtal {
62724ba675SRob Herring			compatible = "fixed-clock";
63724ba675SRob Herring			#clock-cells = <0>;
64724ba675SRob Herring			clock-frequency = <0>;
65724ba675SRob Herring		};
66724ba675SRob Herring	};
67724ba675SRob Herring
68724ba675SRob Herring	sram0: sram@300000 {
69724ba675SRob Herring		compatible = "mmio-sram";
70724ba675SRob Herring		reg = <0x00300000 0x14000>;
71724ba675SRob Herring		#address-cells = <1>;
72724ba675SRob Herring		#size-cells = <1>;
73724ba675SRob Herring		ranges = <0 0x00300000 0x14000>;
74724ba675SRob Herring	};
75724ba675SRob Herring
76724ba675SRob Herring	sram1: sram@500000 {
77724ba675SRob Herring		compatible = "mmio-sram";
78724ba675SRob Herring		reg = <0x00500000 0x4000>;
79724ba675SRob Herring		#address-cells = <1>;
80724ba675SRob Herring		#size-cells = <1>;
81724ba675SRob Herring		ranges = <0 0x00500000 0x4000>;
82724ba675SRob Herring	};
83724ba675SRob Herring
84724ba675SRob Herring	ahb {
85724ba675SRob Herring		compatible = "simple-bus";
86724ba675SRob Herring		#address-cells = <1>;
87724ba675SRob Herring		#size-cells = <1>;
88724ba675SRob Herring		ranges;
89724ba675SRob Herring
90724ba675SRob Herring		apb {
91724ba675SRob Herring			compatible = "simple-bus";
92724ba675SRob Herring			#address-cells = <1>;
93724ba675SRob Herring			#size-cells = <1>;
94724ba675SRob Herring			ranges;
95724ba675SRob Herring
96724ba675SRob Herring			aic: interrupt-controller@fffff000 {
97724ba675SRob Herring				#interrupt-cells = <3>;
98724ba675SRob Herring				compatible = "atmel,at91rm9200-aic";
99724ba675SRob Herring				interrupt-controller;
100724ba675SRob Herring				reg = <0xfffff000 0x200>;
101724ba675SRob Herring				atmel,external-irqs = <30 31>;
102724ba675SRob Herring			};
103724ba675SRob Herring
104724ba675SRob Herring			pmc: clock-controller@fffffc00 {
105724ba675SRob Herring				compatible = "atmel,at91sam9263-pmc", "syscon";
106724ba675SRob Herring				reg = <0xfffffc00 0x100>;
107724ba675SRob Herring				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
108724ba675SRob Herring				#clock-cells = <2>;
109724ba675SRob Herring				clocks = <&slow_xtal>, <&main_xtal>;
110724ba675SRob Herring				clock-names = "slow_xtal", "main_xtal";
111724ba675SRob Herring			};
112724ba675SRob Herring
113724ba675SRob Herring			ramc0: ramc@ffffe200 {
114724ba675SRob Herring				compatible = "atmel,at91sam9260-sdramc";
115724ba675SRob Herring				reg = <0xffffe200 0x200>;
116724ba675SRob Herring			};
117724ba675SRob Herring
118724ba675SRob Herring			smc0: smc@ffffe400 {
119724ba675SRob Herring				compatible = "atmel,at91sam9260-smc", "syscon";
120724ba675SRob Herring				reg = <0xffffe400 0x200>;
121724ba675SRob Herring			};
122724ba675SRob Herring
123724ba675SRob Herring			ramc1: ramc@ffffe800 {
124724ba675SRob Herring				compatible = "atmel,at91sam9260-sdramc";
125724ba675SRob Herring				reg = <0xffffe800 0x200>;
126724ba675SRob Herring			};
127724ba675SRob Herring
128724ba675SRob Herring			smc1: smc@ffffea00 {
129724ba675SRob Herring				compatible = "atmel,at91sam9260-smc", "syscon";
130724ba675SRob Herring				reg = <0xffffea00 0x200>;
131724ba675SRob Herring			};
132724ba675SRob Herring
133724ba675SRob Herring			matrix: matrix@ffffec00 {
134724ba675SRob Herring				compatible = "atmel,at91sam9263-matrix", "syscon";
135724ba675SRob Herring				reg = <0xffffec00 0x200>;
136724ba675SRob Herring			};
137724ba675SRob Herring
138724ba675SRob Herring			pit: timer@fffffd30 {
139724ba675SRob Herring				compatible = "atmel,at91sam9260-pit";
140724ba675SRob Herring				reg = <0xfffffd30 0xf>;
141724ba675SRob Herring				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
142724ba675SRob Herring				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
143724ba675SRob Herring			};
144724ba675SRob Herring
145724ba675SRob Herring			tcb0: timer@fff7c000 {
146724ba675SRob Herring				compatible = "atmel,at91rm9200-tcb", "simple-mfd", "syscon";
147724ba675SRob Herring				#address-cells = <1>;
148724ba675SRob Herring				#size-cells = <0>;
149724ba675SRob Herring				reg = <0xfff7c000 0x100>;
150724ba675SRob Herring				interrupts = <19 IRQ_TYPE_LEVEL_HIGH 0>;
151724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 19>, <&slow_xtal>;
152724ba675SRob Herring				clock-names = "t0_clk", "slow_clk";
153724ba675SRob Herring			};
154724ba675SRob Herring
155724ba675SRob Herring			reset-controller@fffffd00 {
156724ba675SRob Herring				compatible = "atmel,at91sam9260-rstc";
157724ba675SRob Herring				reg = <0xfffffd00 0x10>;
158724ba675SRob Herring				clocks = <&slow_xtal>;
159724ba675SRob Herring			};
160724ba675SRob Herring
161a4bd03e7SArnd Bergmann			poweroff@fffffd10 {
162724ba675SRob Herring				compatible = "atmel,at91sam9260-shdwc";
163724ba675SRob Herring				reg = <0xfffffd10 0x10>;
164724ba675SRob Herring				clocks = <&slow_xtal>;
165724ba675SRob Herring			};
166724ba675SRob Herring
167724ba675SRob Herring			pinctrl@fffff200 {
168724ba675SRob Herring				#address-cells = <1>;
169724ba675SRob Herring				#size-cells = <1>;
170*58c63181SManikandan Muralidharan				compatible = "atmel,at91rm9200-pinctrl", "simple-mfd";
171724ba675SRob Herring				ranges = <0xfffff200 0xfffff200 0xa00>;
172724ba675SRob Herring
173724ba675SRob Herring				atmel,mux-mask = <
174724ba675SRob Herring				      /*    A         B     */
175724ba675SRob Herring				       0xfffffffb 0xffffe07f  /* pioA */
176724ba675SRob Herring				       0x0007ffff 0x39072fff  /* pioB */
177724ba675SRob Herring				       0xffffffff 0x3ffffff8  /* pioC */
178724ba675SRob Herring				       0xfffffbff 0xffffffff  /* pioD */
179724ba675SRob Herring				       0xffe00fff 0xfbfcff00  /* pioE */
180724ba675SRob Herring				      >;
181724ba675SRob Herring
182724ba675SRob Herring				/* shared pinctrl settings */
183724ba675SRob Herring				dbgu {
184724ba675SRob Herring					pinctrl_dbgu: dbgu-0 {
185724ba675SRob Herring						atmel,pins =
186724ba675SRob Herring							<AT91_PIOC 30 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
187724ba675SRob Herring							 AT91_PIOC 31 AT91_PERIPH_A AT91_PINCTRL_NONE>;
188724ba675SRob Herring					};
189724ba675SRob Herring				};
190724ba675SRob Herring
191724ba675SRob Herring				usart0 {
192724ba675SRob Herring					pinctrl_usart0: usart0-0 {
193724ba675SRob Herring						atmel,pins =
194724ba675SRob Herring							<AT91_PIOA 26 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
195724ba675SRob Herring							 AT91_PIOA 27 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
196724ba675SRob Herring					};
197724ba675SRob Herring
198724ba675SRob Herring					pinctrl_usart0_rts: usart0_rts-0 {
199724ba675SRob Herring						atmel,pins =
200724ba675SRob Herring							<AT91_PIOA 28 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA28 periph A */
201724ba675SRob Herring					};
202724ba675SRob Herring
203724ba675SRob Herring					pinctrl_usart0_cts: usart0_cts-0 {
204724ba675SRob Herring						atmel,pins =
205724ba675SRob Herring							<AT91_PIOA 29 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA29 periph A */
206724ba675SRob Herring					};
207724ba675SRob Herring				};
208724ba675SRob Herring
209724ba675SRob Herring				usart1 {
210724ba675SRob Herring					pinctrl_usart1: usart1-0 {
211724ba675SRob Herring						atmel,pins =
212724ba675SRob Herring							<AT91_PIOD 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
213724ba675SRob Herring							 AT91_PIOD 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
214724ba675SRob Herring					};
215724ba675SRob Herring
216724ba675SRob Herring					pinctrl_usart1_rts: usart1_rts-0 {
217724ba675SRob Herring						atmel,pins =
218724ba675SRob Herring							<AT91_PIOD 7 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD7 periph B */
219724ba675SRob Herring					};
220724ba675SRob Herring
221724ba675SRob Herring					pinctrl_usart1_cts: usart1_cts-0 {
222724ba675SRob Herring						atmel,pins =
223724ba675SRob Herring							<AT91_PIOD 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD8 periph B */
224724ba675SRob Herring					};
225724ba675SRob Herring				};
226724ba675SRob Herring
227724ba675SRob Herring				usart2 {
228724ba675SRob Herring					pinctrl_usart2: usart2-0 {
229724ba675SRob Herring						atmel,pins =
230724ba675SRob Herring							<AT91_PIOD 2 AT91_PERIPH_A AT91_PINCTRL_PULL_UP
231724ba675SRob Herring							 AT91_PIOD 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;
232724ba675SRob Herring					};
233724ba675SRob Herring
234724ba675SRob Herring					pinctrl_usart2_rts: usart2_rts-0 {
235724ba675SRob Herring						atmel,pins =
236724ba675SRob Herring							<AT91_PIOD 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD5 periph B */
237724ba675SRob Herring					};
238724ba675SRob Herring
239724ba675SRob Herring					pinctrl_usart2_cts: usart2_cts-0 {
240724ba675SRob Herring						atmel,pins =
241724ba675SRob Herring							<AT91_PIOD 6 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PD6 periph B */
242724ba675SRob Herring					};
243724ba675SRob Herring				};
244724ba675SRob Herring
245724ba675SRob Herring				nand {
246724ba675SRob Herring					pinctrl_nand_rb: nand-rb-0 {
247724ba675SRob Herring						atmel,pins =
248724ba675SRob Herring							<AT91_PIOA 22 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
249724ba675SRob Herring					};
250724ba675SRob Herring
251724ba675SRob Herring					pinctrl_nand_cs: nand-cs-0 {
252724ba675SRob Herring						atmel,pins =
253724ba675SRob Herring							 <AT91_PIOD 15 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP>;
254724ba675SRob Herring					};
255724ba675SRob Herring				};
256724ba675SRob Herring
257724ba675SRob Herring				macb {
258724ba675SRob Herring					pinctrl_macb_rmii: macb_rmii-0 {
259724ba675SRob Herring						atmel,pins =
260724ba675SRob Herring							<AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC25 periph B */
261724ba675SRob Herring							 AT91_PIOE 21 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE21 periph A */
262724ba675SRob Herring							 AT91_PIOE 23 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE23 periph A */
263724ba675SRob Herring							 AT91_PIOE 24 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE24 periph A */
264724ba675SRob Herring							 AT91_PIOE 25 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE25 periph A */
265724ba675SRob Herring							 AT91_PIOE 26 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE26 periph A */
266724ba675SRob Herring							 AT91_PIOE 27 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE27 periph A */
267724ba675SRob Herring							 AT91_PIOE 28 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE28 periph A */
268724ba675SRob Herring							 AT91_PIOE 29 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PE29 periph A */
269724ba675SRob Herring							 AT91_PIOE 30 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PE30 periph A */
270724ba675SRob Herring					};
271724ba675SRob Herring
272724ba675SRob Herring					pinctrl_macb_rmii_mii: macb_rmii_mii-0 {
273724ba675SRob Herring						atmel,pins =
274724ba675SRob Herring							<AT91_PIOC 20 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC20 periph B */
275724ba675SRob Herring							 AT91_PIOC 21 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC21 periph B */
276724ba675SRob Herring							 AT91_PIOC 22 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC22 periph B */
277724ba675SRob Herring							 AT91_PIOC 23 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC23 periph B */
278724ba675SRob Herring							 AT91_PIOC 24 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC24 periph B */
279724ba675SRob Herring							 AT91_PIOC 25 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC25 periph B */
280724ba675SRob Herring							 AT91_PIOC 27 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC27 periph B */
281724ba675SRob Herring							 AT91_PIOE 22 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PE22 periph B */
282724ba675SRob Herring					};
283724ba675SRob Herring				};
284724ba675SRob Herring
285724ba675SRob Herring				mmc0 {
286724ba675SRob Herring					pinctrl_mmc0_clk: mmc0_clk-0 {
287724ba675SRob Herring						atmel,pins =
288724ba675SRob Herring							<AT91_PIOA 12 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA12 periph A */
289724ba675SRob Herring					};
290724ba675SRob Herring
291724ba675SRob Herring					pinctrl_mmc0_slot0_cmd_dat0: mmc0_slot0_cmd_dat0-0 {
292724ba675SRob Herring						atmel,pins =
293724ba675SRob Herring							<AT91_PIOA 1 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA1 periph A with pullup */
294724ba675SRob Herring							 AT91_PIOA 0 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA0 periph A with pullup */
295724ba675SRob Herring					};
296724ba675SRob Herring
297724ba675SRob Herring					pinctrl_mmc0_slot0_dat1_3: mmc0_slot0_dat1_3-0 {
298724ba675SRob Herring						atmel,pins =
299724ba675SRob Herring							<AT91_PIOA 3 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA3 periph A with pullup */
300724ba675SRob Herring							 AT91_PIOA 4 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA4 periph A with pullup */
301724ba675SRob Herring							 AT91_PIOA 5 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA5 periph A with pullup */
302724ba675SRob Herring					};
303724ba675SRob Herring
304724ba675SRob Herring					pinctrl_mmc0_slot1_cmd_dat0: mmc0_slot1_cmd_dat0-0 {
305724ba675SRob Herring						atmel,pins =
306724ba675SRob Herring							<AT91_PIOA 16 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA16 periph A with pullup */
307724ba675SRob Herring							 AT91_PIOA 17 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA17 periph A with pullup */
308724ba675SRob Herring					};
309724ba675SRob Herring
310724ba675SRob Herring					pinctrl_mmc0_slot1_dat1_3: mmc0_slot1_dat1_3-0 {
311724ba675SRob Herring						atmel,pins =
312724ba675SRob Herring							<AT91_PIOA 18 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA18 periph A with pullup */
313724ba675SRob Herring							 AT91_PIOA 19 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA19 periph A with pullup */
314724ba675SRob Herring							 AT91_PIOA 20 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA20 periph A with pullup */
315724ba675SRob Herring					};
316724ba675SRob Herring				};
317724ba675SRob Herring
318724ba675SRob Herring				mmc1 {
319724ba675SRob Herring					pinctrl_mmc1_clk: mmc1_clk-0 {
320724ba675SRob Herring						atmel,pins =
321724ba675SRob Herring							<AT91_PIOA 6 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PA6 periph A */
322724ba675SRob Herring					};
323724ba675SRob Herring
324724ba675SRob Herring					pinctrl_mmc1_slot0_cmd_dat0: mmc1_slot0_cmd_dat0-0 {
325724ba675SRob Herring						atmel,pins =
326724ba675SRob Herring							<AT91_PIOA 7 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA7 periph A with pullup */
327724ba675SRob Herring							 AT91_PIOA 8 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA8 periph A with pullup */
328724ba675SRob Herring					};
329724ba675SRob Herring
330724ba675SRob Herring					pinctrl_mmc1_slot0_dat1_3: mmc1_slot0_dat1_3-0 {
331724ba675SRob Herring						atmel,pins =
332724ba675SRob Herring							<AT91_PIOA 9 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA9 periph A with pullup */
333724ba675SRob Herring							 AT91_PIOA 10 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA10 periph A with pullup */
334724ba675SRob Herring							 AT91_PIOA 11 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA11 periph A with pullup */
335724ba675SRob Herring					};
336724ba675SRob Herring
337724ba675SRob Herring					pinctrl_mmc1_slot1_cmd_dat0: mmc1_slot1_cmd_dat0-0 {
338724ba675SRob Herring						atmel,pins =
339724ba675SRob Herring							<AT91_PIOA 21 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA21 periph A with pullup */
340724ba675SRob Herring							 AT91_PIOA 22 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA22 periph A with pullup */
341724ba675SRob Herring					};
342724ba675SRob Herring
343724ba675SRob Herring					pinctrl_mmc1_slot1_dat1_3: mmc1_slot1_dat1_3-0 {
344724ba675SRob Herring						atmel,pins =
345724ba675SRob Herring							<AT91_PIOA 23 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA23 periph A with pullup */
346724ba675SRob Herring							 AT91_PIOA 24 AT91_PERIPH_A AT91_PINCTRL_PULL_UP	/* PA24 periph A with pullup */
347724ba675SRob Herring							 AT91_PIOA 25 AT91_PERIPH_A AT91_PINCTRL_PULL_UP>;	/* PA25 periph A with pullup */
348724ba675SRob Herring					};
349724ba675SRob Herring				};
350724ba675SRob Herring
351724ba675SRob Herring				ssc0 {
352724ba675SRob Herring					pinctrl_ssc0_tx: ssc0_tx-0 {
353724ba675SRob Herring						atmel,pins =
354724ba675SRob Herring							<AT91_PIOB 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB0 periph B */
355724ba675SRob Herring							 AT91_PIOB 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB1 periph B */
356724ba675SRob Herring							 AT91_PIOB 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB2 periph B */
357724ba675SRob Herring					};
358724ba675SRob Herring
359724ba675SRob Herring					pinctrl_ssc0_rx: ssc0_rx-0 {
360724ba675SRob Herring						atmel,pins =
361724ba675SRob Herring							<AT91_PIOB 3 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB3 periph B */
362724ba675SRob Herring							 AT91_PIOB 4 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB4 periph B */
363724ba675SRob Herring							 AT91_PIOB 5 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PB5 periph B */
364724ba675SRob Herring					};
365724ba675SRob Herring				};
366724ba675SRob Herring
367724ba675SRob Herring				ssc1 {
368724ba675SRob Herring					pinctrl_ssc1_tx: ssc1_tx-0 {
369724ba675SRob Herring						atmel,pins =
370724ba675SRob Herring							<AT91_PIOB 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB6 periph A */
371724ba675SRob Herring							 AT91_PIOB 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB7 periph A */
372724ba675SRob Herring							 AT91_PIOB 8 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB8 periph A */
373724ba675SRob Herring					};
374724ba675SRob Herring
375724ba675SRob Herring					pinctrl_ssc1_rx: ssc1_rx-0 {
376724ba675SRob Herring						atmel,pins =
377724ba675SRob Herring							<AT91_PIOB 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB9 periph A */
378724ba675SRob Herring							 AT91_PIOB 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB10 periph A */
379724ba675SRob Herring							 AT91_PIOB 11 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB11 periph A */
380724ba675SRob Herring					};
381724ba675SRob Herring				};
382724ba675SRob Herring
383724ba675SRob Herring				spi0 {
384724ba675SRob Herring					pinctrl_spi0: spi0-0 {
385724ba675SRob Herring						atmel,pins =
386724ba675SRob Herring							<AT91_PIOA 0 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA0 periph B SPI0_MISO pin */
387724ba675SRob Herring							 AT91_PIOA 1 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PA1 periph B SPI0_MOSI pin */
388724ba675SRob Herring							 AT91_PIOA 2 AT91_PERIPH_B AT91_PINCTRL_NONE>;	/* PA2 periph B SPI0_SPCK pin */
389724ba675SRob Herring					};
390724ba675SRob Herring				};
391724ba675SRob Herring
392724ba675SRob Herring				spi1 {
393724ba675SRob Herring					pinctrl_spi1: spi1-0 {
394724ba675SRob Herring						atmel,pins =
395724ba675SRob Herring							<AT91_PIOB 12 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB12 periph A SPI1_MISO pin */
396724ba675SRob Herring							 AT91_PIOB 13 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB13 periph A SPI1_MOSI pin */
397724ba675SRob Herring							 AT91_PIOB 14 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB14 periph A SPI1_SPCK pin */
398724ba675SRob Herring					};
399724ba675SRob Herring				};
400724ba675SRob Herring
401724ba675SRob Herring				tcb0 {
402724ba675SRob Herring					pinctrl_tcb0_tclk0: tcb0_tclk0-0 {
403724ba675SRob Herring						atmel,pins = <AT91_PIOB 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
404724ba675SRob Herring					};
405724ba675SRob Herring
406724ba675SRob Herring					pinctrl_tcb0_tclk1: tcb0_tclk1-0 {
407724ba675SRob Herring						atmel,pins = <AT91_PIOC 28 AT91_PERIPH_B AT91_PINCTRL_NONE>;
408724ba675SRob Herring					};
409724ba675SRob Herring
410724ba675SRob Herring					pinctrl_tcb0_tclk2: tcb0_tclk2-0 {
411724ba675SRob Herring						atmel,pins = <AT91_PIOA 15 AT91_PERIPH_A AT91_PINCTRL_NONE>;
412724ba675SRob Herring					};
413724ba675SRob Herring
414724ba675SRob Herring					pinctrl_tcb0_tioa0: tcb0_tioa0-0 {
415724ba675SRob Herring						atmel,pins = <AT91_PIOE 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
416724ba675SRob Herring					};
417724ba675SRob Herring
418724ba675SRob Herring					pinctrl_tcb0_tioa1: tcb0_tioa1-0 {
419724ba675SRob Herring						atmel,pins = <AT91_PIOE 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
420724ba675SRob Herring					};
421724ba675SRob Herring
422724ba675SRob Herring					pinctrl_tcb0_tioa2: tcb0_tioa2-0 {
423724ba675SRob Herring						atmel,pins = <AT91_PIOB 17 AT91_PERIPH_B AT91_PINCTRL_NONE>;
424724ba675SRob Herring					};
425724ba675SRob Herring
426724ba675SRob Herring					pinctrl_tcb0_tiob0: tcb0_tiob0-0 {
427724ba675SRob Herring						atmel,pins = <AT91_PIOE 19 AT91_PERIPH_B AT91_PINCTRL_NONE>;
428724ba675SRob Herring					};
429724ba675SRob Herring
430724ba675SRob Herring					pinctrl_tcb0_tiob1: tcb0_tiob1-0 {
431724ba675SRob Herring						atmel,pins = <AT91_PIOE 9 AT91_PERIPH_B AT91_PINCTRL_NONE>;
432724ba675SRob Herring					};
433724ba675SRob Herring
434724ba675SRob Herring					pinctrl_tcb0_tiob2: tcb0_tiob2-0 {
435724ba675SRob Herring						atmel,pins = <AT91_PIOB 18 AT91_PERIPH_B AT91_PINCTRL_NONE>;
436724ba675SRob Herring					};
437724ba675SRob Herring				};
438724ba675SRob Herring
439724ba675SRob Herring				fb {
440724ba675SRob Herring					pinctrl_fb: fb-0 {
441724ba675SRob Herring						atmel,pins =
442724ba675SRob Herring							<AT91_PIOC 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC1 periph A */
443724ba675SRob Herring							 AT91_PIOC 2 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC2 periph A */
444724ba675SRob Herring							 AT91_PIOC 3 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC3 periph A */
445724ba675SRob Herring							 AT91_PIOB 9 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PB9 periph B */
446724ba675SRob Herring							 AT91_PIOC 6 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC6 periph A */
447724ba675SRob Herring							 AT91_PIOC 7 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC7 periph A */
448724ba675SRob Herring							 AT91_PIOC 8 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC8 periph A */
449724ba675SRob Herring							 AT91_PIOC 9 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC9 periph A */
450724ba675SRob Herring							 AT91_PIOC 10 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC10 periph A */
451724ba675SRob Herring							 AT91_PIOC 11 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC11 periph A */
452724ba675SRob Herring							 AT91_PIOC 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC14 periph A */
453724ba675SRob Herring							 AT91_PIOC 15 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC15 periph A */
454724ba675SRob Herring							 AT91_PIOC 16 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC16 periph A */
455724ba675SRob Herring							 AT91_PIOC 12 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC12 periph B */
456724ba675SRob Herring							 AT91_PIOC 18 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC18 periph A */
457724ba675SRob Herring							 AT91_PIOC 19 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC19 periph A */
458724ba675SRob Herring							 AT91_PIOC 22 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC22 periph A */
459724ba675SRob Herring							 AT91_PIOC 23 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC23 periph A */
460724ba675SRob Herring							 AT91_PIOC 24 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC24 periph A */
461724ba675SRob Herring							 AT91_PIOC 17 AT91_PERIPH_B AT91_PINCTRL_NONE	/* PC17 periph B */
462724ba675SRob Herring							 AT91_PIOC 26 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PC26 periph A */
463724ba675SRob Herring							 AT91_PIOC 27 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PC27 periph A */
464724ba675SRob Herring					};
465724ba675SRob Herring				};
466724ba675SRob Herring
467724ba675SRob Herring				can {
468724ba675SRob Herring					pinctrl_can_rx_tx: can_rx_tx {
469724ba675SRob Herring						atmel,pins =
470724ba675SRob Herring							<AT91_PIOA 14 AT91_PERIPH_A AT91_PINCTRL_NONE	/* CANRX, conflicts with IRQ0 */
471724ba675SRob Herring							 AT91_PIOA 13 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* CANTX, conflicts with PCK0 */
472724ba675SRob Herring					};
473724ba675SRob Herring				};
474724ba675SRob Herring
475724ba675SRob Herring				ac97 {
476724ba675SRob Herring					pinctrl_ac97: ac97-0 {
477724ba675SRob Herring						atmel,pins =
478724ba675SRob Herring							<AT91_PIOB 0 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB12 periph A AC97FS pin */
479724ba675SRob Herring							 AT91_PIOB 1 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB13 periph A AC97CK pin */
480724ba675SRob Herring							 AT91_PIOB 2 AT91_PERIPH_A AT91_PINCTRL_NONE	/* PB14 periph A AC97TX pin */
481724ba675SRob Herring							 AT91_PIOB 3 AT91_PERIPH_A AT91_PINCTRL_NONE>;	/* PB14 periph A AC97RX pin */
482724ba675SRob Herring					};
483724ba675SRob Herring				};
484724ba675SRob Herring
485724ba675SRob Herring				pioA: gpio@fffff200 {
486724ba675SRob Herring					compatible = "atmel,at91rm9200-gpio";
487724ba675SRob Herring					reg = <0xfffff200 0x200>;
488724ba675SRob Herring					interrupts = <2 IRQ_TYPE_LEVEL_HIGH 1>;
489724ba675SRob Herring					#gpio-cells = <2>;
490724ba675SRob Herring					gpio-controller;
491724ba675SRob Herring					interrupt-controller;
492724ba675SRob Herring					#interrupt-cells = <2>;
493724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 2>;
494724ba675SRob Herring				};
495724ba675SRob Herring
496724ba675SRob Herring				pioB: gpio@fffff400 {
497724ba675SRob Herring					compatible = "atmel,at91rm9200-gpio";
498724ba675SRob Herring					reg = <0xfffff400 0x200>;
499724ba675SRob Herring					interrupts = <3 IRQ_TYPE_LEVEL_HIGH 1>;
500724ba675SRob Herring					#gpio-cells = <2>;
501724ba675SRob Herring					gpio-controller;
502724ba675SRob Herring					interrupt-controller;
503724ba675SRob Herring					#interrupt-cells = <2>;
504724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 3>;
505724ba675SRob Herring				};
506724ba675SRob Herring
507724ba675SRob Herring				pioC: gpio@fffff600 {
508724ba675SRob Herring					compatible = "atmel,at91rm9200-gpio";
509724ba675SRob Herring					reg = <0xfffff600 0x200>;
510724ba675SRob Herring					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
511724ba675SRob Herring					#gpio-cells = <2>;
512724ba675SRob Herring					gpio-controller;
513724ba675SRob Herring					interrupt-controller;
514724ba675SRob Herring					#interrupt-cells = <2>;
515724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
516724ba675SRob Herring				};
517724ba675SRob Herring
518724ba675SRob Herring				pioD: gpio@fffff800 {
519724ba675SRob Herring					compatible = "atmel,at91rm9200-gpio";
520724ba675SRob Herring					reg = <0xfffff800 0x200>;
521724ba675SRob Herring					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
522724ba675SRob Herring					#gpio-cells = <2>;
523724ba675SRob Herring					gpio-controller;
524724ba675SRob Herring					interrupt-controller;
525724ba675SRob Herring					#interrupt-cells = <2>;
526724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
527724ba675SRob Herring				};
528724ba675SRob Herring
529724ba675SRob Herring				pioE: gpio@fffffa00 {
530724ba675SRob Herring					compatible = "atmel,at91rm9200-gpio";
531724ba675SRob Herring					reg = <0xfffffa00 0x200>;
532724ba675SRob Herring					interrupts = <4 IRQ_TYPE_LEVEL_HIGH 1>;
533724ba675SRob Herring					#gpio-cells = <2>;
534724ba675SRob Herring					gpio-controller;
535724ba675SRob Herring					interrupt-controller;
536724ba675SRob Herring					#interrupt-cells = <2>;
537724ba675SRob Herring					clocks = <&pmc PMC_TYPE_PERIPHERAL 4>;
538724ba675SRob Herring				};
539724ba675SRob Herring			};
540724ba675SRob Herring
541724ba675SRob Herring			dbgu: serial@ffffee00 {
542724ba675SRob Herring				compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart";
543724ba675SRob Herring				reg = <0xffffee00 0x200>;
544724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
545724ba675SRob Herring				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
546724ba675SRob Herring				pinctrl-names = "default";
547724ba675SRob Herring				pinctrl-0 = <&pinctrl_dbgu>;
548724ba675SRob Herring				clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
549724ba675SRob Herring				clock-names = "usart";
550724ba675SRob Herring				status = "disabled";
551724ba675SRob Herring			};
552724ba675SRob Herring
553724ba675SRob Herring			usart0: serial@fff8c000 {
554724ba675SRob Herring				compatible = "atmel,at91sam9260-usart";
555724ba675SRob Herring				reg = <0xfff8c000 0x200>;
556724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
557724ba675SRob Herring				interrupts = <7 IRQ_TYPE_LEVEL_HIGH 5>;
558724ba675SRob Herring				atmel,use-dma-rx;
559724ba675SRob Herring				atmel,use-dma-tx;
560724ba675SRob Herring				pinctrl-names = "default";
561724ba675SRob Herring				pinctrl-0 = <&pinctrl_usart0>;
562724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 7>;
563724ba675SRob Herring				clock-names = "usart";
564724ba675SRob Herring				status = "disabled";
565724ba675SRob Herring			};
566724ba675SRob Herring
567724ba675SRob Herring			usart1: serial@fff90000 {
568724ba675SRob Herring				compatible = "atmel,at91sam9260-usart";
569724ba675SRob Herring				reg = <0xfff90000 0x200>;
570724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
571724ba675SRob Herring				interrupts = <8 IRQ_TYPE_LEVEL_HIGH 5>;
572724ba675SRob Herring				atmel,use-dma-rx;
573724ba675SRob Herring				atmel,use-dma-tx;
574724ba675SRob Herring				pinctrl-names = "default";
575724ba675SRob Herring				pinctrl-0 = <&pinctrl_usart1>;
576724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 8>;
577724ba675SRob Herring				clock-names = "usart";
578724ba675SRob Herring				status = "disabled";
579724ba675SRob Herring			};
580724ba675SRob Herring
581724ba675SRob Herring			usart2: serial@fff94000 {
582724ba675SRob Herring				compatible = "atmel,at91sam9260-usart";
583724ba675SRob Herring				reg = <0xfff94000 0x200>;
584724ba675SRob Herring				atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
585724ba675SRob Herring				interrupts = <9 IRQ_TYPE_LEVEL_HIGH 5>;
586724ba675SRob Herring				atmel,use-dma-rx;
587724ba675SRob Herring				atmel,use-dma-tx;
588724ba675SRob Herring				pinctrl-names = "default";
589724ba675SRob Herring				pinctrl-0 = <&pinctrl_usart2>;
590724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 9>;
591724ba675SRob Herring				clock-names = "usart";
592724ba675SRob Herring				status = "disabled";
593724ba675SRob Herring			};
594724ba675SRob Herring
595724ba675SRob Herring			ssc0: ssc@fff98000 {
596724ba675SRob Herring				compatible = "atmel,at91rm9200-ssc";
597724ba675SRob Herring				reg = <0xfff98000 0x4000>;
598724ba675SRob Herring				interrupts = <16 IRQ_TYPE_LEVEL_HIGH 5>;
599724ba675SRob Herring				pinctrl-names = "default";
600724ba675SRob Herring				pinctrl-0 = <&pinctrl_ssc0_tx &pinctrl_ssc0_rx>;
601724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 16>;
602724ba675SRob Herring				clock-names = "pclk";
603724ba675SRob Herring				status = "disabled";
604724ba675SRob Herring			};
605724ba675SRob Herring
606724ba675SRob Herring			ssc1: ssc@fff9c000 {
607724ba675SRob Herring				compatible = "atmel,at91rm9200-ssc";
608724ba675SRob Herring				reg = <0xfff9c000 0x4000>;
609724ba675SRob Herring				interrupts = <17 IRQ_TYPE_LEVEL_HIGH 5>;
610724ba675SRob Herring				pinctrl-names = "default";
611724ba675SRob Herring				pinctrl-0 = <&pinctrl_ssc1_tx &pinctrl_ssc1_rx>;
612724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 17>;
613724ba675SRob Herring				clock-names = "pclk";
614724ba675SRob Herring				status = "disabled";
615724ba675SRob Herring			};
616724ba675SRob Herring
617724ba675SRob Herring			ac97: sound@fffa0000 {
618724ba675SRob Herring				compatible = "atmel,at91sam9263-ac97c";
619724ba675SRob Herring				reg = <0xfffa0000 0x4000>;
620724ba675SRob Herring				interrupts = <18 IRQ_TYPE_LEVEL_HIGH 5>;
621724ba675SRob Herring				pinctrl-names = "default";
622724ba675SRob Herring				pinctrl-0 = <&pinctrl_ac97>;
623724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 18>;
624724ba675SRob Herring				clock-names = "ac97_clk";
625724ba675SRob Herring				status = "disabled";
626724ba675SRob Herring			};
627724ba675SRob Herring
628724ba675SRob Herring			macb0: ethernet@fffbc000 {
629724ba675SRob Herring				compatible = "cdns,at91sam9260-macb", "cdns,macb";
630724ba675SRob Herring				reg = <0xfffbc000 0x100>;
631724ba675SRob Herring				interrupts = <21 IRQ_TYPE_LEVEL_HIGH 3>;
632724ba675SRob Herring				pinctrl-names = "default";
633724ba675SRob Herring				pinctrl-0 = <&pinctrl_macb_rmii>;
634724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 21>, <&pmc PMC_TYPE_PERIPHERAL 21>;
635724ba675SRob Herring				clock-names = "hclk", "pclk";
636724ba675SRob Herring				status = "disabled";
637724ba675SRob Herring			};
638724ba675SRob Herring
639724ba675SRob Herring			usb1: gadget@fff78000 {
640724ba675SRob Herring				compatible = "atmel,at91sam9263-udc";
641724ba675SRob Herring				reg = <0xfff78000 0x4000>;
642724ba675SRob Herring				interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
643724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 24>, <&pmc PMC_TYPE_SYSTEM 7>;
644724ba675SRob Herring				clock-names = "pclk", "hclk";
645724ba675SRob Herring				status = "disabled";
646724ba675SRob Herring			};
647724ba675SRob Herring
648724ba675SRob Herring			i2c0: i2c@fff88000 {
649724ba675SRob Herring				compatible = "atmel,at91sam9260-i2c";
650724ba675SRob Herring				reg = <0xfff88000 0x100>;
651724ba675SRob Herring				interrupts = <13 IRQ_TYPE_LEVEL_HIGH 6>;
652724ba675SRob Herring				#address-cells = <1>;
653724ba675SRob Herring				#size-cells = <0>;
654724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 13>;
655724ba675SRob Herring				status = "disabled";
656724ba675SRob Herring			};
657724ba675SRob Herring
658724ba675SRob Herring			mmc0: mmc@fff80000 {
659724ba675SRob Herring				compatible = "atmel,hsmci";
660724ba675SRob Herring				reg = <0xfff80000 0x600>;
661724ba675SRob Herring				interrupts = <10 IRQ_TYPE_LEVEL_HIGH 0>;
662724ba675SRob Herring				#address-cells = <1>;
663724ba675SRob Herring				#size-cells = <0>;
664724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 10>;
665724ba675SRob Herring				clock-names = "mci_clk";
666724ba675SRob Herring				status = "disabled";
667724ba675SRob Herring			};
668724ba675SRob Herring
669724ba675SRob Herring			mmc1: mmc@fff84000 {
670724ba675SRob Herring				compatible = "atmel,hsmci";
671724ba675SRob Herring				reg = <0xfff84000 0x600>;
672724ba675SRob Herring				interrupts = <11 IRQ_TYPE_LEVEL_HIGH 0>;
673724ba675SRob Herring				#address-cells = <1>;
674724ba675SRob Herring				#size-cells = <0>;
675724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 11>;
676724ba675SRob Herring				clock-names = "mci_clk";
677724ba675SRob Herring				status = "disabled";
678724ba675SRob Herring			};
679724ba675SRob Herring
680724ba675SRob Herring			watchdog@fffffd40 {
681724ba675SRob Herring				compatible = "atmel,at91sam9260-wdt";
682724ba675SRob Herring				reg = <0xfffffd40 0x10>;
683724ba675SRob Herring				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
684724ba675SRob Herring				clocks = <&slow_xtal>;
685724ba675SRob Herring				atmel,watchdog-type = "hardware";
686724ba675SRob Herring				atmel,reset-type = "all";
687724ba675SRob Herring				atmel,dbg-halt;
688724ba675SRob Herring				status = "disabled";
689724ba675SRob Herring			};
690724ba675SRob Herring
691724ba675SRob Herring			spi0: spi@fffa4000 {
692724ba675SRob Herring				#address-cells = <1>;
693724ba675SRob Herring				#size-cells = <0>;
694724ba675SRob Herring				compatible = "atmel,at91rm9200-spi";
695724ba675SRob Herring				reg = <0xfffa4000 0x200>;
696724ba675SRob Herring				interrupts = <14 IRQ_TYPE_LEVEL_HIGH 3>;
697724ba675SRob Herring				pinctrl-names = "default";
698724ba675SRob Herring				pinctrl-0 = <&pinctrl_spi0>;
699724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 14>;
700724ba675SRob Herring				clock-names = "spi_clk";
701724ba675SRob Herring				status = "disabled";
702724ba675SRob Herring			};
703724ba675SRob Herring
704724ba675SRob Herring			spi1: spi@fffa8000 {
705724ba675SRob Herring				#address-cells = <1>;
706724ba675SRob Herring				#size-cells = <0>;
707724ba675SRob Herring				compatible = "atmel,at91rm9200-spi";
708724ba675SRob Herring				reg = <0xfffa8000 0x200>;
709724ba675SRob Herring				interrupts = <15 IRQ_TYPE_LEVEL_HIGH 3>;
710724ba675SRob Herring				pinctrl-names = "default";
711724ba675SRob Herring				pinctrl-0 = <&pinctrl_spi1>;
712724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 15>;
713724ba675SRob Herring				clock-names = "spi_clk";
714724ba675SRob Herring				status = "disabled";
715724ba675SRob Herring			};
716724ba675SRob Herring
717724ba675SRob Herring			pwm0: pwm@fffb8000 {
718724ba675SRob Herring				compatible = "atmel,at91sam9rl-pwm";
719724ba675SRob Herring				reg = <0xfffb8000 0x300>;
720724ba675SRob Herring				interrupts = <20 IRQ_TYPE_LEVEL_HIGH 4>;
721724ba675SRob Herring				#pwm-cells = <3>;
722724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 20>;
723724ba675SRob Herring				clock-names = "pwm_clk";
724724ba675SRob Herring				status = "disabled";
725724ba675SRob Herring			};
726724ba675SRob Herring
727724ba675SRob Herring			can: can@fffac000 {
728724ba675SRob Herring				compatible = "atmel,at91sam9263-can";
729724ba675SRob Herring				reg = <0xfffac000 0x300>;
730724ba675SRob Herring				interrupts = <12 IRQ_TYPE_LEVEL_HIGH 3>;
731724ba675SRob Herring				pinctrl-names = "default";
732724ba675SRob Herring				pinctrl-0 = <&pinctrl_can_rx_tx>;
733724ba675SRob Herring				clocks = <&pmc PMC_TYPE_PERIPHERAL 12>;
734724ba675SRob Herring				clock-names = "can_clk";
735724ba675SRob Herring			};
736724ba675SRob Herring
737724ba675SRob Herring			rtc@fffffd20 {
738724ba675SRob Herring				compatible = "atmel,at91sam9260-rtt";
739724ba675SRob Herring				reg = <0xfffffd20 0x10>;
740724ba675SRob Herring				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
741724ba675SRob Herring				clocks = <&slow_xtal>;
742724ba675SRob Herring				status = "disabled";
743724ba675SRob Herring			};
744724ba675SRob Herring
745724ba675SRob Herring			rtc@fffffd50 {
746724ba675SRob Herring				compatible = "atmel,at91sam9260-rtt";
747724ba675SRob Herring				reg = <0xfffffd50 0x10>;
748724ba675SRob Herring				interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
749724ba675SRob Herring				clocks = <&slow_xtal>;
750724ba675SRob Herring				status = "disabled";
751724ba675SRob Herring			};
752724ba675SRob Herring
753724ba675SRob Herring			gpbr: syscon@fffffd60 {
754724ba675SRob Herring				compatible = "atmel,at91sam9260-gpbr", "syscon";
755724ba675SRob Herring				reg = <0xfffffd60 0x50>;
756724ba675SRob Herring				status = "disabled";
757724ba675SRob Herring			};
758724ba675SRob Herring		};
759724ba675SRob Herring
760724ba675SRob Herring		fb0: fb@700000 {
761724ba675SRob Herring			compatible = "atmel,at91sam9263-lcdc";
762724ba675SRob Herring			reg = <0x00700000 0x1000>;
763724ba675SRob Herring			interrupts = <26 IRQ_TYPE_LEVEL_HIGH 3>;
764724ba675SRob Herring			pinctrl-names = "default";
765724ba675SRob Herring			pinctrl-0 = <&pinctrl_fb>;
766724ba675SRob Herring			clocks = <&pmc PMC_TYPE_PERIPHERAL 26>, <&pmc PMC_TYPE_PERIPHERAL 26>;
767724ba675SRob Herring			clock-names = "lcdc_clk", "hclk";
768724ba675SRob Herring			status = "disabled";
769724ba675SRob Herring		};
770724ba675SRob Herring
771724ba675SRob Herring		usb0: ohci@a00000 {
772724ba675SRob Herring			compatible = "atmel,at91rm9200-ohci", "usb-ohci";
773724ba675SRob Herring			reg = <0x00a00000 0x100000>;
774724ba675SRob Herring			interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;
775724ba675SRob Herring			clocks = <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_PERIPHERAL 29>, <&pmc PMC_TYPE_SYSTEM 6>;
776724ba675SRob Herring			clock-names = "ohci_clk", "hclk", "uhpck";
777724ba675SRob Herring			status = "disabled";
778724ba675SRob Herring		};
779724ba675SRob Herring
780724ba675SRob Herring		ebi0: ebi@10000000 {
781724ba675SRob Herring			compatible = "atmel,at91sam9263-ebi0";
782724ba675SRob Herring			#address-cells = <2>;
783724ba675SRob Herring			#size-cells = <1>;
784724ba675SRob Herring			atmel,smc = <&smc0>;
785724ba675SRob Herring			atmel,matrix = <&matrix>;
786724ba675SRob Herring			reg = <0x10000000 0x80000000>;
787724ba675SRob Herring			ranges = <0x0 0x0 0x10000000 0x10000000
788724ba675SRob Herring				  0x1 0x0 0x20000000 0x10000000
789724ba675SRob Herring				  0x2 0x0 0x30000000 0x10000000
790724ba675SRob Herring				  0x3 0x0 0x40000000 0x10000000
791724ba675SRob Herring				  0x4 0x0 0x50000000 0x10000000
792724ba675SRob Herring				  0x5 0x0 0x60000000 0x10000000>;
793724ba675SRob Herring			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
794724ba675SRob Herring			status = "disabled";
795724ba675SRob Herring
796724ba675SRob Herring			nand_controller0: nand-controller {
797724ba675SRob Herring				compatible = "atmel,at91sam9260-nand-controller";
798724ba675SRob Herring				#address-cells = <2>;
799724ba675SRob Herring				#size-cells = <1>;
800724ba675SRob Herring				ranges;
801724ba675SRob Herring				status = "disabled";
802724ba675SRob Herring			};
803724ba675SRob Herring		};
804724ba675SRob Herring
805724ba675SRob Herring		ebi1: ebi@70000000 {
806724ba675SRob Herring			compatible = "atmel,at91sam9263-ebi1";
807724ba675SRob Herring			#address-cells = <2>;
808724ba675SRob Herring			#size-cells = <1>;
809724ba675SRob Herring			atmel,smc = <&smc1>;
810724ba675SRob Herring			atmel,matrix = <&matrix>;
811724ba675SRob Herring			reg = <0x80000000 0x20000000>;
812724ba675SRob Herring			ranges = <0x0 0x0 0x80000000 0x10000000
813724ba675SRob Herring				  0x1 0x0 0x90000000 0x10000000>;
814724ba675SRob Herring			clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
815724ba675SRob Herring			status = "disabled";
816724ba675SRob Herring
817724ba675SRob Herring			nand_controller1: nand-controller {
818724ba675SRob Herring				compatible = "atmel,at91sam9260-nand-controller";
819724ba675SRob Herring				#address-cells = <2>;
820724ba675SRob Herring				#size-cells = <1>;
821724ba675SRob Herring				ranges;
822724ba675SRob Herring				status = "disabled";
823724ba675SRob Herring			};
824724ba675SRob Herring		};
825724ba675SRob Herring	};
826724ba675SRob Herring
827724ba675SRob Herring	i2c-gpio-0 {
828724ba675SRob Herring		compatible = "i2c-gpio";
829724ba675SRob Herring		gpios = <&pioB 4 GPIO_ACTIVE_HIGH /* sda */
830724ba675SRob Herring			 &pioB 5 GPIO_ACTIVE_HIGH /* scl */
831724ba675SRob Herring			>;
832724ba675SRob Herring		i2c-gpio,sda-open-drain;
833724ba675SRob Herring		i2c-gpio,scl-open-drain;
834724ba675SRob Herring		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
835724ba675SRob Herring		#address-cells = <1>;
836724ba675SRob Herring		#size-cells = <0>;
837724ba675SRob Herring		status = "disabled";
838724ba675SRob Herring	};
839724ba675SRob Herring};
840