1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-only 2*724ba675SRob Herring// Copyright (C) 2016 Jamie Lentin <jm@lentin.co.uk> 3*724ba675SRob Herring 4*724ba675SRob Herring/dts-v1/; 5*724ba675SRob Herring 6*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h> 7*724ba675SRob Herring#include <dt-bindings/input/input.h> 8*724ba675SRob Herring#include "orion5x-mv88f5181.dtsi" 9*724ba675SRob Herring 10*724ba675SRob Herring/ { 11*724ba675SRob Herring model = "Netgear WNR854-t"; 12*724ba675SRob Herring compatible = "netgear,wnr854t", "marvell,orion5x-88f5181", 13*724ba675SRob Herring "marvell,orion5x"; 14*724ba675SRob Herring aliases { 15*724ba675SRob Herring serial0 = &uart0; 16*724ba675SRob Herring }; 17*724ba675SRob Herring 18*724ba675SRob Herring memory { 19*724ba675SRob Herring device_type = "memory"; 20*724ba675SRob Herring reg = <0x00000000 0x2000000>; /* 32 MB */ 21*724ba675SRob Herring }; 22*724ba675SRob Herring 23*724ba675SRob Herring chosen { 24*724ba675SRob Herring stdout-path = "serial0:115200n8"; 25*724ba675SRob Herring }; 26*724ba675SRob Herring 27*724ba675SRob Herring soc { 28*724ba675SRob Herring ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>, 29*724ba675SRob Herring <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>, 30*724ba675SRob Herring <MBUS_ID(0x01, 0x0f) 0 0xf4000000 0x800000>; 31*724ba675SRob Herring }; 32*724ba675SRob Herring 33*724ba675SRob Herring gpio-keys { 34*724ba675SRob Herring compatible = "gpio-keys"; 35*724ba675SRob Herring pinctrl-0 = <&pmx_reset_button>; 36*724ba675SRob Herring pinctrl-names = "default"; 37*724ba675SRob Herring 38*724ba675SRob Herring reset { 39*724ba675SRob Herring label = "Reset Button"; 40*724ba675SRob Herring linux,code = <KEY_RESTART>; 41*724ba675SRob Herring gpios = <&gpio0 1 GPIO_ACTIVE_LOW>; 42*724ba675SRob Herring }; 43*724ba675SRob Herring }; 44*724ba675SRob Herring 45*724ba675SRob Herring gpio-leds { 46*724ba675SRob Herring compatible = "gpio-leds"; 47*724ba675SRob Herring pinctrl-0 = <&pmx_power_led &pmx_power_led_blink &pmx_wan_led>; 48*724ba675SRob Herring pinctrl-names = "default"; 49*724ba675SRob Herring 50*724ba675SRob Herring led@0 { 51*724ba675SRob Herring label = "wnr854t:green:power"; 52*724ba675SRob Herring gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; 53*724ba675SRob Herring }; 54*724ba675SRob Herring 55*724ba675SRob Herring led@1 { 56*724ba675SRob Herring label = "wnr854t:blink:power"; 57*724ba675SRob Herring gpios = <&gpio0 2 GPIO_ACTIVE_LOW>; 58*724ba675SRob Herring }; 59*724ba675SRob Herring 60*724ba675SRob Herring led@2 { 61*724ba675SRob Herring label = "wnr854t:green:wan"; 62*724ba675SRob Herring gpios = <&gpio0 3 GPIO_ACTIVE_LOW>; 63*724ba675SRob Herring }; 64*724ba675SRob Herring }; 65*724ba675SRob Herring}; 66*724ba675SRob Herring 67*724ba675SRob Herring&devbus_bootcs { 68*724ba675SRob Herring status = "okay"; 69*724ba675SRob Herring 70*724ba675SRob Herring devbus,keep-config; 71*724ba675SRob Herring 72*724ba675SRob Herring flash@0 { 73*724ba675SRob Herring compatible = "cfi-flash"; 74*724ba675SRob Herring reg = <0 0x800000>; 75*724ba675SRob Herring bank-width = <2>; 76*724ba675SRob Herring 77*724ba675SRob Herring partitions { 78*724ba675SRob Herring compatible = "fixed-partitions"; 79*724ba675SRob Herring #address-cells = <1>; 80*724ba675SRob Herring #size-cells = <1>; 81*724ba675SRob Herring 82*724ba675SRob Herring partition@0 { 83*724ba675SRob Herring label = "kernel"; 84*724ba675SRob Herring reg = <0x0 0x100000>; 85*724ba675SRob Herring }; 86*724ba675SRob Herring 87*724ba675SRob Herring partition@100000 { 88*724ba675SRob Herring label = "rootfs"; 89*724ba675SRob Herring reg = <0x100000 0x660000>; 90*724ba675SRob Herring }; 91*724ba675SRob Herring 92*724ba675SRob Herring partition@760000 { 93*724ba675SRob Herring label = "uboot_env"; 94*724ba675SRob Herring reg = <0x760000 0x20000>; 95*724ba675SRob Herring }; 96*724ba675SRob Herring 97*724ba675SRob Herring partition@780000 { 98*724ba675SRob Herring label = "uboot"; 99*724ba675SRob Herring reg = <0x780000 0x80000>; 100*724ba675SRob Herring read-only; 101*724ba675SRob Herring }; 102*724ba675SRob Herring }; 103*724ba675SRob Herring }; 104*724ba675SRob Herring}; 105*724ba675SRob Herring 106*724ba675SRob Herring&mdio { 107*724ba675SRob Herring status = "okay"; 108*724ba675SRob Herring 109*724ba675SRob Herring switch: switch@0 { 110*724ba675SRob Herring compatible = "marvell,mv88e6085"; 111*724ba675SRob Herring #address-cells = <1>; 112*724ba675SRob Herring #size-cells = <0>; 113*724ba675SRob Herring reg = <0>; 114*724ba675SRob Herring dsa,member = <0 0>; 115*724ba675SRob Herring 116*724ba675SRob Herring ports { 117*724ba675SRob Herring #address-cells = <1>; 118*724ba675SRob Herring #size-cells = <0>; 119*724ba675SRob Herring 120*724ba675SRob Herring port@0 { 121*724ba675SRob Herring reg = <0>; 122*724ba675SRob Herring label = "lan3"; 123*724ba675SRob Herring phy-handle = <&lan3phy>; 124*724ba675SRob Herring }; 125*724ba675SRob Herring 126*724ba675SRob Herring port@1 { 127*724ba675SRob Herring reg = <1>; 128*724ba675SRob Herring label = "lan4"; 129*724ba675SRob Herring phy-handle = <&lan4phy>; 130*724ba675SRob Herring }; 131*724ba675SRob Herring 132*724ba675SRob Herring port@2 { 133*724ba675SRob Herring reg = <2>; 134*724ba675SRob Herring label = "wan"; 135*724ba675SRob Herring phy-handle = <&wanphy>; 136*724ba675SRob Herring }; 137*724ba675SRob Herring 138*724ba675SRob Herring port@3 { 139*724ba675SRob Herring reg = <3>; 140*724ba675SRob Herring ethernet = <ðport>; 141*724ba675SRob Herring phy-mode = "rgmii-id"; 142*724ba675SRob Herring fixed-link { 143*724ba675SRob Herring speed = <1000>; 144*724ba675SRob Herring full-duplex; 145*724ba675SRob Herring }; 146*724ba675SRob Herring }; 147*724ba675SRob Herring 148*724ba675SRob Herring port@5 { 149*724ba675SRob Herring reg = <5>; 150*724ba675SRob Herring label = "lan1"; 151*724ba675SRob Herring phy-handle = <&lan1phy>; 152*724ba675SRob Herring }; 153*724ba675SRob Herring 154*724ba675SRob Herring port@7 { 155*724ba675SRob Herring reg = <7>; 156*724ba675SRob Herring label = "lan2"; 157*724ba675SRob Herring phy-handle = <&lan2phy>; 158*724ba675SRob Herring }; 159*724ba675SRob Herring }; 160*724ba675SRob Herring 161*724ba675SRob Herring mdio { 162*724ba675SRob Herring #address-cells = <1>; 163*724ba675SRob Herring #size-cells = <0>; 164*724ba675SRob Herring 165*724ba675SRob Herring lan3phy: ethernet-phy@0 { 166*724ba675SRob Herring /* Marvell 88E1121R (port 1) */ 167*724ba675SRob Herring compatible = "ethernet-phy-id0141.0cb0", 168*724ba675SRob Herring "ethernet-phy-ieee802.3-c22"; 169*724ba675SRob Herring reg = <0>; 170*724ba675SRob Herring marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>; 171*724ba675SRob Herring }; 172*724ba675SRob Herring 173*724ba675SRob Herring lan4phy: ethernet-phy@1 { 174*724ba675SRob Herring /* Marvell 88E1121R (port 2) */ 175*724ba675SRob Herring compatible = "ethernet-phy-id0141.0cb0", 176*724ba675SRob Herring "ethernet-phy-ieee802.3-c22"; 177*724ba675SRob Herring reg = <1>; 178*724ba675SRob Herring marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>; 179*724ba675SRob Herring }; 180*724ba675SRob Herring 181*724ba675SRob Herring wanphy: ethernet-phy@2 { 182*724ba675SRob Herring /* Marvell 88E1121R (port 1) */ 183*724ba675SRob Herring compatible = "ethernet-phy-id0141.0cb0", 184*724ba675SRob Herring "ethernet-phy-ieee802.3-c22"; 185*724ba675SRob Herring reg = <2>; 186*724ba675SRob Herring marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>; 187*724ba675SRob Herring }; 188*724ba675SRob Herring 189*724ba675SRob Herring lan1phy: ethernet-phy@5 { 190*724ba675SRob Herring /* Marvell 88E1112 */ 191*724ba675SRob Herring compatible = "ethernet-phy-id0141.0cb0", 192*724ba675SRob Herring "ethernet-phy-ieee802.3-c22"; 193*724ba675SRob Herring reg = <5>; 194*724ba675SRob Herring marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>; 195*724ba675SRob Herring }; 196*724ba675SRob Herring 197*724ba675SRob Herring lan2phy: ethernet-phy@7 { 198*724ba675SRob Herring /* Marvell 88E1112 */ 199*724ba675SRob Herring compatible = "ethernet-phy-id0141.0cb0", 200*724ba675SRob Herring "ethernet-phy-ieee802.3-c22"; 201*724ba675SRob Herring reg = <7>; 202*724ba675SRob Herring marvell,reg-init = <3 16 0 0x1777 3 17 0 0x15>; 203*724ba675SRob Herring }; 204*724ba675SRob Herring }; 205*724ba675SRob Herring }; 206*724ba675SRob Herring}; 207*724ba675SRob Herring 208*724ba675SRob Herringð { 209*724ba675SRob Herring status = "okay"; 210*724ba675SRob Herring 211*724ba675SRob Herring ethernet-port@0 { 212*724ba675SRob Herring /* Hardwired to DSA switch */ 213*724ba675SRob Herring speed = <1000>; 214*724ba675SRob Herring duplex = <1>; 215*724ba675SRob Herring phy-mode = "rgmii"; 216*724ba675SRob Herring }; 217*724ba675SRob Herring}; 218*724ba675SRob Herring 219*724ba675SRob Herring&pinctrl { 220*724ba675SRob Herring pinctrl-0 = <&pmx_pci_gpios>; 221*724ba675SRob Herring pinctrl-names = "default"; 222*724ba675SRob Herring 223*724ba675SRob Herring pmx_power_led: pmx-power-led { 224*724ba675SRob Herring marvell,pins = "mpp0"; 225*724ba675SRob Herring marvell,function = "gpio"; 226*724ba675SRob Herring }; 227*724ba675SRob Herring 228*724ba675SRob Herring pmx_reset_button: pmx-reset-button { 229*724ba675SRob Herring marvell,pins = "mpp1"; 230*724ba675SRob Herring marvell,function = "gpio"; 231*724ba675SRob Herring }; 232*724ba675SRob Herring 233*724ba675SRob Herring pmx_power_led_blink: pmx-power-led-blink { 234*724ba675SRob Herring marvell,pins = "mpp2"; 235*724ba675SRob Herring marvell,function = "gpio"; 236*724ba675SRob Herring }; 237*724ba675SRob Herring 238*724ba675SRob Herring pmx_wan_led: pmx-wan-led { 239*724ba675SRob Herring marvell,pins = "mpp3"; 240*724ba675SRob Herring marvell,function = "gpio"; 241*724ba675SRob Herring }; 242*724ba675SRob Herring 243*724ba675SRob Herring pmx_pci_gpios: pmx-pci-gpios { 244*724ba675SRob Herring marvell,pins = "mpp4"; 245*724ba675SRob Herring marvell,function = "gpio"; 246*724ba675SRob Herring }; 247*724ba675SRob Herring}; 248*724ba675SRob Herring 249*724ba675SRob Herring&uart0 { 250*724ba675SRob Herring /* Pin 1: Tx, Pin 7: Rx, Pin 8: Gnd */ 251*724ba675SRob Herring status = "okay"; 252*724ba675SRob Herring}; 253