1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0 2*724ba675SRob Herring/* 3*724ba675SRob Herring * Device Tree file for LaCie 2Big NAS 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2015 Seagate 6*724ba675SRob Herring * 7*724ba675SRob Herring * Author: Simon Guinot <simon.guinot@sequanux.org> 8*724ba675SRob Herring * 9*724ba675SRob Herring*/ 10*724ba675SRob Herring 11*724ba675SRob Herring/dts-v1/; 12*724ba675SRob Herring 13*724ba675SRob Herring#include "kirkwood-netxbig.dtsi" 14*724ba675SRob Herring 15*724ba675SRob Herring/ { 16*724ba675SRob Herring model = "LaCie 2Big NAS"; 17*724ba675SRob Herring compatible = "lacie,nas2big", "lacie,netxbig", "marvell,kirkwood-88f6282", "marvell,kirkwood"; 18*724ba675SRob Herring 19*724ba675SRob Herring memory { 20*724ba675SRob Herring device_type = "memory"; 21*724ba675SRob Herring reg = <0x00000000 0x10000000>; 22*724ba675SRob Herring }; 23*724ba675SRob Herring 24*724ba675SRob Herring chosen { 25*724ba675SRob Herring bootargs = "console=ttyS0,115200n8"; 26*724ba675SRob Herring stdout-path = &uart0; 27*724ba675SRob Herring }; 28*724ba675SRob Herring 29*724ba675SRob Herring ocp@f1000000 { 30*724ba675SRob Herring rtc@10300 { 31*724ba675SRob Herring /* The on-chip RTC is not powered (no supercap). */ 32*724ba675SRob Herring status = "disabled"; 33*724ba675SRob Herring }; 34*724ba675SRob Herring spi@10600 { 35*724ba675SRob Herring /* 36*724ba675SRob Herring * A NAND flash is used instead of an SPI flash for 37*724ba675SRob Herring * the other netxbig-compatible boards. 38*724ba675SRob Herring */ 39*724ba675SRob Herring status = "disabled"; 40*724ba675SRob Herring }; 41*724ba675SRob Herring }; 42*724ba675SRob Herring 43*724ba675SRob Herring fan { 44*724ba675SRob Herring /* 45*724ba675SRob Herring * An I2C fan controller (GMT G762) is used but alarm is 46*724ba675SRob Herring * wired to a separate GPIO. 47*724ba675SRob Herring */ 48*724ba675SRob Herring compatible = "gpio-fan"; 49*724ba675SRob Herring alarm-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>; 50*724ba675SRob Herring }; 51*724ba675SRob Herring 52*724ba675SRob Herring regulators: regulators { 53*724ba675SRob Herring status = "okay"; 54*724ba675SRob Herring compatible = "simple-bus"; 55*724ba675SRob Herring #address-cells = <1>; 56*724ba675SRob Herring #size-cells = <0>; 57*724ba675SRob Herring pinctrl-names = "default"; 58*724ba675SRob Herring 59*724ba675SRob Herring regulator@2 { 60*724ba675SRob Herring compatible = "regulator-fixed"; 61*724ba675SRob Herring reg = <2>; 62*724ba675SRob Herring regulator-name = "hdd1power"; 63*724ba675SRob Herring regulator-min-microvolt = <5000000>; 64*724ba675SRob Herring regulator-max-microvolt = <5000000>; 65*724ba675SRob Herring enable-active-high; 66*724ba675SRob Herring regulator-always-on; 67*724ba675SRob Herring regulator-boot-on; 68*724ba675SRob Herring gpio = <&gpio0 17 GPIO_ACTIVE_HIGH>; 69*724ba675SRob Herring }; 70*724ba675SRob Herring clocks { 71*724ba675SRob Herring g762_clk: g762-oscillator { 72*724ba675SRob Herring compatible = "fixed-clock"; 73*724ba675SRob Herring #clock-cells = <0>; 74*724ba675SRob Herring clock-frequency = <32768>; 75*724ba675SRob Herring }; 76*724ba675SRob Herring }; 77*724ba675SRob Herring }; 78*724ba675SRob Herring}; 79*724ba675SRob Herring 80*724ba675SRob Herring&mdio { 81*724ba675SRob Herring status = "okay"; 82*724ba675SRob Herring 83*724ba675SRob Herring ethphy0: ethernet-phy@0 { 84*724ba675SRob Herring reg = <0>; 85*724ba675SRob Herring }; 86*724ba675SRob Herring}; 87*724ba675SRob Herring 88*724ba675SRob Herring&i2c0 { 89*724ba675SRob Herring status = "okay"; 90*724ba675SRob Herring 91*724ba675SRob Herring /* 92*724ba675SRob Herring * An external I2C RTC (Dallas DS1337S+) is used. This allows 93*724ba675SRob Herring * to power-up the board on an RTC alarm. The external RTC can 94*724ba675SRob Herring * be kept powered, even when the SoC is off. 95*724ba675SRob Herring */ 96*724ba675SRob Herring rtc@68 { 97*724ba675SRob Herring compatible = "dallas,ds1307"; 98*724ba675SRob Herring reg = <0x68>; 99*724ba675SRob Herring interrupts = <43>; 100*724ba675SRob Herring }; 101*724ba675SRob Herring g762@3e { 102*724ba675SRob Herring compatible = "gmt,g762"; 103*724ba675SRob Herring reg = <0x3e>; 104*724ba675SRob Herring clocks = <&g762_clk>; 105*724ba675SRob Herring }; 106*724ba675SRob Herring}; 107*724ba675SRob Herring 108*724ba675SRob Herring&nand { 109*724ba675SRob Herring chip-delay = <50>; 110*724ba675SRob Herring status = "okay"; 111*724ba675SRob Herring 112*724ba675SRob Herring partition@0 { 113*724ba675SRob Herring label = "U-Boot"; 114*724ba675SRob Herring reg = <0x0 0x100000>; 115*724ba675SRob Herring }; 116*724ba675SRob Herring 117*724ba675SRob Herring partition@100000 { 118*724ba675SRob Herring label = "uImage"; 119*724ba675SRob Herring reg = <0x100000 0x1000000>; 120*724ba675SRob Herring }; 121*724ba675SRob Herring 122*724ba675SRob Herring partition@1100000 { 123*724ba675SRob Herring label = "root"; 124*724ba675SRob Herring reg = <0x1100000 0x8000000>; 125*724ba675SRob Herring }; 126*724ba675SRob Herring 127*724ba675SRob Herring partition@9100000 { 128*724ba675SRob Herring label = "unused"; 129*724ba675SRob Herring reg = <0x9100000 0x6f00000>; 130*724ba675SRob Herring }; 131*724ba675SRob Herring}; 132*724ba675SRob Herring 133*724ba675SRob Herring&pciec { 134*724ba675SRob Herring status = "okay"; 135*724ba675SRob Herring}; 136*724ba675SRob Herring 137*724ba675SRob Herring&pcie0 { 138*724ba675SRob Herring status = "okay"; 139*724ba675SRob Herring}; 140