xref: /linux/scripts/dtc/include-prefixes/arm/marvell/armada-xp-synology-ds414.dts (revision 724ba6751532055db75992fc6ae21c3e322e94a7)
1*724ba675SRob Herring// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Device Tree file for Synology DS414
4*724ba675SRob Herring *
5*724ba675SRob Herring * Copyright (C) 2014, Arnaud EBALARD <arno@natisbad.org>
6*724ba675SRob Herring *
7*724ba675SRob Herring * Note: this Device Tree assumes that the bootloader has remapped the
8*724ba675SRob Herring * internal registers to 0xf1000000 (instead of the old 0xd0000000).
9*724ba675SRob Herring * The 0xf1000000 is the default used by the recent, DT-capable, U-Boot
10*724ba675SRob Herring * bootloaders provided by Marvell. It is used in recent versions of
11*724ba675SRob Herring * DSM software provided by Synology. Nonetheless, some earlier boards
12*724ba675SRob Herring * were delivered with an older version of u-boot that left internal
13*724ba675SRob Herring * registers mapped at 0xd0000000. If you have such a device you will
14*724ba675SRob Herring * not be able to directly boot a kernel based on this Device Tree. In
15*724ba675SRob Herring * that case, the preferred solution is to update your bootloader (e.g.
16*724ba675SRob Herring * by upgrading to latest version of DSM, or building a new one and
17*724ba675SRob Herring * installing it from u-boot prompt) or adjust the Devive Tree
18*724ba675SRob Herring * (s/0xf1000000/0xd0000000/ in 'ranges' below).
19*724ba675SRob Herring */
20*724ba675SRob Herring
21*724ba675SRob Herring/dts-v1/;
22*724ba675SRob Herring
23*724ba675SRob Herring#include <dt-bindings/input/input.h>
24*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
25*724ba675SRob Herring#include "armada-xp-mv78230.dtsi"
26*724ba675SRob Herring
27*724ba675SRob Herring/ {
28*724ba675SRob Herring	model = "Synology DS414";
29*724ba675SRob Herring	compatible = "synology,ds414", "marvell,armadaxp-mv78230",
30*724ba675SRob Herring		     "marvell,armadaxp", "marvell,armada-370-xp";
31*724ba675SRob Herring
32*724ba675SRob Herring	chosen {
33*724ba675SRob Herring		stdout-path = "serial0:115200n8";
34*724ba675SRob Herring	};
35*724ba675SRob Herring
36*724ba675SRob Herring	memory@0 {
37*724ba675SRob Herring		device_type = "memory";
38*724ba675SRob Herring		reg = <0 0x00000000 0 0x40000000>; /* 1GB */
39*724ba675SRob Herring	};
40*724ba675SRob Herring
41*724ba675SRob Herring	soc {
42*724ba675SRob Herring		ranges = <MBUS_ID(0xf0, 0x01) 0 0 0xf1000000 0x100000
43*724ba675SRob Herring			  MBUS_ID(0x01, 0x1d) 0 0 0xfff00000 0x100000
44*724ba675SRob Herring			  MBUS_ID(0x09, 0x09) 0 0 0xf1100000 0x10000
45*724ba675SRob Herring			  MBUS_ID(0x09, 0x05) 0 0 0xf1110000 0x10000>;
46*724ba675SRob Herring
47*724ba675SRob Herring		internal-regs {
48*724ba675SRob Herring
49*724ba675SRob Herring			/* RTC is provided by Seiko S-35390A below */
50*724ba675SRob Herring			rtc@10300 {
51*724ba675SRob Herring				status = "disabled";
52*724ba675SRob Herring			};
53*724ba675SRob Herring
54*724ba675SRob Herring			i2c@11000 {
55*724ba675SRob Herring				clock-frequency = <400000>;
56*724ba675SRob Herring				status = "okay";
57*724ba675SRob Herring
58*724ba675SRob Herring				s35390a: s35390a@30 {
59*724ba675SRob Herring					 compatible = "sii,s35390a";
60*724ba675SRob Herring					 reg = <0x30>;
61*724ba675SRob Herring				};
62*724ba675SRob Herring			};
63*724ba675SRob Herring
64*724ba675SRob Herring			/* Connected to a header on device's PCB. This
65*724ba675SRob Herring			 * provides the main console for the device.
66*724ba675SRob Herring			 *
67*724ba675SRob Herring			 * Warning: the device may not boot with a 3.3V
68*724ba675SRob Herring			 * USB-serial converter connected when the power
69*724ba675SRob Herring			 * button is pressed. The converter needs to be
70*724ba675SRob Herring			 * connected a few seconds after pressing the
71*724ba675SRob Herring			 * power button. This is possibly due to UART0_TXD
72*724ba675SRob Herring			 * pin being sampled at reset (bit 0 of SAR).
73*724ba675SRob Herring			 */
74*724ba675SRob Herring			serial@12000 {
75*724ba675SRob Herring				status = "okay";
76*724ba675SRob Herring			};
77*724ba675SRob Herring
78*724ba675SRob Herring			/* Connected to a Microchip PIC16F883 for power control */
79*724ba675SRob Herring			serial@12100 {
80*724ba675SRob Herring				status = "okay";
81*724ba675SRob Herring			};
82*724ba675SRob Herring
83*724ba675SRob Herring			poweroff@12100 {
84*724ba675SRob Herring				compatible = "synology,power-off";
85*724ba675SRob Herring				reg = <0x12100 0x100>;
86*724ba675SRob Herring				clocks = <&coreclk 0>;
87*724ba675SRob Herring			};
88*724ba675SRob Herring
89*724ba675SRob Herring			/* Front USB 2.0 port */
90*724ba675SRob Herring			usb@50000 {
91*724ba675SRob Herring				status = "okay";
92*724ba675SRob Herring			};
93*724ba675SRob Herring
94*724ba675SRob Herring			ethernet@70000 {
95*724ba675SRob Herring				status = "okay";
96*724ba675SRob Herring				pinctrl-0 = <&ge0_rgmii_pins>;
97*724ba675SRob Herring				pinctrl-names = "default";
98*724ba675SRob Herring				phy = <&phy1>;
99*724ba675SRob Herring				phy-mode = "rgmii-id";
100*724ba675SRob Herring			};
101*724ba675SRob Herring
102*724ba675SRob Herring			ethernet@74000 {
103*724ba675SRob Herring				pinctrl-0 = <&ge1_rgmii_pins>;
104*724ba675SRob Herring				pinctrl-names = "default";
105*724ba675SRob Herring				status = "okay";
106*724ba675SRob Herring				phy = <&phy0>;
107*724ba675SRob Herring				phy-mode = "rgmii-id";
108*724ba675SRob Herring			};
109*724ba675SRob Herring		};
110*724ba675SRob Herring	};
111*724ba675SRob Herring
112*724ba675SRob Herring	regulators {
113*724ba675SRob Herring		compatible = "simple-bus";
114*724ba675SRob Herring		#address-cells = <1>;
115*724ba675SRob Herring		#size-cells = <0>;
116*724ba675SRob Herring		pinctrl-0 = <&sata1_pwr_pin &sata2_pwr_pin
117*724ba675SRob Herring			     &sata3_pwr_pin &sata4_pwr_pin>;
118*724ba675SRob Herring		pinctrl-names = "default";
119*724ba675SRob Herring
120*724ba675SRob Herring		sata1_regulator: sata1-regulator@1 {
121*724ba675SRob Herring			compatible = "regulator-fixed";
122*724ba675SRob Herring			reg = <1>;
123*724ba675SRob Herring			regulator-name = "SATA1 Power";
124*724ba675SRob Herring			regulator-min-microvolt = <5000000>;
125*724ba675SRob Herring			regulator-max-microvolt = <5000000>;
126*724ba675SRob Herring			startup-delay-us = <2000000>;
127*724ba675SRob Herring			enable-active-high;
128*724ba675SRob Herring			regulator-always-on;
129*724ba675SRob Herring			regulator-boot-on;
130*724ba675SRob Herring			gpio = <&gpio1 10 GPIO_ACTIVE_HIGH>;
131*724ba675SRob Herring		};
132*724ba675SRob Herring
133*724ba675SRob Herring		sata2_regulator: sata2-regulator@2 {
134*724ba675SRob Herring			compatible = "regulator-fixed";
135*724ba675SRob Herring			reg = <2>;
136*724ba675SRob Herring			regulator-name = "SATA2 Power";
137*724ba675SRob Herring			regulator-min-microvolt = <5000000>;
138*724ba675SRob Herring			regulator-max-microvolt = <5000000>;
139*724ba675SRob Herring			startup-delay-us = <4000000>;
140*724ba675SRob Herring			enable-active-high;
141*724ba675SRob Herring			regulator-always-on;
142*724ba675SRob Herring			regulator-boot-on;
143*724ba675SRob Herring			gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
144*724ba675SRob Herring		};
145*724ba675SRob Herring
146*724ba675SRob Herring		sata3_regulator: sata3-regulator@3 {
147*724ba675SRob Herring			compatible = "regulator-fixed";
148*724ba675SRob Herring			reg = <3>;
149*724ba675SRob Herring			regulator-name = "SATA3 Power";
150*724ba675SRob Herring			regulator-min-microvolt = <5000000>;
151*724ba675SRob Herring			regulator-max-microvolt = <5000000>;
152*724ba675SRob Herring			startup-delay-us = <6000000>;
153*724ba675SRob Herring			enable-active-high;
154*724ba675SRob Herring			regulator-always-on;
155*724ba675SRob Herring			regulator-boot-on;
156*724ba675SRob Herring			gpio = <&gpio1 13 GPIO_ACTIVE_HIGH>;
157*724ba675SRob Herring		};
158*724ba675SRob Herring
159*724ba675SRob Herring		sata4_regulator: sata4-regulator@4 {
160*724ba675SRob Herring			compatible = "regulator-fixed";
161*724ba675SRob Herring			reg = <4>;
162*724ba675SRob Herring			regulator-name = "SATA4 Power";
163*724ba675SRob Herring			regulator-min-microvolt = <5000000>;
164*724ba675SRob Herring			regulator-max-microvolt = <5000000>;
165*724ba675SRob Herring			startup-delay-us = <8000000>;
166*724ba675SRob Herring			enable-active-high;
167*724ba675SRob Herring			regulator-always-on;
168*724ba675SRob Herring			regulator-boot-on;
169*724ba675SRob Herring			gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
170*724ba675SRob Herring		};
171*724ba675SRob Herring	};
172*724ba675SRob Herring};
173*724ba675SRob Herring
174*724ba675SRob Herring&pciec {
175*724ba675SRob Herring	status = "okay";
176*724ba675SRob Herring
177*724ba675SRob Herring	/*
178*724ba675SRob Herring	 * Connected to Marvell 88SX7042 SATA-II controller
179*724ba675SRob Herring	 * handling the four disks.
180*724ba675SRob Herring	 */
181*724ba675SRob Herring	pcie@1,0 {
182*724ba675SRob Herring		/* Port 0, Lane 0 */
183*724ba675SRob Herring		status = "okay";
184*724ba675SRob Herring	};
185*724ba675SRob Herring
186*724ba675SRob Herring	/*
187*724ba675SRob Herring	 * Connected to EtronTech EJ168A XHCI controller
188*724ba675SRob Herring	 * providing the two rear USB 3.0 ports.
189*724ba675SRob Herring	 */
190*724ba675SRob Herring	pcie@5,0 {
191*724ba675SRob Herring		/* Port 1, Lane 0 */
192*724ba675SRob Herring		status = "okay";
193*724ba675SRob Herring	};
194*724ba675SRob Herring};
195*724ba675SRob Herring
196*724ba675SRob Herring
197*724ba675SRob Herring&mdio {
198*724ba675SRob Herring	phy0: ethernet-phy@0 { /* Marvell 88E1512 */
199*724ba675SRob Herring		reg = <0>;
200*724ba675SRob Herring	};
201*724ba675SRob Herring
202*724ba675SRob Herring	phy1: ethernet-phy@1 { /* Marvell 88E1512 */
203*724ba675SRob Herring		reg = <1>;
204*724ba675SRob Herring	};
205*724ba675SRob Herring};
206*724ba675SRob Herring
207*724ba675SRob Herring&pinctrl {
208*724ba675SRob Herring	sata1_pwr_pin: sata1-pwr-pin {
209*724ba675SRob Herring		marvell,pins = "mpp42";
210*724ba675SRob Herring		marvell,function = "gpio";
211*724ba675SRob Herring	};
212*724ba675SRob Herring
213*724ba675SRob Herring	sata2_pwr_pin: sata2-pwr-pin {
214*724ba675SRob Herring		marvell,pins = "mpp44";
215*724ba675SRob Herring		marvell,function = "gpio";
216*724ba675SRob Herring	};
217*724ba675SRob Herring
218*724ba675SRob Herring	sata3_pwr_pin: sata3-pwr-pin {
219*724ba675SRob Herring		marvell,pins = "mpp45";
220*724ba675SRob Herring		marvell,function = "gpio";
221*724ba675SRob Herring	};
222*724ba675SRob Herring
223*724ba675SRob Herring	sata4_pwr_pin: sata4-pwr-pin {
224*724ba675SRob Herring		marvell,pins = "mpp46";
225*724ba675SRob Herring		marvell,function = "gpio";
226*724ba675SRob Herring	};
227*724ba675SRob Herring
228*724ba675SRob Herring	sata1_pres_pin: sata1-pres-pin {
229*724ba675SRob Herring		marvell,pins = "mpp34";
230*724ba675SRob Herring		marvell,function = "gpio";
231*724ba675SRob Herring	};
232*724ba675SRob Herring
233*724ba675SRob Herring	sata2_pres_pin: sata2-pres-pin {
234*724ba675SRob Herring		marvell,pins = "mpp35";
235*724ba675SRob Herring		marvell,function = "gpio";
236*724ba675SRob Herring	};
237*724ba675SRob Herring
238*724ba675SRob Herring	sata3_pres_pin: sata3-pres-pin {
239*724ba675SRob Herring		marvell,pins = "mpp40";
240*724ba675SRob Herring		marvell,function = "gpio";
241*724ba675SRob Herring	};
242*724ba675SRob Herring
243*724ba675SRob Herring	sata4_pres_pin: sata4-pres-pin {
244*724ba675SRob Herring		marvell,pins = "mpp41";
245*724ba675SRob Herring		marvell,function = "gpio";
246*724ba675SRob Herring	};
247*724ba675SRob Herring
248*724ba675SRob Herring	syno_id_bit0_pin: syno-id-bit0-pin {
249*724ba675SRob Herring		marvell,pins = "mpp26";
250*724ba675SRob Herring		marvell,function = "gpio";
251*724ba675SRob Herring	};
252*724ba675SRob Herring
253*724ba675SRob Herring	syno_id_bit1_pin: syno-id-bit1-pin {
254*724ba675SRob Herring		marvell,pins = "mpp28";
255*724ba675SRob Herring		marvell,function = "gpio";
256*724ba675SRob Herring	};
257*724ba675SRob Herring
258*724ba675SRob Herring	syno_id_bit2_pin: syno-id-bit2-pin {
259*724ba675SRob Herring		marvell,pins = "mpp29";
260*724ba675SRob Herring		marvell,function = "gpio";
261*724ba675SRob Herring	};
262*724ba675SRob Herring
263*724ba675SRob Herring	fan1_alarm_pin: fan1-alarm-pin {
264*724ba675SRob Herring		marvell,pins = "mpp33";
265*724ba675SRob Herring		marvell,function = "gpio";
266*724ba675SRob Herring	};
267*724ba675SRob Herring
268*724ba675SRob Herring	fan2_alarm_pin: fan2-alarm-pin {
269*724ba675SRob Herring		marvell,pins = "mpp32";
270*724ba675SRob Herring		marvell,function = "gpio";
271*724ba675SRob Herring	};
272*724ba675SRob Herring};
273*724ba675SRob Herring
274*724ba675SRob Herring&spi0 {
275*724ba675SRob Herring	status = "okay";
276*724ba675SRob Herring
277*724ba675SRob Herring	flash@0 {
278*724ba675SRob Herring		#address-cells = <1>;
279*724ba675SRob Herring		#size-cells = <1>;
280*724ba675SRob Herring		compatible = "micron,n25q064", "jedec,spi-nor";
281*724ba675SRob Herring		reg = <0>; /* Chip select 0 */
282*724ba675SRob Herring		spi-max-frequency = <20000000>;
283*724ba675SRob Herring
284*724ba675SRob Herring		/*
285*724ba675SRob Herring		 * Warning!
286*724ba675SRob Herring		 *
287*724ba675SRob Herring		 * Synology u-boot uses its compiled-in environment
288*724ba675SRob Herring		 * and it seems Synology did not care to change u-boot
289*724ba675SRob Herring		 * default configuration in order to allow saving a
290*724ba675SRob Herring		 * modified environment at a sensible location. So,
291*724ba675SRob Herring		 * if you do a 'saveenv' under u-boot, your modified
292*724ba675SRob Herring		 * environment will be saved at 1MB after the start
293*724ba675SRob Herring		 * of the flash, i.e. in the middle of the uImage.
294*724ba675SRob Herring		 * For that reason, it is strongly advised not to
295*724ba675SRob Herring		 * change the default environment, unless you know
296*724ba675SRob Herring		 * what you are doing.
297*724ba675SRob Herring		 */
298*724ba675SRob Herring		partition@0 { /* u-boot */
299*724ba675SRob Herring			label = "RedBoot";
300*724ba675SRob Herring			reg = <0x00000000 0x000d0000>; /* 832KB */
301*724ba675SRob Herring		};
302*724ba675SRob Herring
303*724ba675SRob Herring		partition@c0000 { /* uImage */
304*724ba675SRob Herring			label = "zImage";
305*724ba675SRob Herring			reg = <0x000d0000 0x002d0000>; /* 2880KB */
306*724ba675SRob Herring		};
307*724ba675SRob Herring
308*724ba675SRob Herring		partition@3a0000 { /* uInitramfs */
309*724ba675SRob Herring			label = "rd.gz";
310*724ba675SRob Herring			reg = <0x003a0000 0x00430000>; /* 4250KB */
311*724ba675SRob Herring		};
312*724ba675SRob Herring
313*724ba675SRob Herring		partition@7d0000 { /* MAC address and serial number */
314*724ba675SRob Herring			label = "vendor";
315*724ba675SRob Herring			reg = <0x007d0000 0x00010000>; /* 64KB */
316*724ba675SRob Herring		};
317*724ba675SRob Herring
318*724ba675SRob Herring		partition@7e0000 {
319*724ba675SRob Herring			label = "RedBoot config";
320*724ba675SRob Herring			reg = <0x007e0000 0x00010000>; /* 64KB */
321*724ba675SRob Herring		};
322*724ba675SRob Herring
323*724ba675SRob Herring		partition@7f0000 {
324*724ba675SRob Herring			label = "FIS directory";
325*724ba675SRob Herring			reg = <0x007f0000 0x00010000>; /* 64KB */
326*724ba675SRob Herring		};
327*724ba675SRob Herring	};
328*724ba675SRob Herring};
329